Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794443 |
1 |
|
|
T41 |
18 |
|
T42 |
68 |
|
T43 |
51 |
auto[1] |
696916 |
1 |
|
|
T41 |
42 |
|
T42 |
32 |
|
T43 |
49 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937460 |
1 |
|
|
T41 |
36 |
|
T42 |
73 |
|
T43 |
72 |
auto[1] |
553899 |
1 |
|
|
T41 |
24 |
|
T42 |
27 |
|
T43 |
28 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515197 |
1 |
|
|
T41 |
12 |
|
T42 |
51 |
|
T43 |
38 |
auto[0] |
auto[1] |
279246 |
1 |
|
|
T41 |
6 |
|
T42 |
17 |
|
T43 |
13 |
auto[1] |
auto[0] |
422263 |
1 |
|
|
T41 |
24 |
|
T42 |
22 |
|
T43 |
34 |
auto[1] |
auto[1] |
274653 |
1 |
|
|
T41 |
18 |
|
T42 |
10 |
|
T43 |
15 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793764 |
1 |
|
|
T41 |
22 |
|
T42 |
54 |
|
T43 |
50 |
auto[1] |
697595 |
1 |
|
|
T41 |
38 |
|
T42 |
46 |
|
T43 |
50 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
938222 |
1 |
|
|
T41 |
26 |
|
T42 |
74 |
|
T43 |
89 |
auto[1] |
553137 |
1 |
|
|
T41 |
34 |
|
T42 |
26 |
|
T43 |
11 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515530 |
1 |
|
|
T41 |
9 |
|
T42 |
40 |
|
T43 |
45 |
auto[0] |
auto[1] |
278234 |
1 |
|
|
T41 |
13 |
|
T42 |
14 |
|
T43 |
5 |
auto[1] |
auto[0] |
422692 |
1 |
|
|
T41 |
17 |
|
T42 |
34 |
|
T43 |
44 |
auto[1] |
auto[1] |
274903 |
1 |
|
|
T41 |
21 |
|
T42 |
12 |
|
T43 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793244 |
1 |
|
|
T41 |
34 |
|
T42 |
48 |
|
T43 |
44 |
auto[1] |
698115 |
1 |
|
|
T41 |
26 |
|
T42 |
52 |
|
T43 |
56 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
936538 |
1 |
|
|
T41 |
37 |
|
T42 |
79 |
|
T43 |
72 |
auto[1] |
554821 |
1 |
|
|
T41 |
23 |
|
T42 |
21 |
|
T43 |
28 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
514519 |
1 |
|
|
T41 |
22 |
|
T42 |
37 |
|
T43 |
32 |
auto[0] |
auto[1] |
278725 |
1 |
|
|
T41 |
12 |
|
T42 |
11 |
|
T43 |
12 |
auto[1] |
auto[0] |
422019 |
1 |
|
|
T41 |
15 |
|
T42 |
42 |
|
T43 |
40 |
auto[1] |
auto[1] |
276096 |
1 |
|
|
T41 |
11 |
|
T42 |
10 |
|
T43 |
16 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793157 |
1 |
|
|
T41 |
28 |
|
T42 |
46 |
|
T43 |
33 |
auto[1] |
698202 |
1 |
|
|
T41 |
32 |
|
T42 |
54 |
|
T43 |
67 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937671 |
1 |
|
|
T41 |
32 |
|
T42 |
79 |
|
T43 |
60 |
auto[1] |
553688 |
1 |
|
|
T41 |
28 |
|
T42 |
21 |
|
T43 |
40 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515005 |
1 |
|
|
T41 |
16 |
|
T42 |
38 |
|
T43 |
22 |
auto[0] |
auto[1] |
278152 |
1 |
|
|
T41 |
12 |
|
T42 |
8 |
|
T43 |
11 |
auto[1] |
auto[0] |
422666 |
1 |
|
|
T41 |
16 |
|
T42 |
41 |
|
T43 |
38 |
auto[1] |
auto[1] |
275536 |
1 |
|
|
T41 |
16 |
|
T42 |
13 |
|
T43 |
29 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793187 |
1 |
|
|
T41 |
34 |
|
T42 |
78 |
|
T43 |
46 |
auto[1] |
698172 |
1 |
|
|
T41 |
26 |
|
T42 |
22 |
|
T43 |
54 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
936476 |
1 |
|
|
T41 |
31 |
|
T42 |
79 |
|
T43 |
78 |
auto[1] |
554883 |
1 |
|
|
T41 |
29 |
|
T42 |
21 |
|
T43 |
22 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
514047 |
1 |
|
|
T41 |
18 |
|
T42 |
62 |
|
T43 |
36 |
auto[0] |
auto[1] |
279140 |
1 |
|
|
T41 |
16 |
|
T42 |
16 |
|
T43 |
10 |
auto[1] |
auto[0] |
422429 |
1 |
|
|
T41 |
13 |
|
T42 |
17 |
|
T43 |
42 |
auto[1] |
auto[1] |
275743 |
1 |
|
|
T41 |
13 |
|
T42 |
5 |
|
T43 |
12 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
788731 |
1 |
|
|
T41 |
26 |
|
T42 |
38 |
|
T43 |
60 |
auto[1] |
702628 |
1 |
|
|
T41 |
34 |
|
T42 |
62 |
|
T43 |
40 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
935316 |
1 |
|
|
T41 |
30 |
|
T42 |
87 |
|
T43 |
67 |
auto[1] |
556043 |
1 |
|
|
T41 |
30 |
|
T42 |
13 |
|
T43 |
33 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
511279 |
1 |
|
|
T41 |
11 |
|
T42 |
34 |
|
T43 |
39 |
auto[0] |
auto[1] |
277452 |
1 |
|
|
T41 |
15 |
|
T42 |
4 |
|
T43 |
21 |
auto[1] |
auto[0] |
424037 |
1 |
|
|
T41 |
19 |
|
T42 |
53 |
|
T43 |
28 |
auto[1] |
auto[1] |
278591 |
1 |
|
|
T41 |
15 |
|
T42 |
9 |
|
T43 |
12 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794250 |
1 |
|
|
T41 |
38 |
|
T42 |
16 |
|
T43 |
33 |
auto[1] |
697109 |
1 |
|
|
T41 |
22 |
|
T42 |
84 |
|
T43 |
67 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
935391 |
1 |
|
|
T41 |
29 |
|
T42 |
86 |
|
T43 |
57 |
auto[1] |
555968 |
1 |
|
|
T41 |
31 |
|
T42 |
14 |
|
T43 |
43 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
514283 |
1 |
|
|
T41 |
19 |
|
T42 |
16 |
|
T43 |
17 |
auto[0] |
auto[1] |
279967 |
1 |
|
|
T41 |
19 |
|
T43 |
16 |
|
T44 |
3 |
auto[1] |
auto[0] |
421108 |
1 |
|
|
T41 |
10 |
|
T42 |
70 |
|
T43 |
40 |
auto[1] |
auto[1] |
276001 |
1 |
|
|
T41 |
12 |
|
T42 |
14 |
|
T43 |
27 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
795809 |
1 |
|
|
T41 |
32 |
|
T42 |
76 |
|
T43 |
37 |
auto[1] |
695550 |
1 |
|
|
T41 |
28 |
|
T42 |
24 |
|
T43 |
63 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937271 |
1 |
|
|
T41 |
35 |
|
T42 |
77 |
|
T43 |
70 |
auto[1] |
554088 |
1 |
|
|
T41 |
25 |
|
T42 |
23 |
|
T43 |
30 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
516007 |
1 |
|
|
T41 |
17 |
|
T42 |
57 |
|
T43 |
22 |
auto[0] |
auto[1] |
279802 |
1 |
|
|
T41 |
15 |
|
T42 |
19 |
|
T43 |
15 |
auto[1] |
auto[0] |
421264 |
1 |
|
|
T41 |
18 |
|
T42 |
20 |
|
T43 |
48 |
auto[1] |
auto[1] |
274286 |
1 |
|
|
T41 |
10 |
|
T42 |
4 |
|
T43 |
15 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794951 |
1 |
|
|
T41 |
28 |
|
T42 |
54 |
|
T43 |
56 |
auto[1] |
696408 |
1 |
|
|
T41 |
32 |
|
T42 |
46 |
|
T43 |
44 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
940094 |
1 |
|
|
T41 |
26 |
|
T42 |
75 |
|
T43 |
68 |
auto[1] |
551265 |
1 |
|
|
T41 |
34 |
|
T42 |
25 |
|
T43 |
32 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
517408 |
1 |
|
|
T41 |
15 |
|
T42 |
38 |
|
T43 |
35 |
auto[0] |
auto[1] |
277543 |
1 |
|
|
T41 |
13 |
|
T42 |
16 |
|
T43 |
21 |
auto[1] |
auto[0] |
422686 |
1 |
|
|
T41 |
11 |
|
T42 |
37 |
|
T43 |
33 |
auto[1] |
auto[1] |
273722 |
1 |
|
|
T41 |
21 |
|
T42 |
9 |
|
T43 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794784 |
1 |
|
|
T41 |
42 |
|
T42 |
56 |
|
T43 |
40 |
auto[1] |
696575 |
1 |
|
|
T41 |
18 |
|
T42 |
44 |
|
T43 |
60 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937922 |
1 |
|
|
T41 |
35 |
|
T42 |
79 |
|
T43 |
69 |
auto[1] |
553437 |
1 |
|
|
T41 |
25 |
|
T42 |
21 |
|
T43 |
31 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515861 |
1 |
|
|
T41 |
27 |
|
T42 |
42 |
|
T43 |
26 |
auto[0] |
auto[1] |
278923 |
1 |
|
|
T41 |
15 |
|
T42 |
14 |
|
T43 |
14 |
auto[1] |
auto[0] |
422061 |
1 |
|
|
T41 |
8 |
|
T42 |
37 |
|
T43 |
43 |
auto[1] |
auto[1] |
274514 |
1 |
|
|
T41 |
10 |
|
T42 |
7 |
|
T43 |
17 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
792258 |
1 |
|
|
T41 |
36 |
|
T42 |
22 |
|
T43 |
56 |
auto[1] |
699101 |
1 |
|
|
T41 |
24 |
|
T42 |
78 |
|
T43 |
44 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
940024 |
1 |
|
|
T41 |
35 |
|
T42 |
83 |
|
T43 |
81 |
auto[1] |
551335 |
1 |
|
|
T41 |
25 |
|
T42 |
17 |
|
T43 |
19 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515452 |
1 |
|
|
T41 |
20 |
|
T42 |
22 |
|
T43 |
53 |
auto[0] |
auto[1] |
276806 |
1 |
|
|
T41 |
16 |
|
T43 |
3 |
|
T44 |
11 |
auto[1] |
auto[0] |
424572 |
1 |
|
|
T41 |
15 |
|
T42 |
61 |
|
T43 |
28 |
auto[1] |
auto[1] |
274529 |
1 |
|
|
T41 |
9 |
|
T42 |
17 |
|
T43 |
16 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793617 |
1 |
|
|
T41 |
20 |
|
T42 |
48 |
|
T43 |
59 |
auto[1] |
697742 |
1 |
|
|
T41 |
40 |
|
T42 |
52 |
|
T43 |
41 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
938318 |
1 |
|
|
T41 |
29 |
|
T42 |
84 |
|
T43 |
76 |
auto[1] |
553041 |
1 |
|
|
T41 |
31 |
|
T42 |
16 |
|
T43 |
24 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515607 |
1 |
|
|
T41 |
8 |
|
T42 |
38 |
|
T43 |
45 |
auto[0] |
auto[1] |
278010 |
1 |
|
|
T41 |
12 |
|
T42 |
10 |
|
T43 |
14 |
auto[1] |
auto[0] |
422711 |
1 |
|
|
T41 |
21 |
|
T42 |
46 |
|
T43 |
31 |
auto[1] |
auto[1] |
275031 |
1 |
|
|
T41 |
19 |
|
T42 |
6 |
|
T43 |
10 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
792301 |
1 |
|
|
T41 |
26 |
|
T42 |
36 |
|
T43 |
24 |
auto[1] |
699058 |
1 |
|
|
T41 |
34 |
|
T42 |
64 |
|
T43 |
76 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
936759 |
1 |
|
|
T41 |
30 |
|
T42 |
84 |
|
T43 |
73 |
auto[1] |
554600 |
1 |
|
|
T41 |
30 |
|
T42 |
16 |
|
T43 |
27 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
513349 |
1 |
|
|
T41 |
16 |
|
T42 |
31 |
|
T43 |
13 |
auto[0] |
auto[1] |
278952 |
1 |
|
|
T41 |
10 |
|
T42 |
5 |
|
T43 |
11 |
auto[1] |
auto[0] |
423410 |
1 |
|
|
T41 |
14 |
|
T42 |
53 |
|
T43 |
60 |
auto[1] |
auto[1] |
275648 |
1 |
|
|
T41 |
20 |
|
T42 |
11 |
|
T43 |
16 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794391 |
1 |
|
|
T41 |
24 |
|
T42 |
78 |
|
T43 |
49 |
auto[1] |
696968 |
1 |
|
|
T41 |
36 |
|
T42 |
22 |
|
T43 |
51 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
939760 |
1 |
|
|
T41 |
36 |
|
T42 |
79 |
|
T43 |
69 |
auto[1] |
551599 |
1 |
|
|
T41 |
24 |
|
T42 |
21 |
|
T43 |
31 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
516180 |
1 |
|
|
T41 |
16 |
|
T42 |
60 |
|
T43 |
35 |
auto[0] |
auto[1] |
278211 |
1 |
|
|
T41 |
8 |
|
T42 |
18 |
|
T43 |
14 |
auto[1] |
auto[0] |
423580 |
1 |
|
|
T41 |
20 |
|
T42 |
19 |
|
T43 |
34 |
auto[1] |
auto[1] |
273388 |
1 |
|
|
T41 |
16 |
|
T42 |
3 |
|
T43 |
17 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794820 |
1 |
|
|
T41 |
22 |
|
T42 |
48 |
|
T43 |
52 |
auto[1] |
696539 |
1 |
|
|
T41 |
38 |
|
T42 |
52 |
|
T43 |
48 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937333 |
1 |
|
|
T41 |
26 |
|
T42 |
74 |
|
T43 |
77 |
auto[1] |
554026 |
1 |
|
|
T41 |
34 |
|
T42 |
26 |
|
T43 |
23 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515780 |
1 |
|
|
T41 |
8 |
|
T42 |
42 |
|
T43 |
41 |
auto[0] |
auto[1] |
279040 |
1 |
|
|
T41 |
14 |
|
T42 |
6 |
|
T43 |
11 |
auto[1] |
auto[0] |
421553 |
1 |
|
|
T41 |
18 |
|
T42 |
32 |
|
T43 |
36 |
auto[1] |
auto[1] |
274986 |
1 |
|
|
T41 |
20 |
|
T42 |
20 |
|
T43 |
12 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
792972 |
1 |
|
|
T41 |
20 |
|
T42 |
38 |
|
T43 |
38 |
auto[1] |
698387 |
1 |
|
|
T41 |
40 |
|
T42 |
62 |
|
T43 |
62 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
937418 |
1 |
|
|
T41 |
27 |
|
T42 |
87 |
|
T43 |
66 |
auto[1] |
553941 |
1 |
|
|
T41 |
33 |
|
T42 |
13 |
|
T43 |
34 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
515008 |
1 |
|
|
T41 |
9 |
|
T42 |
33 |
|
T43 |
21 |
auto[0] |
auto[1] |
277964 |
1 |
|
|
T41 |
11 |
|
T42 |
5 |
|
T43 |
17 |
auto[1] |
auto[0] |
422410 |
1 |
|
|
T41 |
18 |
|
T42 |
54 |
|
T43 |
45 |
auto[1] |
auto[1] |
275977 |
1 |
|
|
T41 |
22 |
|
T42 |
8 |
|
T43 |
17 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794594 |
1 |
|
|
T41 |
20 |
|
T42 |
55 |
|
T43 |
48 |
auto[1] |
696765 |
1 |
|
|
T41 |
40 |
|
T42 |
45 |
|
T43 |
52 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
939880 |
1 |
|
|
T41 |
30 |
|
T42 |
78 |
|
T43 |
74 |
auto[1] |
551479 |
1 |
|
|
T41 |
30 |
|
T42 |
22 |
|
T43 |
26 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
517301 |
1 |
|
|
T41 |
10 |
|
T42 |
44 |
|
T43 |
33 |
auto[0] |
auto[1] |
277293 |
1 |
|
|
T41 |
10 |
|
T42 |
11 |
|
T43 |
15 |
auto[1] |
auto[0] |
422579 |
1 |
|
|
T41 |
20 |
|
T42 |
34 |
|
T43 |
41 |
auto[1] |
auto[1] |
274186 |
1 |
|
|
T41 |
20 |
|
T42 |
11 |
|
T43 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
796338 |
1 |
|
|
T41 |
26 |
|
T42 |
49 |
|
T43 |
40 |
auto[1] |
695021 |
1 |
|
|
T41 |
34 |
|
T42 |
51 |
|
T43 |
60 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
940115 |
1 |
|
|
T41 |
30 |
|
T42 |
88 |
|
T43 |
75 |
auto[1] |
551244 |
1 |
|
|
T41 |
30 |
|
T42 |
12 |
|
T43 |
25 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
518591 |
1 |
|
|
T41 |
14 |
|
T42 |
41 |
|
T43 |
29 |
auto[0] |
auto[1] |
277747 |
1 |
|
|
T41 |
12 |
|
T42 |
8 |
|
T43 |
11 |
auto[1] |
auto[0] |
421524 |
1 |
|
|
T41 |
16 |
|
T42 |
47 |
|
T43 |
46 |
auto[1] |
auto[1] |
273497 |
1 |
|
|
T41 |
18 |
|
T42 |
4 |
|
T43 |
14 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
794383 |
1 |
|
|
T41 |
42 |
|
T42 |
51 |
|
T43 |
60 |
auto[1] |
696976 |
1 |
|
|
T41 |
18 |
|
T42 |
49 |
|
T43 |
40 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
941017 |
1 |
|
|
T41 |
34 |
|
T42 |
75 |
|
T43 |
71 |
auto[1] |
550342 |
1 |
|
|
T41 |
26 |
|
T42 |
25 |
|
T43 |
29 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
516779 |
1 |
|
|
T41 |
23 |
|
T42 |
39 |
|
T43 |
40 |
auto[0] |
auto[1] |
277604 |
1 |
|
|
T41 |
19 |
|
T42 |
12 |
|
T43 |
20 |
auto[1] |
auto[0] |
424238 |
1 |
|
|
T41 |
11 |
|
T42 |
36 |
|
T43 |
31 |
auto[1] |
auto[1] |
272738 |
1 |
|
|
T41 |
7 |
|
T42 |
13 |
|
T43 |
9 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
796266 |
1 |
|
|
T41 |
30 |
|
T42 |
65 |
|
T43 |
51 |
auto[1] |
695093 |
1 |
|
|
T41 |
30 |
|
T42 |
35 |
|
T43 |
49 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
940051 |
1 |
|
|
T41 |
27 |
|
T42 |
86 |
|
T43 |
61 |
auto[1] |
551308 |
1 |
|
|
T41 |
33 |
|
T42 |
14 |
|
T43 |
39 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
518146 |
1 |
|
|
T41 |
15 |
|
T42 |
59 |
|
T43 |
30 |
auto[0] |
auto[1] |
278120 |
1 |
|
|
T41 |
15 |
|
T42 |
6 |
|
T43 |
21 |
auto[1] |
auto[0] |
421905 |
1 |
|
|
T41 |
12 |
|
T42 |
27 |
|
T43 |
31 |
auto[1] |
auto[1] |
273188 |
1 |
|
|
T41 |
18 |
|
T42 |
8 |
|
T43 |
18 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
792312 |
1 |
|
|
T41 |
28 |
|
T42 |
58 |
|
T43 |
39 |
auto[1] |
699047 |
1 |
|
|
T41 |
32 |
|
T42 |
42 |
|
T43 |
61 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
938351 |
1 |
|
|
T41 |
32 |
|
T42 |
82 |
|
T43 |
67 |
auto[1] |
553008 |
1 |
|
|
T41 |
28 |
|
T42 |
18 |
|
T43 |
33 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
514776 |
1 |
|
|
T41 |
16 |
|
T42 |
48 |
|
T43 |
28 |
auto[0] |
auto[1] |
277536 |
1 |
|
|
T41 |
12 |
|
T42 |
10 |
|
T43 |
11 |
auto[1] |
auto[0] |
423575 |
1 |
|
|
T41 |
16 |
|
T42 |
34 |
|
T43 |
39 |
auto[1] |
auto[1] |
275472 |
1 |
|
|
T41 |
16 |
|
T42 |
8 |
|
T43 |
22 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
796414 |
1 |
|
|
T41 |
30 |
|
T42 |
40 |
|
T43 |
38 |
auto[1] |
694945 |
1 |
|
|
T41 |
30 |
|
T42 |
60 |
|
T43 |
62 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
940537 |
1 |
|
|
T41 |
31 |
|
T42 |
89 |
|
T43 |
65 |
auto[1] |
550822 |
1 |
|
|
T41 |
29 |
|
T42 |
11 |
|
T43 |
35 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
517657 |
1 |
|
|
T41 |
16 |
|
T42 |
34 |
|
T43 |
27 |
auto[0] |
auto[1] |
278757 |
1 |
|
|
T41 |
14 |
|
T42 |
6 |
|
T43 |
11 |
auto[1] |
auto[0] |
422880 |
1 |
|
|
T41 |
15 |
|
T42 |
55 |
|
T43 |
38 |
auto[1] |
auto[1] |
272065 |
1 |
|
|
T41 |
15 |
|
T42 |
5 |
|
T43 |
24 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
793738 |
1 |
|
|
T41 |
30 |
|
T42 |
49 |
|
T43 |
65 |
auto[1] |
697621 |
1 |
|
|
T41 |
30 |
|
T42 |
51 |
|
T43 |
35 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
939259 |
1 |
|
|
T41 |
32 |
|
T42 |
76 |
|
T43 |
69 |
auto[1] |
552100 |
1 |
|
|
T41 |
28 |
|
T42 |
24 |
|
T43 |
31 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
516702 |
1 |
|
|
T41 |
17 |
|
T42 |
40 |
|
T43 |
45 |
auto[0] |
auto[1] |
277036 |
1 |
|
|
T41 |
13 |
|
T42 |
9 |
|
T43 |
20 |
auto[1] |
auto[0] |
422557 |
1 |
|
|
T41 |
15 |
|
T42 |
36 |
|
T43 |
24 |
auto[1] |
auto[1] |
275064 |
1 |
|
|
T41 |
15 |
|
T42 |
15 |
|
T43 |
11 |