cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50762 |
1 |
|
|
T32 |
196 |
|
T115 |
573 |
|
T116 |
673 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48747 |
1 |
|
|
T32 |
1371 |
|
T115 |
345 |
|
T116 |
693 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47653 |
1 |
|
|
T32 |
214 |
|
T115 |
493 |
|
T116 |
1266 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41759 |
1 |
|
|
T32 |
174 |
|
T115 |
980 |
|
T116 |
1106 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1118 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1069 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1042 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1058 |
1 |
|
|
T32 |
8 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1021 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1030 |
1 |
|
|
T32 |
8 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56931 |
1 |
|
|
T32 |
209 |
|
T115 |
253 |
|
T116 |
838 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45498 |
1 |
|
|
T32 |
1320 |
|
T115 |
1138 |
|
T116 |
1348 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49912 |
1 |
|
|
T32 |
238 |
|
T115 |
452 |
|
T116 |
906 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
35742 |
1 |
|
|
T32 |
192 |
|
T115 |
334 |
|
T116 |
589 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T32 |
8 |
|
T115 |
23 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T32 |
7 |
|
T115 |
24 |
|
T116 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T32 |
8 |
|
T115 |
23 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T32 |
7 |
|
T115 |
24 |
|
T116 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T32 |
8 |
|
T115 |
22 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T32 |
8 |
|
T115 |
24 |
|
T116 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
8 |
|
T115 |
24 |
|
T116 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T32 |
8 |
|
T115 |
22 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T32 |
8 |
|
T115 |
24 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T32 |
8 |
|
T115 |
24 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T32 |
8 |
|
T115 |
23 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
8 |
|
T115 |
20 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T32 |
6 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T32 |
6 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1094 |
1 |
|
|
T32 |
8 |
|
T115 |
16 |
|
T116 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T32 |
6 |
|
T115 |
18 |
|
T116 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1069 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T32 |
6 |
|
T115 |
18 |
|
T116 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1046 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1075 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1010 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55080 |
1 |
|
|
T32 |
1464 |
|
T115 |
363 |
|
T116 |
919 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41015 |
1 |
|
|
T32 |
57 |
|
T115 |
1375 |
|
T116 |
1237 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
46586 |
1 |
|
|
T32 |
282 |
|
T115 |
247 |
|
T116 |
631 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44411 |
1 |
|
|
T32 |
167 |
|
T115 |
268 |
|
T116 |
677 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T32 |
5 |
|
T115 |
23 |
|
T116 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T32 |
7 |
|
T115 |
23 |
|
T116 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T32 |
5 |
|
T115 |
21 |
|
T116 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T32 |
7 |
|
T115 |
23 |
|
T116 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T32 |
5 |
|
T115 |
21 |
|
T116 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T32 |
7 |
|
T115 |
22 |
|
T116 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T32 |
5 |
|
T115 |
21 |
|
T116 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T32 |
7 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T32 |
4 |
|
T115 |
21 |
|
T116 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T32 |
3 |
|
T115 |
21 |
|
T116 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T32 |
7 |
|
T115 |
17 |
|
T116 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T32 |
3 |
|
T115 |
21 |
|
T116 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
3 |
|
T115 |
21 |
|
T116 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T32 |
7 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T32 |
3 |
|
T115 |
21 |
|
T116 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T32 |
7 |
|
T115 |
15 |
|
T116 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T32 |
3 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T32 |
2 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T32 |
2 |
|
T115 |
21 |
|
T116 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T32 |
2 |
|
T115 |
21 |
|
T116 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T32 |
2 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T32 |
2 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1073 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
24 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57285 |
1 |
|
|
T32 |
1539 |
|
T115 |
1112 |
|
T116 |
659 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38887 |
1 |
|
|
T32 |
92 |
|
T115 |
265 |
|
T116 |
736 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53801 |
1 |
|
|
T32 |
177 |
|
T115 |
557 |
|
T116 |
1317 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38770 |
1 |
|
|
T32 |
190 |
|
T115 |
479 |
|
T116 |
808 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1074 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1047 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1024 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47197 |
1 |
|
|
T32 |
222 |
|
T115 |
329 |
|
T116 |
829 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42078 |
1 |
|
|
T32 |
190 |
|
T115 |
284 |
|
T116 |
1191 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53589 |
1 |
|
|
T32 |
1484 |
|
T115 |
802 |
|
T116 |
1080 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44252 |
1 |
|
|
T32 |
81 |
|
T115 |
964 |
|
T116 |
521 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
584 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
584 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
584 |
1 |
|
|
T32 |
2 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48290 |
1 |
|
|
T32 |
242 |
|
T115 |
1219 |
|
T116 |
821 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43981 |
1 |
|
|
T32 |
126 |
|
T115 |
280 |
|
T116 |
1242 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55697 |
1 |
|
|
T32 |
1407 |
|
T115 |
476 |
|
T116 |
859 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40617 |
1 |
|
|
T32 |
164 |
|
T115 |
308 |
|
T116 |
573 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T32 |
6 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T32 |
6 |
|
T115 |
20 |
|
T116 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T32 |
7 |
|
T115 |
18 |
|
T116 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1085 |
1 |
|
|
T32 |
3 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1079 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1047 |
1 |
|
|
T32 |
2 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1062 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1014 |
1 |
|
|
T32 |
2 |
|
T115 |
10 |
|
T116 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1030 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
22 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50160 |
1 |
|
|
T32 |
1463 |
|
T115 |
1311 |
|
T116 |
559 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41893 |
1 |
|
|
T32 |
181 |
|
T115 |
362 |
|
T116 |
759 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57897 |
1 |
|
|
T32 |
158 |
|
T115 |
489 |
|
T116 |
1428 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38309 |
1 |
|
|
T32 |
161 |
|
T115 |
273 |
|
T116 |
717 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1066 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T32 |
6 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
4 |
|
T115 |
5 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1039 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1037 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57160 |
1 |
|
|
T32 |
278 |
|
T115 |
283 |
|
T116 |
864 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37042 |
1 |
|
|
T32 |
177 |
|
T115 |
166 |
|
T116 |
799 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50939 |
1 |
|
|
T32 |
153 |
|
T115 |
1703 |
|
T116 |
849 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42482 |
1 |
|
|
T32 |
1349 |
|
T115 |
366 |
|
T116 |
1112 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T32 |
9 |
|
T115 |
9 |
|
T116 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T32 |
9 |
|
T115 |
9 |
|
T116 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T32 |
9 |
|
T115 |
8 |
|
T116 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T32 |
9 |
|
T115 |
8 |
|
T116 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T32 |
9 |
|
T115 |
8 |
|
T116 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T32 |
8 |
|
T115 |
7 |
|
T116 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T32 |
8 |
|
T115 |
7 |
|
T116 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1113 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1084 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1090 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T32 |
8 |
|
T115 |
6 |
|
T116 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1059 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
21 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47378 |
1 |
|
|
T32 |
246 |
|
T115 |
368 |
|
T116 |
1180 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43588 |
1 |
|
|
T32 |
195 |
|
T115 |
1210 |
|
T116 |
416 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51286 |
1 |
|
|
T32 |
1345 |
|
T115 |
498 |
|
T116 |
1256 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45112 |
1 |
|
|
T32 |
172 |
|
T115 |
305 |
|
T116 |
944 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T32 |
8 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
8 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T32 |
8 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T32 |
7 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T32 |
7 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48929 |
1 |
|
|
T32 |
96 |
|
T115 |
312 |
|
T116 |
593 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47007 |
1 |
|
|
T32 |
1377 |
|
T115 |
1101 |
|
T116 |
572 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47540 |
1 |
|
|
T32 |
451 |
|
T115 |
587 |
|
T116 |
771 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44407 |
1 |
|
|
T32 |
143 |
|
T115 |
361 |
|
T116 |
1528 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
562 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
574 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
562 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
574 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
561 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
572 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
561 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
572 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
557 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
567 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
557 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
567 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
557 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
558 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
557 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
558 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
556 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
556 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
555 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
555 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
555 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
554 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
555 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
553 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
555 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
32 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53153 |
1 |
|
|
T32 |
1496 |
|
T115 |
593 |
|
T116 |
947 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41436 |
1 |
|
|
T32 |
87 |
|
T115 |
962 |
|
T116 |
1000 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53827 |
1 |
|
|
T32 |
361 |
|
T115 |
625 |
|
T116 |
1403 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40530 |
1 |
|
|
T32 |
58 |
|
T115 |
174 |
|
T116 |
437 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T32 |
2 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T32 |
1 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T32 |
1 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T32 |
1 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T32 |
1 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T32 |
1 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T32 |
1 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T32 |
1 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1074 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1044 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1044 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1018 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51496 |
1 |
|
|
T32 |
282 |
|
T115 |
1226 |
|
T116 |
1573 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41557 |
1 |
|
|
T32 |
87 |
|
T115 |
303 |
|
T116 |
511 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49309 |
1 |
|
|
T32 |
1528 |
|
T115 |
354 |
|
T116 |
718 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45468 |
1 |
|
|
T32 |
112 |
|
T115 |
466 |
|
T116 |
872 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
3 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T32 |
3 |
|
T115 |
10 |
|
T116 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1089 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1057 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1068 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1038 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58079 |
1 |
|
|
T32 |
177 |
|
T115 |
478 |
|
T116 |
898 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
33862 |
1 |
|
|
T32 |
93 |
|
T115 |
352 |
|
T116 |
1042 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55935 |
1 |
|
|
T32 |
1555 |
|
T115 |
371 |
|
T116 |
900 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40338 |
1 |
|
|
T32 |
122 |
|
T115 |
1069 |
|
T116 |
684 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T32 |
7 |
|
T115 |
21 |
|
T116 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T32 |
6 |
|
T115 |
20 |
|
T116 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T32 |
7 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T32 |
7 |
|
T115 |
20 |
|
T116 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T32 |
7 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1054 |
1 |
|
|
T32 |
4 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1021 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
990 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1069 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
956 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1043 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52917 |
1 |
|
|
T32 |
321 |
|
T115 |
299 |
|
T116 |
1055 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36496 |
1 |
|
|
T32 |
48 |
|
T115 |
406 |
|
T116 |
1272 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56820 |
1 |
|
|
T32 |
1603 |
|
T115 |
1312 |
|
T116 |
1010 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43080 |
1 |
|
|
T32 |
20 |
|
T115 |
451 |
|
T116 |
421 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T32 |
3 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
7 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T32 |
2 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T32 |
2 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1074 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T32 |
2 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1045 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1053 |
1 |
|
|
T32 |
2 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
6 |
|
T115 |
3 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1023 |
1 |
|
|
T32 |
3 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1023 |
1 |
|
|
T32 |
1 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53579 |
1 |
|
|
T32 |
75 |
|
T115 |
349 |
|
T116 |
1005 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41634 |
1 |
|
|
T32 |
158 |
|
T115 |
1296 |
|
T116 |
823 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54602 |
1 |
|
|
T32 |
144 |
|
T115 |
236 |
|
T116 |
785 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37981 |
1 |
|
|
T32 |
1556 |
|
T115 |
351 |
|
T116 |
997 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T32 |
11 |
|
T115 |
23 |
|
T116 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T32 |
11 |
|
T115 |
23 |
|
T116 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T32 |
11 |
|
T115 |
23 |
|
T116 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T32 |
11 |
|
T115 |
23 |
|
T116 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T32 |
2 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T32 |
8 |
|
T115 |
21 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
594 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T32 |
11 |
|
T115 |
20 |
|
T116 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T32 |
8 |
|
T115 |
20 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
592 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T32 |
11 |
|
T115 |
19 |
|
T116 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T32 |
8 |
|
T115 |
20 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
592 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T32 |
6 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1132 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T32 |
6 |
|
T115 |
17 |
|
T116 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1058 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
589 |
1 |
|
|
T32 |
1 |
|
T115 |
4 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T32 |
9 |
|
T115 |
15 |
|
T116 |
18 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47347 |
1 |
|
|
T32 |
78 |
|
T115 |
373 |
|
T116 |
1686 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48749 |
1 |
|
|
T32 |
1428 |
|
T115 |
276 |
|
T116 |
413 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51585 |
1 |
|
|
T32 |
227 |
|
T115 |
1565 |
|
T116 |
1288 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40736 |
1 |
|
|
T32 |
169 |
|
T115 |
173 |
|
T116 |
464 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T32 |
12 |
|
T115 |
13 |
|
T116 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T32 |
12 |
|
T115 |
13 |
|
T116 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T32 |
10 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T32 |
10 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T32 |
9 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T32 |
9 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1068 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1071 |
1 |
|
|
T32 |
9 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1040 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1053 |
1 |
|
|
T32 |
9 |
|
T115 |
7 |
|
T116 |
17 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54595 |
1 |
|
|
T32 |
1507 |
|
T115 |
437 |
|
T116 |
1062 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45091 |
1 |
|
|
T32 |
133 |
|
T115 |
1214 |
|
T116 |
911 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
44724 |
1 |
|
|
T32 |
263 |
|
T115 |
355 |
|
T116 |
553 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44056 |
1 |
|
|
T32 |
83 |
|
T115 |
363 |
|
T116 |
1176 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
594 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
593 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
614 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
588 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
588 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T32 |
5 |
|
T115 |
14 |
|
T116 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
588 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
588 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1091 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1078 |
1 |
|
|
T32 |
5 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
5 |
|
T115 |
5 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1066 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51898 |
1 |
|
|
T32 |
362 |
|
T115 |
1267 |
|
T116 |
1226 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45264 |
1 |
|
|
T32 |
116 |
|
T115 |
289 |
|
T116 |
440 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
47578 |
1 |
|
|
T32 |
57 |
|
T115 |
564 |
|
T116 |
1649 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42329 |
1 |
|
|
T32 |
1405 |
|
T115 |
251 |
|
T116 |
415 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T32 |
10 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T32 |
9 |
|
T115 |
10 |
|
T116 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1061 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1068 |
1 |
|
|
T32 |
9 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52864 |
1 |
|
|
T32 |
139 |
|
T115 |
483 |
|
T116 |
1083 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48717 |
1 |
|
|
T32 |
45 |
|
T115 |
1166 |
|
T116 |
777 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
41380 |
1 |
|
|
T32 |
1701 |
|
T115 |
329 |
|
T116 |
650 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44007 |
1 |
|
|
T32 |
120 |
|
T115 |
344 |
|
T116 |
1065 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
599 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
604 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
592 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
586 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
593 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T32 |
3 |
|
T115 |
15 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T32 |
3 |
|
T115 |
14 |
|
T116 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T32 |
3 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
585 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T32 |
2 |
|
T115 |
14 |
|
T116 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T32 |
4 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54607 |
1 |
|
|
T32 |
21 |
|
T115 |
1191 |
|
T116 |
1702 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40784 |
1 |
|
|
T32 |
1473 |
|
T115 |
301 |
|
T116 |
650 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54160 |
1 |
|
|
T32 |
124 |
|
T115 |
482 |
|
T116 |
855 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37794 |
1 |
|
|
T32 |
293 |
|
T115 |
359 |
|
T116 |
516 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
1 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T32 |
12 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T32 |
12 |
|
T115 |
15 |
|
T116 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
1 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T32 |
12 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T32 |
12 |
|
T115 |
15 |
|
T116 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
1 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T32 |
12 |
|
T115 |
13 |
|
T116 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T32 |
13 |
|
T115 |
15 |
|
T116 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
1 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T32 |
12 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T32 |
13 |
|
T115 |
14 |
|
T116 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T32 |
13 |
|
T115 |
14 |
|
T116 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T32 |
13 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T32 |
11 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1108 |
1 |
|
|
T32 |
11 |
|
T115 |
10 |
|
T116 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1100 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
1 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1079 |
1 |
|
|
T32 |
11 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T115 |
8 |
|
T116 |
10 |
|
T117 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1066 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
22 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56254 |
1 |
|
|
T32 |
129 |
|
T115 |
545 |
|
T116 |
1457 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44763 |
1 |
|
|
T32 |
195 |
|
T115 |
302 |
|
T116 |
653 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52884 |
1 |
|
|
T32 |
1429 |
|
T115 |
1136 |
|
T116 |
899 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
34935 |
1 |
|
|
T32 |
150 |
|
T115 |
377 |
|
T116 |
677 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T32 |
14 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
4 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T32 |
11 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T32 |
14 |
|
T115 |
20 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T32 |
4 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T32 |
11 |
|
T115 |
21 |
|
T116 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
13 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T32 |
12 |
|
T115 |
21 |
|
T116 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T32 |
13 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T32 |
12 |
|
T115 |
20 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T32 |
13 |
|
T115 |
19 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T32 |
12 |
|
T115 |
20 |
|
T116 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T32 |
11 |
|
T115 |
19 |
|
T116 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
11 |
|
T115 |
19 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
610 |
1 |
|
|
T115 |
3 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T32 |
11 |
|
T115 |
17 |
|
T116 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T32 |
11 |
|
T115 |
17 |
|
T116 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T32 |
11 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T32 |
10 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T32 |
10 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
602 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T32 |
10 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T32 |
9 |
|
T115 |
18 |
|
T116 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1109 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T32 |
7 |
|
T115 |
17 |
|
T116 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
601 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1082 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1062 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T115 |
2 |
|
T116 |
9 |
|
T117 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
3 |
|
T115 |
3 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1027 |
1 |
|
|
T32 |
7 |
|
T115 |
15 |
|
T116 |
25 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54328 |
1 |
|
|
T32 |
230 |
|
T115 |
449 |
|
T116 |
1251 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39860 |
1 |
|
|
T32 |
175 |
|
T115 |
347 |
|
T116 |
850 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54962 |
1 |
|
|
T32 |
1383 |
|
T115 |
512 |
|
T116 |
708 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39203 |
1 |
|
|
T32 |
132 |
|
T115 |
1049 |
|
T116 |
674 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1102 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1047 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1068 |
1 |
|
|
T32 |
5 |
|
T115 |
9 |
|
T116 |
25 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53219 |
1 |
|
|
T32 |
1485 |
|
T115 |
338 |
|
T116 |
801 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43204 |
1 |
|
|
T32 |
160 |
|
T115 |
409 |
|
T116 |
1292 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51742 |
1 |
|
|
T32 |
128 |
|
T115 |
497 |
|
T116 |
608 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39485 |
1 |
|
|
T32 |
185 |
|
T115 |
1162 |
|
T116 |
682 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1088 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T32 |
7 |
|
T115 |
12 |
|
T116 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1059 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T115 |
7 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1027 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
23 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50777 |
1 |
|
|
T32 |
354 |
|
T115 |
452 |
|
T116 |
1076 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40660 |
1 |
|
|
T32 |
68 |
|
T115 |
359 |
|
T116 |
341 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51076 |
1 |
|
|
T32 |
163 |
|
T115 |
516 |
|
T116 |
1002 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45508 |
1 |
|
|
T32 |
1444 |
|
T115 |
1030 |
|
T116 |
1221 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
608 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T32 |
4 |
|
T115 |
7 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T32 |
6 |
|
T115 |
15 |
|
T116 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
603 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
595 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
595 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T32 |
5 |
|
T115 |
13 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T32 |
4 |
|
T115 |
14 |
|
T116 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
592 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
592 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
606 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
605 |
1 |
|
|
T32 |
4 |
|
T115 |
6 |
|
T116 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1054 |
1 |
|
|
T32 |
3 |
|
T115 |
13 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
591 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T32 |
5 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49730 |
1 |
|
|
T32 |
237 |
|
T115 |
513 |
|
T116 |
866 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44964 |
1 |
|
|
T32 |
208 |
|
T115 |
933 |
|
T116 |
1213 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
45425 |
1 |
|
|
T32 |
84 |
|
T115 |
775 |
|
T116 |
862 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47550 |
1 |
|
|
T32 |
1449 |
|
T115 |
200 |
|
T116 |
723 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
4 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T32 |
7 |
|
T115 |
7 |
|
T116 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
616 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T32 |
6 |
|
T115 |
7 |
|
T116 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1093 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1065 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
18 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T32 |
3 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1026 |
1 |
|
|
T32 |
6 |
|
T115 |
5 |
|
T116 |
24 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48474 |
1 |
|
|
T32 |
290 |
|
T115 |
482 |
|
T116 |
996 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39175 |
1 |
|
|
T32 |
171 |
|
T115 |
204 |
|
T116 |
350 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56340 |
1 |
|
|
T32 |
149 |
|
T115 |
1450 |
|
T116 |
1064 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44635 |
1 |
|
|
T32 |
1302 |
|
T115 |
242 |
|
T116 |
1166 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
5 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
3 |
|
T115 |
9 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T32 |
10 |
|
T115 |
12 |
|
T116 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T32 |
9 |
|
T115 |
11 |
|
T116 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T32 |
7 |
|
T115 |
10 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1066 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1039 |
1 |
|
|
T32 |
8 |
|
T115 |
10 |
|
T116 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1128 |
1 |
|
|
T32 |
7 |
|
T115 |
9 |
|
T116 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T32 |
3 |
|
T115 |
8 |
|
T116 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1002 |
1 |
|
|
T32 |
8 |
|
T115 |
9 |
|
T116 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
4 |
|
T115 |
10 |
|
T116 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
23 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53265 |
1 |
|
|
T32 |
89 |
|
T115 |
1365 |
|
T116 |
1043 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38256 |
1 |
|
|
T32 |
1382 |
|
T115 |
360 |
|
T116 |
602 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54135 |
1 |
|
|
T32 |
136 |
|
T115 |
230 |
|
T116 |
1567 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44530 |
1 |
|
|
T32 |
351 |
|
T115 |
397 |
|
T116 |
657 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T32 |
9 |
|
T115 |
16 |
|
T116 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T32 |
9 |
|
T115 |
16 |
|
T116 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T32 |
10 |
|
T115 |
16 |
|
T116 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T32 |
9 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T32 |
9 |
|
T115 |
14 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1107 |
1 |
|
|
T32 |
8 |
|
T115 |
12 |
|
T116 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1068 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1045 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1053 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1019 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1028 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
991 |
1 |
|
|
T32 |
8 |
|
T115 |
11 |
|
T116 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T115 |
9 |
|
T116 |
12 |
|
T117 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1004 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
2 |
|
T115 |
6 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
972 |
1 |
|
|
T32 |
8 |
|
T115 |
9 |
|
T116 |
18 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53450 |
1 |
|
|
T32 |
92 |
|
T115 |
572 |
|
T116 |
650 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42645 |
1 |
|
|
T32 |
1549 |
|
T115 |
1060 |
|
T116 |
665 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49645 |
1 |
|
|
T32 |
27 |
|
T115 |
433 |
|
T116 |
1353 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41439 |
1 |
|
|
T32 |
277 |
|
T115 |
340 |
|
T116 |
636 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T115 |
11 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T32 |
11 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T115 |
11 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T32 |
2 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T115 |
11 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T115 |
11 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T32 |
10 |
|
T115 |
13 |
|
T116 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T32 |
9 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T32 |
8 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T32 |
13 |
|
T115 |
10 |
|
T116 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T32 |
13 |
|
T115 |
9 |
|
T116 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T32 |
6 |
|
T115 |
13 |
|
T116 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T32 |
6 |
|
T115 |
11 |
|
T116 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T32 |
6 |
|
T115 |
10 |
|
T116 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1090 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T115 |
10 |
|
T116 |
17 |
|
T117 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1063 |
1 |
|
|
T32 |
13 |
|
T115 |
8 |
|
T116 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T32 |
1 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1084 |
1 |
|
|
T32 |
6 |
|
T115 |
9 |
|
T116 |
27 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53434 |
1 |
|
|
T32 |
230 |
|
T115 |
406 |
|
T116 |
1321 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39147 |
1 |
|
|
T32 |
1369 |
|
T115 |
270 |
|
T116 |
617 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50080 |
1 |
|
|
T32 |
142 |
|
T115 |
465 |
|
T116 |
1010 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44900 |
1 |
|
|
T32 |
191 |
|
T115 |
1153 |
|
T116 |
598 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T32 |
9 |
|
T115 |
17 |
|
T116 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T32 |
10 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T32 |
9 |
|
T115 |
16 |
|
T116 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T32 |
10 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T32 |
8 |
|
T115 |
16 |
|
T116 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
4 |
|
T115 |
9 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T32 |
9 |
|
T115 |
20 |
|
T116 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T32 |
9 |
|
T115 |
20 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T32 |
7 |
|
T115 |
16 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
610 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T32 |
9 |
|
T115 |
20 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
9 |
|
T115 |
19 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T32 |
7 |
|
T115 |
13 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
600 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T32 |
9 |
|
T115 |
19 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T32 |
9 |
|
T115 |
19 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
597 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T32 |
9 |
|
T115 |
19 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T32 |
9 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T32 |
9 |
|
T115 |
18 |
|
T116 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1068 |
1 |
|
|
T32 |
7 |
|
T115 |
11 |
|
T116 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
596 |
1 |
|
|
T32 |
2 |
|
T115 |
5 |
|
T116 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T32 |
7 |
|
T115 |
18 |
|
T116 |
23 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54138 |
1 |
|
|
T32 |
162 |
|
T115 |
337 |
|
T116 |
1482 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39863 |
1 |
|
|
T32 |
1412 |
|
T115 |
1206 |
|
T116 |
524 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53378 |
1 |
|
|
T32 |
130 |
|
T115 |
361 |
|
T116 |
1412 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42076 |
1 |
|
|
T32 |
205 |
|
T115 |
355 |
|
T116 |
321 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
13 |
|
T115 |
22 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T32 |
11 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T32 |
13 |
|
T115 |
22 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T32 |
11 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T32 |
11 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T32 |
11 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T32 |
11 |
|
T115 |
19 |
|
T116 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T32 |
10 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T32 |
1 |
|
T115 |
5 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T32 |
9 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T32 |
9 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T32 |
11 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T32 |
11 |
|
T115 |
16 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T32 |
9 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T32 |
11 |
|
T115 |
15 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T32 |
9 |
|
T115 |
20 |
|
T116 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T32 |
9 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1095 |
1 |
|
|
T32 |
11 |
|
T115 |
14 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1067 |
1 |
|
|
T32 |
9 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1038 |
1 |
|
|
T32 |
9 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1048 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
3 |
|
T115 |
5 |
|
T116 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1013 |
1 |
|
|
T32 |
8 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T115 |
5 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1023 |
1 |
|
|
T32 |
10 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54835 |
1 |
|
|
T32 |
1397 |
|
T115 |
279 |
|
T116 |
1056 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40954 |
1 |
|
|
T32 |
152 |
|
T115 |
410 |
|
T116 |
1079 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52271 |
1 |
|
|
T32 |
328 |
|
T115 |
447 |
|
T116 |
887 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39547 |
1 |
|
|
T32 |
98 |
|
T115 |
1154 |
|
T116 |
668 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T32 |
4 |
|
T115 |
20 |
|
T116 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T32 |
4 |
|
T115 |
19 |
|
T116 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T32 |
4 |
|
T115 |
19 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T32 |
5 |
|
T115 |
7 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T32 |
4 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T32 |
4 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T32 |
5 |
|
T115 |
19 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T32 |
4 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T32 |
5 |
|
T115 |
18 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T32 |
5 |
|
T115 |
17 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T32 |
5 |
|
T115 |
16 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
4 |
|
T115 |
17 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T32 |
5 |
|
T115 |
15 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T32 |
4 |
|
T115 |
16 |
|
T116 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1107 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T32 |
5 |
|
T115 |
6 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1074 |
1 |
|
|
T32 |
4 |
|
T115 |
15 |
|
T116 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
625 |
1 |
|
|
T32 |
6 |
|
T115 |
6 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1050 |
1 |
|
|
T32 |
4 |
|
T115 |
13 |
|
T116 |
20 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
47677 |
1 |
|
|
T32 |
158 |
|
T115 |
411 |
|
T116 |
703 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41872 |
1 |
|
|
T32 |
1431 |
|
T115 |
204 |
|
T116 |
1351 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56683 |
1 |
|
|
T32 |
180 |
|
T115 |
1462 |
|
T116 |
497 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41067 |
1 |
|
|
T32 |
107 |
|
T115 |
316 |
|
T116 |
855 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T32 |
12 |
|
T115 |
16 |
|
T116 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T32 |
10 |
|
T115 |
15 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T32 |
12 |
|
T115 |
16 |
|
T116 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T32 |
9 |
|
T115 |
15 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T32 |
12 |
|
T115 |
14 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T32 |
9 |
|
T115 |
15 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T32 |
12 |
|
T115 |
12 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T32 |
12 |
|
T115 |
11 |
|
T116 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T32 |
11 |
|
T115 |
11 |
|
T116 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T32 |
5 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T32 |
11 |
|
T115 |
11 |
|
T116 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T32 |
8 |
|
T115 |
15 |
|
T116 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T32 |
3 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T32 |
11 |
|
T115 |
11 |
|
T116 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
605 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T32 |
8 |
|
T115 |
14 |
|
T116 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T32 |
11 |
|
T115 |
10 |
|
T116 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T32 |
11 |
|
T115 |
8 |
|
T116 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T32 |
11 |
|
T115 |
7 |
|
T116 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T32 |
11 |
|
T115 |
7 |
|
T116 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T32 |
7 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T32 |
11 |
|
T115 |
7 |
|
T116 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1092 |
1 |
|
|
T32 |
11 |
|
T115 |
7 |
|
T116 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T32 |
3 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1056 |
1 |
|
|
T32 |
11 |
|
T115 |
7 |
|
T116 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T32 |
4 |
|
T115 |
8 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1109 |
1 |
|
|
T32 |
6 |
|
T115 |
14 |
|
T116 |
33 |