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Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 704084 1 T26 90 T27 65 T28 22
auto[1] 627534 1 T26 98 T27 49 T28 20



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832124 1 T26 102 T27 85 T28 16
auto[1] 499494 1 T26 86 T27 29 T28 26



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 454014 1 T26 48 T27 44 T28 11
auto[0] auto[1] 250070 1 T26 42 T27 21 T28 11
auto[1] auto[0] 378110 1 T26 54 T27 41 T28 5
auto[1] auto[1] 249424 1 T26 44 T27 8 T28 15


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 708604 1 T26 86 T27 56 T28 20
auto[1] 623014 1 T26 102 T27 58 T28 22



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 830865 1 T26 89 T27 66 T28 28
auto[1] 500753 1 T26 99 T27 48 T28 14



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 456165 1 T26 36 T27 37 T28 15
auto[0] auto[1] 252439 1 T26 50 T27 19 T28 5
auto[1] auto[0] 374700 1 T26 53 T27 29 T28 13
auto[1] auto[1] 248314 1 T26 49 T27 29 T28 9


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706960 1 T26 102 T27 63 T28 28
auto[1] 624658 1 T26 86 T27 51 T28 14



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 830936 1 T26 109 T27 89 T28 23
auto[1] 500682 1 T26 79 T27 25 T28 19



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455485 1 T26 60 T27 53 T28 14
auto[0] auto[1] 251475 1 T26 42 T27 10 T28 14
auto[1] auto[0] 375451 1 T26 49 T27 36 T28 9
auto[1] auto[1] 249207 1 T26 37 T27 15 T28 5


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706331 1 T26 92 T27 50 T28 18
auto[1] 625287 1 T26 96 T27 64 T28 24



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 831778 1 T26 93 T27 72 T28 19
auto[1] 499840 1 T26 95 T27 42 T28 23



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 454837 1 T26 39 T27 36 T28 7
auto[0] auto[1] 251494 1 T26 53 T27 14 T28 11
auto[1] auto[0] 376941 1 T26 54 T27 36 T28 12
auto[1] auto[1] 248346 1 T26 42 T27 28 T28 12


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 705941 1 T26 90 T27 67 T28 14
auto[1] 625677 1 T26 98 T27 47 T28 28



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832124 1 T26 86 T27 83 T28 20
auto[1] 499494 1 T26 102 T27 31 T28 22



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455311 1 T26 43 T27 46 T28 5
auto[0] auto[1] 250630 1 T26 47 T27 21 T28 9
auto[1] auto[0] 376813 1 T26 43 T27 37 T28 15
auto[1] auto[1] 248864 1 T26 55 T27 10 T28 13


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 705768 1 T26 96 T27 46 T28 28
auto[1] 625850 1 T26 92 T27 68 T28 14



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832307 1 T26 108 T27 86 T28 25
auto[1] 499311 1 T26 80 T27 28 T28 17



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 454811 1 T26 53 T27 29 T28 15
auto[0] auto[1] 250957 1 T26 43 T27 17 T28 13
auto[1] auto[0] 377496 1 T26 55 T27 57 T28 10
auto[1] auto[1] 248354 1 T26 37 T27 11 T28 4


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 705247 1 T26 88 T27 48 T28 8
auto[1] 626371 1 T26 100 T27 66 T28 34



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 831817 1 T26 102 T27 78 T28 22
auto[1] 499801 1 T26 86 T27 36 T28 20



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 453626 1 T26 54 T27 27 T28 3
auto[0] auto[1] 251621 1 T26 34 T27 21 T28 5
auto[1] auto[0] 378191 1 T26 48 T27 51 T28 19
auto[1] auto[1] 248180 1 T26 52 T27 15 T28 15


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 708234 1 T26 74 T27 54 T28 26
auto[1] 623384 1 T26 114 T27 60 T28 16



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832289 1 T26 89 T27 71 T28 15
auto[1] 499329 1 T26 99 T27 43 T28 27



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 456687 1 T26 27 T27 36 T28 10
auto[0] auto[1] 251547 1 T26 47 T27 18 T28 16
auto[1] auto[0] 375602 1 T26 62 T27 35 T28 5
auto[1] auto[1] 247782 1 T26 52 T27 25 T28 11


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706217 1 T26 94 T27 61 T28 26
auto[1] 625401 1 T26 94 T27 53 T28 16



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 836362 1 T26 98 T27 88 T28 20
auto[1] 495256 1 T26 90 T27 26 T28 22



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 457255 1 T26 49 T27 49 T28 14
auto[0] auto[1] 248962 1 T26 45 T27 12 T28 12
auto[1] auto[0] 379107 1 T26 49 T27 39 T28 6
auto[1] auto[1] 246294 1 T26 45 T27 14 T28 10


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 710543 1 T26 94 T27 51 T28 22
auto[1] 621075 1 T26 94 T27 63 T28 20



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832707 1 T26 103 T27 77 T28 19
auto[1] 498911 1 T26 85 T27 37 T28 23



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 458278 1 T26 52 T27 33 T28 11
auto[0] auto[1] 252265 1 T26 42 T27 18 T28 11
auto[1] auto[0] 374429 1 T26 51 T27 44 T28 8
auto[1] auto[1] 246646 1 T26 43 T27 19 T28 12


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 707858 1 T26 86 T27 65 T28 26
auto[1] 623760 1 T26 102 T27 49 T28 16



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 834666 1 T26 89 T27 82 T28 31
auto[1] 496952 1 T26 99 T27 32 T28 11



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 457374 1 T26 43 T27 39 T28 22
auto[0] auto[1] 250484 1 T26 43 T27 26 T28 4
auto[1] auto[0] 377292 1 T26 46 T27 43 T28 9
auto[1] auto[1] 246468 1 T26 56 T27 6 T28 7


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 709147 1 T26 96 T27 53 T28 16
auto[1] 622471 1 T26 92 T27 61 T28 26



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 835260 1 T26 97 T27 84 T28 18
auto[1] 496358 1 T26 91 T27 30 T28 24



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 458206 1 T26 51 T27 39 T28 7
auto[0] auto[1] 250941 1 T26 45 T27 14 T28 9
auto[1] auto[0] 377054 1 T26 46 T27 45 T28 11
auto[1] auto[1] 245417 1 T26 46 T27 16 T28 15


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706008 1 T26 86 T27 60 T28 24
auto[1] 625610 1 T26 102 T27 54 T28 18



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 832313 1 T26 86 T27 75 T28 20
auto[1] 499305 1 T26 102 T27 39 T28 22



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455332 1 T26 41 T27 40 T28 9
auto[0] auto[1] 250676 1 T26 45 T27 20 T28 15
auto[1] auto[0] 376981 1 T26 45 T27 35 T28 11
auto[1] auto[1] 248629 1 T26 57 T27 19 T28 7


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 710833 1 T26 98 T27 65 T28 20
auto[1] 620785 1 T26 90 T27 49 T28 22



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 836023 1 T26 110 T27 77 T28 26
auto[1] 495595 1 T26 78 T27 37 T28 16



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 460502 1 T26 61 T27 43 T28 10
auto[0] auto[1] 250331 1 T26 37 T27 22 T28 10
auto[1] auto[0] 375521 1 T26 49 T27 34 T28 16
auto[1] auto[1] 245264 1 T26 41 T27 15 T28 6


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 705769 1 T26 108 T27 61 T28 14
auto[1] 625849 1 T26 80 T27 53 T28 28



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 833804 1 T26 84 T27 73 T28 17
auto[1] 497814 1 T26 104 T27 41 T28 25



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455470 1 T26 53 T27 40 T28 7
auto[0] auto[1] 250299 1 T26 55 T27 21 T28 7
auto[1] auto[0] 378334 1 T26 31 T27 33 T28 10
auto[1] auto[1] 247515 1 T26 49 T27 20 T28 18


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706035 1 T26 104 T27 40 T28 14
auto[1] 625583 1 T26 84 T27 74 T28 28



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 835107 1 T26 90 T27 84 T28 22
auto[1] 496511 1 T26 98 T27 30 T28 20



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 456560 1 T26 51 T27 32 T28 7
auto[0] auto[1] 249475 1 T26 53 T27 8 T28 7
auto[1] auto[0] 378547 1 T26 39 T27 52 T28 15
auto[1] auto[1] 247036 1 T26 45 T27 22 T28 13


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 707644 1 T26 84 T27 56 T28 18
auto[1] 623974 1 T26 104 T27 58 T28 24



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 835712 1 T26 80 T27 97 T28 30
auto[1] 495906 1 T26 108 T27 17 T28 12



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 457985 1 T26 33 T27 46 T28 15
auto[0] auto[1] 249659 1 T26 51 T27 10 T28 3
auto[1] auto[0] 377727 1 T26 47 T27 51 T28 15
auto[1] auto[1] 246247 1 T26 57 T27 7 T28 9


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 704931 1 T26 96 T27 83 T28 16
auto[1] 626687 1 T26 92 T27 31 T28 26



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 834898 1 T26 89 T27 83 T28 24
auto[1] 496720 1 T26 99 T27 31 T28 18



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455432 1 T26 51 T27 63 T28 11
auto[0] auto[1] 249499 1 T26 45 T27 20 T28 5
auto[1] auto[0] 379466 1 T26 38 T27 20 T28 13
auto[1] auto[1] 247221 1 T26 54 T27 11 T28 13


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 704603 1 T26 88 T27 55 T28 24
auto[1] 627015 1 T26 100 T27 59 T28 18



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 834327 1 T26 91 T27 81 T28 26
auto[1] 497291 1 T26 97 T27 33 T28 16



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 455400 1 T26 41 T27 44 T28 16
auto[0] auto[1] 249203 1 T26 47 T27 11 T28 8
auto[1] auto[0] 378927 1 T26 50 T27 37 T28 10
auto[1] auto[1] 248088 1 T26 50 T27 22 T28 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706922 1 T26 106 T27 62 T28 20
auto[1] 624696 1 T26 82 T27 52 T28 22



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 835519 1 T26 83 T27 87 T28 26
auto[1] 496099 1 T26 105 T27 27 T28 16



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 458037 1 T26 44 T27 53 T28 14
auto[0] auto[1] 248885 1 T26 62 T27 9 T28 6
auto[1] auto[0] 377482 1 T26 39 T27 34 T28 12
auto[1] auto[1] 247214 1 T26 43 T27 18 T28 10


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 704565 1 T26 84 T27 47 T28 20
auto[1] 627053 1 T26 104 T27 67 T28 22



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 834217 1 T26 87 T27 74 T28 21
auto[1] 497401 1 T26 101 T27 40 T28 21



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 454850 1 T26 42 T27 28 T28 8
auto[0] auto[1] 249715 1 T26 42 T27 19 T28 12
auto[1] auto[0] 379367 1 T26 45 T27 46 T28 13
auto[1] auto[1] 247686 1 T26 59 T27 21 T28 9


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 710000 1 T26 104 T27 47 T28 20
auto[1] 621618 1 T26 84 T27 67 T28 22



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 834018 1 T26 99 T27 85 T28 18
auto[1] 497600 1 T26 89 T27 29 T28 24



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 457971 1 T26 53 T27 42 T28 9
auto[0] auto[1] 252029 1 T26 51 T27 5 T28 11
auto[1] auto[0] 376047 1 T26 46 T27 43 T28 9
auto[1] auto[1] 245571 1 T26 38 T27 24 T28 13


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 707690 1 T26 76 T27 45 T28 14
auto[1] 623928 1 T26 112 T27 69 T28 28



Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 835389 1 T26 123 T27 78 T28 27
auto[1] 496229 1 T26 65 T27 36 T28 15



Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 458217 1 T26 48 T27 30 T28 6
auto[0] auto[1] 249473 1 T26 28 T27 15 T28 8
auto[1] auto[0] 377172 1 T26 75 T27 48 T28 21
auto[1] auto[1] 246756 1 T26 37 T27 21 T28 7


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 706503 1 T26 86 T27 67 T28 28
auto[1] 625115 1 T26 102 T27 47 T28 14

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%