cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66425 |
1 |
|
|
T42 |
1447 |
|
T45 |
627 |
|
T26 |
1676 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45336 |
1 |
|
|
T42 |
932 |
|
T45 |
404 |
|
T26 |
2163 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56517 |
1 |
|
|
T42 |
2175 |
|
T45 |
541 |
|
T26 |
1755 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43494 |
1 |
|
|
T42 |
745 |
|
T45 |
1084 |
|
T26 |
1165 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T42 |
38 |
|
T45 |
26 |
|
T26 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T42 |
37 |
|
T45 |
25 |
|
T26 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T42 |
36 |
|
T45 |
25 |
|
T26 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T42 |
37 |
|
T45 |
25 |
|
T26 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T42 |
36 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T42 |
36 |
|
T45 |
24 |
|
T26 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T42 |
34 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T42 |
35 |
|
T45 |
23 |
|
T26 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T42 |
33 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T42 |
34 |
|
T45 |
23 |
|
T26 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T42 |
32 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T42 |
33 |
|
T45 |
23 |
|
T26 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T42 |
32 |
|
T45 |
22 |
|
T26 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T42 |
32 |
|
T45 |
22 |
|
T26 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T42 |
32 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T42 |
32 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T42 |
31 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T42 |
32 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T42 |
31 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T42 |
31 |
|
T45 |
20 |
|
T26 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T42 |
31 |
|
T45 |
21 |
|
T26 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T42 |
30 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T42 |
30 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T42 |
30 |
|
T45 |
20 |
|
T26 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T42 |
30 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T42 |
30 |
|
T45 |
19 |
|
T26 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
38 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55615 |
1 |
|
|
T42 |
1356 |
|
T45 |
1434 |
|
T26 |
1865 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46367 |
1 |
|
|
T42 |
1020 |
|
T45 |
463 |
|
T26 |
1904 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62633 |
1 |
|
|
T42 |
997 |
|
T45 |
416 |
|
T26 |
2077 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47017 |
1 |
|
|
T42 |
1871 |
|
T45 |
424 |
|
T26 |
863 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T42 |
49 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T42 |
52 |
|
T45 |
22 |
|
T26 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T42 |
48 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T42 |
50 |
|
T45 |
22 |
|
T26 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T42 |
47 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T42 |
50 |
|
T45 |
22 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T42 |
47 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T42 |
44 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T42 |
12 |
|
T45 |
11 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T42 |
44 |
|
T45 |
20 |
|
T26 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T42 |
43 |
|
T45 |
15 |
|
T26 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T42 |
43 |
|
T45 |
15 |
|
T26 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T42 |
42 |
|
T45 |
14 |
|
T26 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T42 |
38 |
|
T45 |
14 |
|
T26 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T42 |
42 |
|
T45 |
19 |
|
T26 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T42 |
37 |
|
T45 |
13 |
|
T26 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T42 |
40 |
|
T45 |
19 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T42 |
36 |
|
T45 |
13 |
|
T26 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T42 |
39 |
|
T45 |
18 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T42 |
36 |
|
T45 |
12 |
|
T26 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
12 |
|
T45 |
10 |
|
T26 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T42 |
37 |
|
T45 |
17 |
|
T26 |
31 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59921 |
1 |
|
|
T42 |
900 |
|
T45 |
635 |
|
T26 |
2360 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50817 |
1 |
|
|
T42 |
1795 |
|
T45 |
376 |
|
T26 |
1385 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57115 |
1 |
|
|
T42 |
1182 |
|
T45 |
1387 |
|
T26 |
1653 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43650 |
1 |
|
|
T42 |
1110 |
|
T45 |
405 |
|
T26 |
1350 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T42 |
49 |
|
T45 |
22 |
|
T26 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T42 |
49 |
|
T45 |
22 |
|
T26 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T42 |
49 |
|
T45 |
17 |
|
T26 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T42 |
50 |
|
T45 |
21 |
|
T26 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T42 |
48 |
|
T45 |
17 |
|
T26 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T42 |
50 |
|
T45 |
21 |
|
T26 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T42 |
50 |
|
T45 |
21 |
|
T26 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T42 |
50 |
|
T45 |
20 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T42 |
44 |
|
T45 |
16 |
|
T26 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
19 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T42 |
50 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T42 |
44 |
|
T45 |
16 |
|
T26 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T42 |
41 |
|
T45 |
16 |
|
T26 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T42 |
46 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T42 |
37 |
|
T45 |
16 |
|
T26 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T42 |
46 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T42 |
36 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T42 |
35 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T42 |
31 |
|
T45 |
15 |
|
T26 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T42 |
30 |
|
T45 |
14 |
|
T26 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T42 |
44 |
|
T45 |
16 |
|
T26 |
43 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59635 |
1 |
|
|
T42 |
1842 |
|
T45 |
1255 |
|
T26 |
1909 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48180 |
1 |
|
|
T42 |
1113 |
|
T45 |
319 |
|
T26 |
948 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60656 |
1 |
|
|
T42 |
1053 |
|
T45 |
783 |
|
T26 |
1651 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42793 |
1 |
|
|
T42 |
1287 |
|
T45 |
365 |
|
T26 |
2137 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T42 |
49 |
|
T45 |
18 |
|
T26 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T42 |
48 |
|
T45 |
16 |
|
T26 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T42 |
48 |
|
T45 |
18 |
|
T26 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T42 |
48 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T42 |
44 |
|
T45 |
17 |
|
T26 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T42 |
45 |
|
T45 |
14 |
|
T26 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T42 |
44 |
|
T45 |
14 |
|
T26 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T42 |
40 |
|
T45 |
15 |
|
T26 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T42 |
44 |
|
T45 |
14 |
|
T26 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T42 |
44 |
|
T45 |
14 |
|
T26 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T42 |
43 |
|
T45 |
14 |
|
T26 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T42 |
38 |
|
T45 |
13 |
|
T26 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T42 |
42 |
|
T45 |
14 |
|
T26 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T42 |
36 |
|
T45 |
13 |
|
T26 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T42 |
42 |
|
T45 |
13 |
|
T26 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T42 |
42 |
|
T45 |
12 |
|
T26 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T42 |
33 |
|
T45 |
12 |
|
T26 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T42 |
41 |
|
T45 |
12 |
|
T26 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T42 |
13 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T42 |
33 |
|
T45 |
11 |
|
T26 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
13 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T42 |
41 |
|
T45 |
11 |
|
T26 |
39 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61573 |
1 |
|
|
T42 |
1862 |
|
T45 |
1104 |
|
T26 |
1586 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45712 |
1 |
|
|
T42 |
913 |
|
T45 |
456 |
|
T26 |
2189 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54834 |
1 |
|
|
T42 |
1233 |
|
T45 |
310 |
|
T26 |
1151 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47623 |
1 |
|
|
T42 |
1019 |
|
T45 |
666 |
|
T26 |
1460 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T42 |
52 |
|
T45 |
32 |
|
T26 |
80 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T42 |
54 |
|
T45 |
31 |
|
T26 |
81 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T42 |
52 |
|
T45 |
31 |
|
T26 |
79 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T42 |
52 |
|
T45 |
31 |
|
T26 |
79 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T42 |
52 |
|
T45 |
31 |
|
T26 |
78 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T42 |
51 |
|
T45 |
31 |
|
T26 |
78 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T42 |
51 |
|
T45 |
30 |
|
T26 |
76 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T42 |
51 |
|
T45 |
31 |
|
T26 |
77 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T42 |
47 |
|
T45 |
30 |
|
T26 |
74 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T42 |
51 |
|
T45 |
31 |
|
T26 |
73 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T42 |
46 |
|
T45 |
28 |
|
T26 |
71 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T42 |
48 |
|
T45 |
31 |
|
T26 |
71 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T42 |
45 |
|
T45 |
28 |
|
T26 |
69 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T42 |
48 |
|
T45 |
31 |
|
T26 |
67 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T42 |
44 |
|
T45 |
27 |
|
T26 |
66 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
17 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T42 |
48 |
|
T45 |
30 |
|
T26 |
64 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T42 |
42 |
|
T45 |
26 |
|
T26 |
65 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T42 |
48 |
|
T45 |
27 |
|
T26 |
64 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T42 |
42 |
|
T45 |
25 |
|
T26 |
62 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T42 |
46 |
|
T45 |
27 |
|
T26 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T42 |
42 |
|
T45 |
25 |
|
T26 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T42 |
45 |
|
T45 |
26 |
|
T26 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T42 |
39 |
|
T45 |
25 |
|
T26 |
59 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T42 |
45 |
|
T45 |
25 |
|
T26 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T42 |
38 |
|
T45 |
24 |
|
T26 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T42 |
44 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T42 |
35 |
|
T45 |
24 |
|
T26 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T42 |
43 |
|
T45 |
21 |
|
T26 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
20 |
|
T45 |
8 |
|
T26 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T42 |
35 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T42 |
42 |
|
T45 |
21 |
|
T26 |
54 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55281 |
1 |
|
|
T42 |
1623 |
|
T45 |
1457 |
|
T26 |
2389 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47436 |
1 |
|
|
T42 |
908 |
|
T45 |
132 |
|
T26 |
1216 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58815 |
1 |
|
|
T42 |
2046 |
|
T45 |
1066 |
|
T26 |
1329 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49028 |
1 |
|
|
T42 |
751 |
|
T45 |
203 |
|
T26 |
1552 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T42 |
35 |
|
T45 |
13 |
|
T26 |
65 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T42 |
38 |
|
T45 |
14 |
|
T26 |
65 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T42 |
35 |
|
T45 |
12 |
|
T26 |
65 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T42 |
36 |
|
T45 |
14 |
|
T26 |
64 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T42 |
34 |
|
T45 |
12 |
|
T26 |
65 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T42 |
34 |
|
T45 |
14 |
|
T26 |
63 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T42 |
34 |
|
T45 |
12 |
|
T26 |
64 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
61 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T42 |
33 |
|
T45 |
10 |
|
T26 |
62 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T42 |
31 |
|
T45 |
13 |
|
T26 |
59 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T42 |
33 |
|
T45 |
9 |
|
T26 |
59 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T42 |
31 |
|
T45 |
13 |
|
T26 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T42 |
33 |
|
T45 |
9 |
|
T26 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T42 |
30 |
|
T45 |
13 |
|
T26 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T42 |
33 |
|
T45 |
8 |
|
T26 |
57 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T42 |
30 |
|
T45 |
13 |
|
T26 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T42 |
31 |
|
T45 |
8 |
|
T26 |
57 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T42 |
30 |
|
T45 |
11 |
|
T26 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T42 |
30 |
|
T45 |
8 |
|
T26 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T42 |
30 |
|
T45 |
10 |
|
T26 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T42 |
29 |
|
T45 |
8 |
|
T26 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T42 |
28 |
|
T45 |
10 |
|
T26 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T42 |
28 |
|
T45 |
8 |
|
T26 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T42 |
27 |
|
T45 |
10 |
|
T26 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T42 |
28 |
|
T45 |
8 |
|
T26 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T42 |
27 |
|
T45 |
10 |
|
T26 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
25 |
|
T45 |
15 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T42 |
26 |
|
T45 |
7 |
|
T26 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T42 |
22 |
|
T45 |
14 |
|
T26 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
49 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56463 |
1 |
|
|
T42 |
1250 |
|
T45 |
360 |
|
T26 |
863 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49756 |
1 |
|
|
T42 |
819 |
|
T45 |
543 |
|
T26 |
2856 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61703 |
1 |
|
|
T42 |
1687 |
|
T45 |
516 |
|
T26 |
1221 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42802 |
1 |
|
|
T42 |
1074 |
|
T45 |
1196 |
|
T26 |
1518 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
29 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T42 |
53 |
|
T45 |
30 |
|
T26 |
79 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T42 |
60 |
|
T45 |
30 |
|
T26 |
75 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
29 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T42 |
50 |
|
T45 |
29 |
|
T26 |
78 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T42 |
58 |
|
T45 |
30 |
|
T26 |
73 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
29 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T42 |
47 |
|
T45 |
27 |
|
T26 |
75 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T42 |
57 |
|
T45 |
29 |
|
T26 |
70 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
29 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T42 |
46 |
|
T45 |
25 |
|
T26 |
75 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T42 |
56 |
|
T45 |
29 |
|
T26 |
69 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T42 |
43 |
|
T45 |
24 |
|
T26 |
73 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T42 |
54 |
|
T45 |
29 |
|
T26 |
68 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T42 |
40 |
|
T45 |
24 |
|
T26 |
73 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T42 |
52 |
|
T45 |
29 |
|
T26 |
67 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T42 |
39 |
|
T45 |
24 |
|
T26 |
71 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T42 |
52 |
|
T45 |
29 |
|
T26 |
66 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T42 |
39 |
|
T45 |
23 |
|
T26 |
69 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
22 |
|
T45 |
8 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T42 |
51 |
|
T45 |
29 |
|
T26 |
63 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T42 |
37 |
|
T45 |
23 |
|
T26 |
69 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T42 |
51 |
|
T45 |
28 |
|
T26 |
59 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T42 |
34 |
|
T45 |
23 |
|
T26 |
68 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T42 |
50 |
|
T45 |
28 |
|
T26 |
59 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T42 |
34 |
|
T45 |
22 |
|
T26 |
66 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T42 |
50 |
|
T45 |
28 |
|
T26 |
59 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T42 |
34 |
|
T45 |
21 |
|
T26 |
66 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T42 |
50 |
|
T45 |
27 |
|
T26 |
58 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
64 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T42 |
50 |
|
T45 |
27 |
|
T26 |
57 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T42 |
31 |
|
T45 |
19 |
|
T26 |
64 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T42 |
49 |
|
T45 |
26 |
|
T26 |
56 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T42 |
28 |
|
T45 |
7 |
|
T26 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T42 |
31 |
|
T45 |
19 |
|
T26 |
62 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
7 |
|
T26 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T42 |
46 |
|
T45 |
26 |
|
T26 |
52 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56253 |
1 |
|
|
T42 |
1824 |
|
T45 |
583 |
|
T26 |
1804 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45267 |
1 |
|
|
T42 |
1118 |
|
T45 |
425 |
|
T26 |
1178 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60696 |
1 |
|
|
T42 |
701 |
|
T45 |
1013 |
|
T26 |
1592 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49231 |
1 |
|
|
T42 |
1293 |
|
T45 |
594 |
|
T26 |
1979 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T42 |
61 |
|
T45 |
25 |
|
T26 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T42 |
62 |
|
T45 |
28 |
|
T26 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T42 |
61 |
|
T45 |
24 |
|
T26 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T42 |
59 |
|
T45 |
28 |
|
T26 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T42 |
60 |
|
T45 |
23 |
|
T26 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T42 |
59 |
|
T45 |
27 |
|
T26 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T42 |
59 |
|
T45 |
22 |
|
T26 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T42 |
58 |
|
T45 |
27 |
|
T26 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T42 |
57 |
|
T45 |
22 |
|
T26 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T42 |
57 |
|
T45 |
27 |
|
T26 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T42 |
56 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T42 |
55 |
|
T45 |
26 |
|
T26 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T42 |
54 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T42 |
55 |
|
T45 |
26 |
|
T26 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T42 |
54 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
13 |
|
T45 |
10 |
|
T26 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T42 |
55 |
|
T45 |
26 |
|
T26 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T42 |
54 |
|
T45 |
25 |
|
T26 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T42 |
50 |
|
T45 |
18 |
|
T26 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T42 |
53 |
|
T45 |
25 |
|
T26 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T42 |
49 |
|
T45 |
16 |
|
T26 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T42 |
51 |
|
T45 |
25 |
|
T26 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T42 |
48 |
|
T45 |
14 |
|
T26 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T42 |
51 |
|
T45 |
23 |
|
T26 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T42 |
46 |
|
T45 |
14 |
|
T26 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T42 |
45 |
|
T45 |
14 |
|
T26 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T42 |
47 |
|
T45 |
23 |
|
T26 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T42 |
42 |
|
T45 |
13 |
|
T26 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
13 |
|
T45 |
9 |
|
T26 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T42 |
46 |
|
T45 |
21 |
|
T26 |
45 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57108 |
1 |
|
|
T42 |
1270 |
|
T45 |
661 |
|
T26 |
1747 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55110 |
1 |
|
|
T42 |
1708 |
|
T45 |
1032 |
|
T26 |
1029 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57852 |
1 |
|
|
T42 |
1011 |
|
T45 |
865 |
|
T26 |
2982 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40780 |
1 |
|
|
T42 |
1182 |
|
T45 |
205 |
|
T26 |
956 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
17 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T42 |
49 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T42 |
48 |
|
T45 |
17 |
|
T26 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
17 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T42 |
48 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
17 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T42 |
48 |
|
T45 |
16 |
|
T26 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
17 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T42 |
46 |
|
T45 |
15 |
|
T26 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T42 |
42 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T42 |
41 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T42 |
45 |
|
T45 |
15 |
|
T26 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T42 |
41 |
|
T45 |
13 |
|
T26 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T42 |
45 |
|
T45 |
15 |
|
T26 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T42 |
41 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T42 |
40 |
|
T45 |
11 |
|
T26 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T42 |
40 |
|
T45 |
11 |
|
T26 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T42 |
39 |
|
T45 |
10 |
|
T26 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T42 |
38 |
|
T45 |
10 |
|
T26 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T42 |
42 |
|
T45 |
14 |
|
T26 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T42 |
38 |
|
T45 |
9 |
|
T26 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T42 |
38 |
|
T45 |
14 |
|
T26 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T42 |
38 |
|
T45 |
8 |
|
T26 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T42 |
16 |
|
T45 |
15 |
|
T26 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T42 |
38 |
|
T45 |
13 |
|
T26 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
17 |
|
T45 |
14 |
|
T26 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T42 |
36 |
|
T45 |
8 |
|
T26 |
38 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56441 |
1 |
|
|
T42 |
1289 |
|
T45 |
1268 |
|
T26 |
2148 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48149 |
1 |
|
|
T42 |
1380 |
|
T45 |
392 |
|
T26 |
850 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60995 |
1 |
|
|
T42 |
1556 |
|
T45 |
471 |
|
T26 |
2186 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46651 |
1 |
|
|
T42 |
922 |
|
T45 |
522 |
|
T26 |
1829 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T42 |
43 |
|
T45 |
27 |
|
T26 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T42 |
41 |
|
T45 |
26 |
|
T26 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T42 |
42 |
|
T45 |
25 |
|
T26 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T42 |
41 |
|
T45 |
26 |
|
T26 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T42 |
40 |
|
T45 |
24 |
|
T26 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T42 |
41 |
|
T45 |
26 |
|
T26 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T42 |
40 |
|
T45 |
24 |
|
T26 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T42 |
41 |
|
T45 |
26 |
|
T26 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T42 |
39 |
|
T45 |
24 |
|
T26 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T42 |
40 |
|
T45 |
25 |
|
T26 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T42 |
38 |
|
T45 |
24 |
|
T26 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T42 |
38 |
|
T45 |
25 |
|
T26 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T42 |
37 |
|
T45 |
22 |
|
T26 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T42 |
35 |
|
T45 |
22 |
|
T26 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T42 |
35 |
|
T45 |
22 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T42 |
35 |
|
T45 |
21 |
|
T26 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T42 |
34 |
|
T45 |
22 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T42 |
35 |
|
T45 |
21 |
|
T26 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T42 |
32 |
|
T45 |
22 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T42 |
34 |
|
T45 |
20 |
|
T26 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T42 |
32 |
|
T45 |
21 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T42 |
33 |
|
T45 |
18 |
|
T26 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T42 |
31 |
|
T45 |
21 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T42 |
30 |
|
T45 |
18 |
|
T26 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T42 |
31 |
|
T45 |
20 |
|
T26 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T42 |
29 |
|
T45 |
18 |
|
T26 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
24 |
|
T45 |
9 |
|
T26 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T42 |
31 |
|
T45 |
20 |
|
T26 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T42 |
25 |
|
T45 |
10 |
|
T26 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T42 |
28 |
|
T45 |
18 |
|
T26 |
35 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53577 |
1 |
|
|
T42 |
1906 |
|
T45 |
658 |
|
T26 |
1127 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46751 |
1 |
|
|
T42 |
1159 |
|
T45 |
196 |
|
T26 |
1165 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61493 |
1 |
|
|
T42 |
1157 |
|
T45 |
745 |
|
T26 |
2781 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49596 |
1 |
|
|
T42 |
917 |
|
T45 |
1096 |
|
T26 |
1489 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
59 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T42 |
51 |
|
T45 |
23 |
|
T26 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T42 |
48 |
|
T45 |
19 |
|
T26 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T42 |
47 |
|
T45 |
22 |
|
T26 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T42 |
45 |
|
T45 |
17 |
|
T26 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T42 |
47 |
|
T45 |
22 |
|
T26 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T42 |
44 |
|
T45 |
17 |
|
T26 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T42 |
46 |
|
T45 |
22 |
|
T26 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T42 |
43 |
|
T45 |
17 |
|
T26 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T42 |
45 |
|
T45 |
22 |
|
T26 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T42 |
43 |
|
T45 |
15 |
|
T26 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T42 |
44 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T42 |
43 |
|
T45 |
14 |
|
T26 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T42 |
43 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T42 |
43 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T42 |
41 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T42 |
42 |
|
T45 |
10 |
|
T26 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T42 |
39 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T42 |
40 |
|
T45 |
9 |
|
T26 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T42 |
38 |
|
T45 |
22 |
|
T26 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T42 |
40 |
|
T45 |
9 |
|
T26 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T42 |
37 |
|
T45 |
22 |
|
T26 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T42 |
38 |
|
T45 |
8 |
|
T26 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
14 |
|
T26 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T42 |
38 |
|
T45 |
7 |
|
T26 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T42 |
35 |
|
T45 |
22 |
|
T26 |
45 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58307 |
1 |
|
|
T42 |
1728 |
|
T45 |
644 |
|
T26 |
2172 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43740 |
1 |
|
|
T42 |
567 |
|
T45 |
286 |
|
T26 |
1496 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63349 |
1 |
|
|
T42 |
2359 |
|
T45 |
838 |
|
T26 |
1281 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45707 |
1 |
|
|
T42 |
747 |
|
T45 |
1067 |
|
T26 |
1454 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T42 |
29 |
|
T45 |
20 |
|
T26 |
70 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T42 |
34 |
|
T45 |
20 |
|
T26 |
73 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T42 |
28 |
|
T45 |
20 |
|
T26 |
70 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T42 |
33 |
|
T45 |
20 |
|
T26 |
72 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T42 |
28 |
|
T45 |
20 |
|
T26 |
70 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T42 |
33 |
|
T45 |
20 |
|
T26 |
71 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T42 |
28 |
|
T45 |
20 |
|
T26 |
69 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T42 |
33 |
|
T45 |
20 |
|
T26 |
69 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T42 |
27 |
|
T45 |
16 |
|
T26 |
69 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T42 |
33 |
|
T45 |
20 |
|
T26 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T42 |
26 |
|
T45 |
16 |
|
T26 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T42 |
26 |
|
T45 |
16 |
|
T26 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T42 |
31 |
|
T45 |
20 |
|
T26 |
66 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T42 |
26 |
|
T45 |
15 |
|
T26 |
67 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T42 |
28 |
|
T45 |
19 |
|
T26 |
65 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T42 |
25 |
|
T45 |
14 |
|
T26 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T42 |
28 |
|
T45 |
19 |
|
T26 |
64 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T42 |
25 |
|
T45 |
14 |
|
T26 |
62 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
64 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T42 |
24 |
|
T45 |
13 |
|
T26 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
62 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T42 |
26 |
|
T45 |
19 |
|
T26 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T42 |
24 |
|
T45 |
11 |
|
T26 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T42 |
25 |
|
T45 |
19 |
|
T26 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T42 |
25 |
|
T45 |
19 |
|
T26 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
27 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
22 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T42 |
25 |
|
T45 |
19 |
|
T26 |
52 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60463 |
1 |
|
|
T42 |
995 |
|
T45 |
355 |
|
T26 |
2496 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44585 |
1 |
|
|
T42 |
1670 |
|
T45 |
475 |
|
T26 |
776 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59368 |
1 |
|
|
T42 |
1090 |
|
T45 |
1036 |
|
T26 |
2115 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46407 |
1 |
|
|
T42 |
1364 |
|
T45 |
723 |
|
T26 |
1471 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T42 |
53 |
|
T45 |
30 |
|
T26 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T42 |
52 |
|
T45 |
28 |
|
T26 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T42 |
52 |
|
T45 |
29 |
|
T26 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T42 |
52 |
|
T45 |
28 |
|
T26 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T42 |
52 |
|
T45 |
28 |
|
T26 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T42 |
52 |
|
T45 |
27 |
|
T26 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T42 |
52 |
|
T45 |
25 |
|
T26 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T42 |
52 |
|
T45 |
27 |
|
T26 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T42 |
49 |
|
T45 |
24 |
|
T26 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T42 |
52 |
|
T45 |
27 |
|
T26 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T42 |
44 |
|
T45 |
24 |
|
T26 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T42 |
50 |
|
T45 |
26 |
|
T26 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T42 |
42 |
|
T45 |
24 |
|
T26 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T42 |
48 |
|
T45 |
26 |
|
T26 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T42 |
41 |
|
T45 |
24 |
|
T26 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T42 |
46 |
|
T45 |
26 |
|
T26 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T42 |
40 |
|
T45 |
23 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T42 |
44 |
|
T45 |
26 |
|
T26 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T42 |
40 |
|
T45 |
23 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T42 |
43 |
|
T45 |
26 |
|
T26 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T42 |
40 |
|
T45 |
21 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T42 |
43 |
|
T45 |
25 |
|
T26 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T42 |
40 |
|
T45 |
21 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T42 |
43 |
|
T45 |
25 |
|
T26 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T42 |
40 |
|
T45 |
21 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T42 |
41 |
|
T45 |
25 |
|
T26 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T42 |
39 |
|
T45 |
19 |
|
T26 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T42 |
41 |
|
T45 |
24 |
|
T26 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T42 |
38 |
|
T45 |
17 |
|
T26 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T42 |
40 |
|
T45 |
24 |
|
T26 |
48 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60830 |
1 |
|
|
T42 |
1295 |
|
T45 |
791 |
|
T26 |
2143 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41018 |
1 |
|
|
T42 |
962 |
|
T45 |
487 |
|
T26 |
842 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56735 |
1 |
|
|
T42 |
1071 |
|
T45 |
625 |
|
T26 |
2276 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52930 |
1 |
|
|
T42 |
1749 |
|
T45 |
922 |
|
T26 |
1639 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T42 |
50 |
|
T45 |
20 |
|
T26 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T42 |
54 |
|
T45 |
23 |
|
T26 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T42 |
54 |
|
T45 |
22 |
|
T26 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T42 |
48 |
|
T45 |
19 |
|
T26 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T42 |
54 |
|
T45 |
22 |
|
T26 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T42 |
48 |
|
T45 |
19 |
|
T26 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T42 |
53 |
|
T45 |
21 |
|
T26 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T42 |
48 |
|
T45 |
19 |
|
T26 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T42 |
51 |
|
T45 |
20 |
|
T26 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T42 |
47 |
|
T45 |
19 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T42 |
50 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T42 |
47 |
|
T45 |
19 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T42 |
50 |
|
T45 |
19 |
|
T26 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T42 |
47 |
|
T45 |
18 |
|
T26 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T42 |
45 |
|
T45 |
17 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T42 |
44 |
|
T45 |
18 |
|
T26 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T42 |
39 |
|
T45 |
15 |
|
T26 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T42 |
38 |
|
T45 |
15 |
|
T26 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T42 |
38 |
|
T45 |
15 |
|
T26 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
19 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T42 |
38 |
|
T45 |
16 |
|
T26 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T42 |
38 |
|
T45 |
14 |
|
T26 |
34 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60673 |
1 |
|
|
T42 |
1565 |
|
T45 |
568 |
|
T26 |
1793 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45134 |
1 |
|
|
T42 |
820 |
|
T45 |
495 |
|
T26 |
1636 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59767 |
1 |
|
|
T42 |
1609 |
|
T45 |
1194 |
|
T26 |
1755 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44019 |
1 |
|
|
T42 |
1074 |
|
T45 |
531 |
|
T26 |
1284 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T42 |
48 |
|
T45 |
20 |
|
T26 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T42 |
53 |
|
T45 |
18 |
|
T26 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
65 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T42 |
52 |
|
T45 |
18 |
|
T26 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
64 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T42 |
52 |
|
T45 |
18 |
|
T26 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
63 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T42 |
49 |
|
T45 |
18 |
|
T26 |
67 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T42 |
44 |
|
T45 |
18 |
|
T26 |
61 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T42 |
49 |
|
T45 |
17 |
|
T26 |
67 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T42 |
44 |
|
T45 |
17 |
|
T26 |
61 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T42 |
49 |
|
T45 |
17 |
|
T26 |
65 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
62 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T42 |
39 |
|
T45 |
17 |
|
T26 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T42 |
37 |
|
T45 |
17 |
|
T26 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T42 |
37 |
|
T45 |
17 |
|
T26 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T42 |
43 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T42 |
35 |
|
T45 |
17 |
|
T26 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T42 |
42 |
|
T45 |
16 |
|
T26 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T42 |
33 |
|
T45 |
17 |
|
T26 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T42 |
40 |
|
T45 |
16 |
|
T26 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T42 |
33 |
|
T45 |
14 |
|
T26 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T42 |
39 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T42 |
23 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T42 |
32 |
|
T45 |
14 |
|
T26 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T42 |
17 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T42 |
39 |
|
T45 |
15 |
|
T26 |
45 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59670 |
1 |
|
|
T42 |
1124 |
|
T45 |
682 |
|
T26 |
2174 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51611 |
1 |
|
|
T42 |
827 |
|
T45 |
356 |
|
T26 |
985 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53512 |
1 |
|
|
T42 |
1684 |
|
T45 |
822 |
|
T26 |
2569 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46362 |
1 |
|
|
T42 |
1702 |
|
T45 |
945 |
|
T26 |
1027 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T42 |
43 |
|
T45 |
16 |
|
T26 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T42 |
41 |
|
T45 |
16 |
|
T26 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T42 |
41 |
|
T45 |
15 |
|
T26 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T42 |
38 |
|
T45 |
14 |
|
T26 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T42 |
38 |
|
T45 |
13 |
|
T26 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T42 |
40 |
|
T45 |
16 |
|
T26 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T42 |
36 |
|
T45 |
13 |
|
T26 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T42 |
40 |
|
T45 |
15 |
|
T26 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T42 |
34 |
|
T45 |
13 |
|
T26 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T42 |
39 |
|
T45 |
15 |
|
T26 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T42 |
32 |
|
T45 |
13 |
|
T26 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T42 |
38 |
|
T45 |
13 |
|
T26 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T42 |
31 |
|
T45 |
13 |
|
T26 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T42 |
35 |
|
T45 |
13 |
|
T26 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T42 |
31 |
|
T45 |
12 |
|
T26 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T42 |
34 |
|
T45 |
13 |
|
T26 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T42 |
29 |
|
T45 |
12 |
|
T26 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T42 |
29 |
|
T45 |
12 |
|
T26 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T42 |
29 |
|
T45 |
12 |
|
T26 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
13 |
|
T26 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T42 |
29 |
|
T45 |
12 |
|
T26 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
12 |
|
T26 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
33 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60784 |
1 |
|
|
T42 |
1045 |
|
T45 |
1055 |
|
T26 |
2467 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48304 |
1 |
|
|
T42 |
1632 |
|
T45 |
365 |
|
T26 |
1108 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57906 |
1 |
|
|
T42 |
1308 |
|
T45 |
990 |
|
T26 |
1769 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45467 |
1 |
|
|
T42 |
1020 |
|
T45 |
332 |
|
T26 |
1229 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T42 |
56 |
|
T45 |
21 |
|
T26 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T42 |
56 |
|
T45 |
21 |
|
T26 |
62 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T42 |
54 |
|
T45 |
20 |
|
T26 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T42 |
56 |
|
T45 |
21 |
|
T26 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T42 |
54 |
|
T45 |
20 |
|
T26 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T42 |
56 |
|
T45 |
21 |
|
T26 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T42 |
51 |
|
T45 |
19 |
|
T26 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T42 |
55 |
|
T45 |
20 |
|
T26 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T42 |
50 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T42 |
54 |
|
T45 |
20 |
|
T26 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T42 |
49 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T42 |
53 |
|
T45 |
20 |
|
T26 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T42 |
53 |
|
T45 |
20 |
|
T26 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T42 |
43 |
|
T45 |
16 |
|
T26 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T42 |
16 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T42 |
42 |
|
T45 |
16 |
|
T26 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T42 |
42 |
|
T45 |
16 |
|
T26 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T42 |
50 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T42 |
42 |
|
T45 |
15 |
|
T26 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T42 |
48 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T42 |
42 |
|
T45 |
15 |
|
T26 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T42 |
42 |
|
T45 |
15 |
|
T26 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T42 |
41 |
|
T45 |
15 |
|
T26 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T42 |
41 |
|
T45 |
14 |
|
T26 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
16 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T42 |
43 |
|
T45 |
17 |
|
T26 |
48 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58927 |
1 |
|
|
T42 |
1008 |
|
T45 |
903 |
|
T26 |
1793 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51844 |
1 |
|
|
T42 |
1661 |
|
T45 |
295 |
|
T26 |
1857 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55084 |
1 |
|
|
T42 |
1132 |
|
T45 |
1520 |
|
T26 |
1700 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46516 |
1 |
|
|
T42 |
1236 |
|
T45 |
248 |
|
T26 |
1415 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
16 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T42 |
57 |
|
T45 |
12 |
|
T26 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T42 |
58 |
|
T45 |
13 |
|
T26 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T42 |
16 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T42 |
56 |
|
T45 |
11 |
|
T26 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T42 |
58 |
|
T45 |
13 |
|
T26 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
16 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T42 |
55 |
|
T45 |
9 |
|
T26 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T42 |
55 |
|
T45 |
13 |
|
T26 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T42 |
16 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T42 |
53 |
|
T45 |
9 |
|
T26 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T42 |
54 |
|
T45 |
12 |
|
T26 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T42 |
53 |
|
T45 |
9 |
|
T26 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T42 |
54 |
|
T45 |
12 |
|
T26 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T42 |
53 |
|
T45 |
9 |
|
T26 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T42 |
54 |
|
T45 |
11 |
|
T26 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T42 |
50 |
|
T45 |
9 |
|
T26 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T42 |
53 |
|
T45 |
11 |
|
T26 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T42 |
48 |
|
T45 |
9 |
|
T26 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
14 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T42 |
53 |
|
T45 |
11 |
|
T26 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T42 |
45 |
|
T45 |
8 |
|
T26 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T42 |
52 |
|
T45 |
10 |
|
T26 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T42 |
45 |
|
T45 |
8 |
|
T26 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T42 |
49 |
|
T45 |
10 |
|
T26 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T42 |
44 |
|
T45 |
8 |
|
T26 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T42 |
47 |
|
T45 |
10 |
|
T26 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T42 |
43 |
|
T45 |
8 |
|
T26 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T42 |
46 |
|
T45 |
8 |
|
T26 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T42 |
40 |
|
T45 |
8 |
|
T26 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T42 |
45 |
|
T45 |
8 |
|
T26 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T42 |
38 |
|
T45 |
8 |
|
T26 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T42 |
45 |
|
T45 |
8 |
|
T26 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T42 |
15 |
|
T45 |
12 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T42 |
37 |
|
T45 |
8 |
|
T26 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T42 |
44 |
|
T45 |
8 |
|
T26 |
43 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55732 |
1 |
|
|
T42 |
851 |
|
T45 |
1047 |
|
T26 |
1881 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44652 |
1 |
|
|
T42 |
1063 |
|
T45 |
563 |
|
T26 |
1147 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63117 |
1 |
|
|
T42 |
1408 |
|
T45 |
475 |
|
T26 |
2340 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46087 |
1 |
|
|
T42 |
1783 |
|
T45 |
595 |
|
T26 |
1265 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T42 |
50 |
|
T45 |
27 |
|
T26 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T42 |
52 |
|
T45 |
27 |
|
T26 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T42 |
49 |
|
T45 |
27 |
|
T26 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T42 |
52 |
|
T45 |
27 |
|
T26 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T42 |
49 |
|
T45 |
27 |
|
T26 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T42 |
51 |
|
T45 |
27 |
|
T26 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T42 |
49 |
|
T45 |
27 |
|
T26 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T42 |
49 |
|
T45 |
26 |
|
T26 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T42 |
47 |
|
T45 |
25 |
|
T26 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T42 |
48 |
|
T45 |
25 |
|
T26 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T42 |
45 |
|
T45 |
25 |
|
T26 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T42 |
48 |
|
T45 |
25 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T42 |
45 |
|
T45 |
25 |
|
T26 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T42 |
48 |
|
T45 |
24 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T42 |
44 |
|
T45 |
24 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T42 |
16 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T42 |
48 |
|
T45 |
24 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T42 |
44 |
|
T45 |
22 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T42 |
47 |
|
T45 |
23 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T42 |
43 |
|
T45 |
21 |
|
T26 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T42 |
44 |
|
T45 |
22 |
|
T26 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T42 |
42 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T42 |
43 |
|
T45 |
22 |
|
T26 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T42 |
40 |
|
T45 |
19 |
|
T26 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T42 |
43 |
|
T45 |
22 |
|
T26 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T42 |
38 |
|
T45 |
18 |
|
T26 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T42 |
43 |
|
T45 |
21 |
|
T26 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T42 |
35 |
|
T45 |
18 |
|
T26 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T42 |
35 |
|
T45 |
18 |
|
T26 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
16 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T42 |
42 |
|
T45 |
19 |
|
T26 |
42 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62598 |
1 |
|
|
T42 |
1569 |
|
T45 |
549 |
|
T26 |
2678 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44090 |
1 |
|
|
T42 |
996 |
|
T45 |
631 |
|
T26 |
1184 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56685 |
1 |
|
|
T42 |
1079 |
|
T45 |
528 |
|
T26 |
1458 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47417 |
1 |
|
|
T42 |
1553 |
|
T45 |
976 |
|
T26 |
1367 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T42 |
48 |
|
T45 |
28 |
|
T26 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T42 |
49 |
|
T45 |
27 |
|
T26 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T42 |
46 |
|
T45 |
26 |
|
T26 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T42 |
49 |
|
T45 |
25 |
|
T26 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T42 |
44 |
|
T45 |
26 |
|
T26 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T42 |
47 |
|
T45 |
25 |
|
T26 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T42 |
44 |
|
T45 |
25 |
|
T26 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T42 |
43 |
|
T45 |
23 |
|
T26 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T42 |
43 |
|
T45 |
25 |
|
T26 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T42 |
43 |
|
T45 |
22 |
|
T26 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T42 |
42 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T42 |
43 |
|
T45 |
22 |
|
T26 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T42 |
41 |
|
T45 |
23 |
|
T26 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T42 |
41 |
|
T45 |
22 |
|
T26 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T42 |
41 |
|
T45 |
23 |
|
T26 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T42 |
41 |
|
T45 |
21 |
|
T26 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T42 |
40 |
|
T45 |
22 |
|
T26 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T42 |
41 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T42 |
40 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T42 |
39 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T42 |
39 |
|
T45 |
18 |
|
T26 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T42 |
39 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T42 |
38 |
|
T45 |
17 |
|
T26 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T42 |
38 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T42 |
38 |
|
T45 |
17 |
|
T26 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T42 |
37 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T42 |
36 |
|
T45 |
17 |
|
T26 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
18 |
|
T45 |
8 |
|
T26 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T42 |
34 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T42 |
17 |
|
T45 |
10 |
|
T26 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T42 |
34 |
|
T45 |
17 |
|
T26 |
41 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53724 |
1 |
|
|
T42 |
1099 |
|
T45 |
1278 |
|
T26 |
1236 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49093 |
1 |
|
|
T42 |
1389 |
|
T45 |
450 |
|
T26 |
1473 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60149 |
1 |
|
|
T42 |
1626 |
|
T45 |
652 |
|
T26 |
2475 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47199 |
1 |
|
|
T42 |
988 |
|
T45 |
394 |
|
T26 |
1343 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
71 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T42 |
47 |
|
T45 |
17 |
|
T26 |
74 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
68 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T42 |
46 |
|
T45 |
17 |
|
T26 |
73 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T42 |
46 |
|
T45 |
16 |
|
T26 |
68 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T42 |
45 |
|
T45 |
15 |
|
T26 |
70 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T42 |
45 |
|
T45 |
16 |
|
T26 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T42 |
44 |
|
T45 |
15 |
|
T26 |
66 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T42 |
43 |
|
T45 |
16 |
|
T26 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T42 |
43 |
|
T45 |
15 |
|
T26 |
66 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T42 |
42 |
|
T45 |
16 |
|
T26 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T42 |
43 |
|
T45 |
15 |
|
T26 |
66 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T42 |
41 |
|
T45 |
16 |
|
T26 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T42 |
42 |
|
T45 |
15 |
|
T26 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T42 |
40 |
|
T45 |
16 |
|
T26 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T42 |
41 |
|
T45 |
15 |
|
T26 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T42 |
39 |
|
T45 |
14 |
|
T26 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T42 |
41 |
|
T45 |
15 |
|
T26 |
61 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T42 |
39 |
|
T45 |
14 |
|
T26 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T42 |
41 |
|
T45 |
15 |
|
T26 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T42 |
37 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T42 |
41 |
|
T45 |
14 |
|
T26 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T42 |
35 |
|
T45 |
14 |
|
T26 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T42 |
41 |
|
T45 |
14 |
|
T26 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T42 |
35 |
|
T45 |
14 |
|
T26 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T42 |
33 |
|
T45 |
14 |
|
T26 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T42 |
38 |
|
T45 |
12 |
|
T26 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T42 |
22 |
|
T45 |
13 |
|
T26 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T42 |
33 |
|
T45 |
13 |
|
T26 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T42 |
20 |
|
T45 |
13 |
|
T26 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T42 |
35 |
|
T45 |
12 |
|
T26 |
54 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58878 |
1 |
|
|
T42 |
1237 |
|
T45 |
630 |
|
T26 |
1597 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45515 |
1 |
|
|
T42 |
1097 |
|
T45 |
715 |
|
T26 |
1284 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60301 |
1 |
|
|
T42 |
1925 |
|
T45 |
993 |
|
T26 |
2640 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46102 |
1 |
|
|
T42 |
970 |
|
T45 |
431 |
|
T26 |
1077 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
58 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T42 |
49 |
|
T45 |
22 |
|
T26 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T42 |
48 |
|
T45 |
22 |
|
T26 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T42 |
48 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T42 |
47 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T42 |
47 |
|
T45 |
22 |
|
T26 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T42 |
47 |
|
T45 |
21 |
|
T26 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T42 |
47 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T42 |
46 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T42 |
41 |
|
T45 |
19 |
|
T26 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T42 |
38 |
|
T45 |
19 |
|
T26 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T42 |
36 |
|
T45 |
18 |
|
T26 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T42 |
33 |
|
T45 |
18 |
|
T26 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T42 |
32 |
|
T45 |
18 |
|
T26 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T42 |
32 |
|
T45 |
17 |
|
T26 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T42 |
44 |
|
T45 |
20 |
|
T26 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T42 |
30 |
|
T45 |
17 |
|
T26 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
15 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T42 |
44 |
|
T45 |
20 |
|
T26 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T42 |
15 |
|
T45 |
9 |
|
T26 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T42 |
28 |
|
T45 |
16 |
|
T26 |
37 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58370 |
1 |
|
|
T42 |
1369 |
|
T45 |
611 |
|
T26 |
1826 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45514 |
1 |
|
|
T42 |
1278 |
|
T45 |
408 |
|
T26 |
1316 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55793 |
1 |
|
|
T42 |
1007 |
|
T45 |
797 |
|
T26 |
1768 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50626 |
1 |
|
|
T42 |
1392 |
|
T45 |
1005 |
|
T26 |
1774 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
22 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T42 |
52 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
22 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
22 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T42 |
50 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T42 |
22 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T42 |
48 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T42 |
49 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T42 |
48 |
|
T45 |
23 |
|
T26 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T42 |
47 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T42 |
46 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T42 |
45 |
|
T45 |
19 |
|
T26 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T42 |
45 |
|
T45 |
23 |
|
T26 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T42 |
44 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T42 |
45 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T42 |
44 |
|
T45 |
18 |
|
T26 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T42 |
44 |
|
T45 |
22 |
|
T26 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T42 |
44 |
|
T45 |
22 |
|
T26 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T42 |
39 |
|
T45 |
17 |
|
T26 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T42 |
43 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T42 |
37 |
|
T45 |
17 |
|
T26 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T42 |
42 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T42 |
35 |
|
T45 |
17 |
|
T26 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T42 |
42 |
|
T45 |
19 |
|
T26 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T42 |
35 |
|
T45 |
16 |
|
T26 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T42 |
41 |
|
T45 |
18 |
|
T26 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T42 |
33 |
|
T45 |
16 |
|
T26 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
5 |
|
T26 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T42 |
32 |
|
T45 |
15 |
|
T26 |
32 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52900 |
1 |
|
|
T42 |
1218 |
|
T45 |
1244 |
|
T26 |
1394 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48295 |
1 |
|
|
T42 |
1132 |
|
T45 |
703 |
|
T26 |
1332 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54181 |
1 |
|
|
T42 |
1549 |
|
T45 |
468 |
|
T26 |
1643 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55543 |
1 |
|
|
T42 |
1127 |
|
T45 |
468 |
|
T26 |
2131 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T42 |
56 |
|
T45 |
24 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T42 |
59 |
|
T45 |
22 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T42 |
55 |
|
T45 |
24 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T42 |
58 |
|
T45 |
22 |
|
T26 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T42 |
55 |
|
T45 |
23 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T42 |
55 |
|
T45 |
20 |
|
T26 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T42 |
55 |
|
T45 |
23 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T42 |
53 |
|
T45 |
20 |
|
T26 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T42 |
53 |
|
T45 |
23 |
|
T26 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T42 |
52 |
|
T45 |
17 |
|
T26 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
58 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T42 |
51 |
|
T45 |
17 |
|
T26 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T42 |
51 |
|
T45 |
21 |
|
T26 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T42 |
51 |
|
T45 |
17 |
|
T26 |
52 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T42 |
50 |
|
T45 |
20 |
|
T26 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T42 |
51 |
|
T45 |
16 |
|
T26 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T42 |
49 |
|
T45 |
12 |
|
T26 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T42 |
47 |
|
T45 |
19 |
|
T26 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T42 |
49 |
|
T45 |
12 |
|
T26 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T42 |
46 |
|
T45 |
19 |
|
T26 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T42 |
49 |
|
T45 |
12 |
|
T26 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T42 |
45 |
|
T45 |
19 |
|
T26 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T42 |
47 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T42 |
45 |
|
T45 |
19 |
|
T26 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T42 |
46 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T42 |
44 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T42 |
16 |
|
T45 |
5 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T42 |
13 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T42 |
41 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58751 |
1 |
|
|
T42 |
2067 |
|
T45 |
481 |
|
T26 |
1694 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47117 |
1 |
|
|
T42 |
920 |
|
T45 |
1084 |
|
T26 |
1314 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59821 |
1 |
|
|
T42 |
1186 |
|
T45 |
598 |
|
T26 |
1489 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45265 |
1 |
|
|
T42 |
1078 |
|
T45 |
493 |
|
T26 |
2072 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T42 |
41 |
|
T45 |
22 |
|
T26 |
65 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T42 |
45 |
|
T45 |
22 |
|
T26 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T42 |
40 |
|
T45 |
22 |
|
T26 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T42 |
39 |
|
T45 |
22 |
|
T26 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T42 |
38 |
|
T45 |
22 |
|
T26 |
63 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
60 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T42 |
41 |
|
T45 |
22 |
|
T26 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T42 |
41 |
|
T45 |
21 |
|
T26 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T42 |
33 |
|
T45 |
21 |
|
T26 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T42 |
40 |
|
T45 |
19 |
|
T26 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T42 |
33 |
|
T45 |
21 |
|
T26 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T42 |
39 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T42 |
33 |
|
T45 |
21 |
|
T26 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T42 |
38 |
|
T45 |
18 |
|
T26 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T42 |
32 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T42 |
38 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T42 |
30 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T42 |
37 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T42 |
30 |
|
T45 |
21 |
|
T26 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T42 |
36 |
|
T45 |
18 |
|
T26 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
22 |
|
T45 |
11 |
|
T26 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T42 |
30 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T42 |
17 |
|
T45 |
11 |
|
T26 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T42 |
36 |
|
T45 |
17 |
|
T26 |
43 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54992 |
1 |
|
|
T42 |
1301 |
|
T45 |
700 |
|
T26 |
1680 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46381 |
1 |
|
|
T42 |
1648 |
|
T45 |
1021 |
|
T26 |
1125 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58194 |
1 |
|
|
T42 |
1294 |
|
T45 |
501 |
|
T26 |
1543 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52159 |
1 |
|
|
T42 |
940 |
|
T45 |
445 |
|
T26 |
2337 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T42 |
45 |
|
T45 |
27 |
|
T26 |
65 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T42 |
44 |
|
T45 |
25 |
|
T26 |
67 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T42 |
43 |
|
T45 |
26 |
|
T26 |
64 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T42 |
41 |
|
T45 |
24 |
|
T26 |
65 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T42 |
43 |
|
T45 |
26 |
|
T26 |
61 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T42 |
40 |
|
T45 |
23 |
|
T26 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T42 |
42 |
|
T45 |
26 |
|
T26 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T42 |
40 |
|
T45 |
23 |
|
T26 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T42 |
41 |
|
T45 |
25 |
|
T26 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T42 |
39 |
|
T45 |
22 |
|
T26 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T42 |
41 |
|
T45 |
24 |
|
T26 |
60 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T42 |
38 |
|
T45 |
21 |
|
T26 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T42 |
40 |
|
T45 |
24 |
|
T26 |
59 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T42 |
38 |
|
T45 |
21 |
|
T26 |
63 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T42 |
39 |
|
T45 |
24 |
|
T26 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
21 |
|
T45 |
11 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T42 |
38 |
|
T45 |
20 |
|
T26 |
62 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T42 |
37 |
|
T45 |
23 |
|
T26 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T42 |
38 |
|
T45 |
19 |
|
T26 |
61 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T42 |
36 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T42 |
38 |
|
T45 |
19 |
|
T26 |
61 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T42 |
36 |
|
T45 |
21 |
|
T26 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T42 |
38 |
|
T45 |
19 |
|
T26 |
61 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T42 |
36 |
|
T45 |
21 |
|
T26 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T42 |
38 |
|
T45 |
19 |
|
T26 |
59 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T42 |
33 |
|
T45 |
21 |
|
T26 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T42 |
36 |
|
T45 |
16 |
|
T26 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T42 |
34 |
|
T45 |
14 |
|
T26 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
21 |
|
T45 |
9 |
|
T26 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T42 |
31 |
|
T45 |
14 |
|
T26 |
54 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61001 |
1 |
|
|
T42 |
1220 |
|
T45 |
1120 |
|
T26 |
3133 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47200 |
1 |
|
|
T42 |
1065 |
|
T45 |
564 |
|
T26 |
1122 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57107 |
1 |
|
|
T42 |
983 |
|
T45 |
607 |
|
T26 |
1375 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45304 |
1 |
|
|
T42 |
1818 |
|
T45 |
538 |
|
T26 |
1075 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T42 |
53 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T42 |
54 |
|
T45 |
20 |
|
T26 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T42 |
48 |
|
T45 |
20 |
|
T26 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T42 |
47 |
|
T45 |
20 |
|
T26 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T42 |
46 |
|
T45 |
18 |
|
T26 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T42 |
51 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T42 |
49 |
|
T45 |
20 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T42 |
43 |
|
T45 |
18 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T42 |
42 |
|
T45 |
17 |
|
T26 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
17 |
|
T45 |
8 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T42 |
46 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T42 |
45 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T42 |
44 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T42 |
39 |
|
T45 |
17 |
|
T26 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T42 |
42 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T42 |
37 |
|
T45 |
17 |
|
T26 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T42 |
41 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T42 |
36 |
|
T45 |
16 |
|
T26 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T42 |
17 |
|
T45 |
7 |
|
T26 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
38 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59268 |
1 |
|
|
T42 |
1875 |
|
T45 |
572 |
|
T26 |
1602 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46300 |
1 |
|
|
T42 |
1142 |
|
T45 |
480 |
|
T26 |
1184 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59005 |
1 |
|
|
T42 |
1283 |
|
T45 |
601 |
|
T26 |
2790 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45999 |
1 |
|
|
T42 |
766 |
|
T45 |
1177 |
|
T26 |
1101 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T42 |
46 |
|
T45 |
22 |
|
T26 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T42 |
43 |
|
T45 |
21 |
|
T26 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T42 |
46 |
|
T45 |
21 |
|
T26 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T42 |
42 |
|
T45 |
21 |
|
T26 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T42 |
44 |
|
T45 |
19 |
|
T26 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T42 |
41 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T42 |
41 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T42 |
43 |
|
T45 |
19 |
|
T26 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T42 |
40 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T42 |
41 |
|
T45 |
18 |
|
T26 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T42 |
37 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T42 |
41 |
|
T45 |
17 |
|
T26 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T42 |
37 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T42 |
41 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T42 |
36 |
|
T45 |
20 |
|
T26 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T42 |
35 |
|
T45 |
20 |
|
T26 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T42 |
40 |
|
T45 |
14 |
|
T26 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T42 |
35 |
|
T45 |
20 |
|
T26 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T42 |
40 |
|
T45 |
13 |
|
T26 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T42 |
40 |
|
T45 |
13 |
|
T26 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T42 |
30 |
|
T45 |
20 |
|
T26 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T42 |
37 |
|
T45 |
13 |
|
T26 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T42 |
28 |
|
T45 |
18 |
|
T26 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T42 |
37 |
|
T45 |
13 |
|
T26 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T42 |
27 |
|
T45 |
18 |
|
T26 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
24 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T42 |
37 |
|
T45 |
13 |
|
T26 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T42 |
24 |
|
T45 |
18 |
|
T26 |
35 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62493 |
1 |
|
|
T42 |
2561 |
|
T45 |
1136 |
|
T26 |
1564 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51016 |
1 |
|
|
T42 |
684 |
|
T45 |
550 |
|
T26 |
1038 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58429 |
1 |
|
|
T42 |
1290 |
|
T45 |
436 |
|
T26 |
2710 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41978 |
1 |
|
|
T42 |
832 |
|
T45 |
626 |
|
T26 |
1331 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T42 |
35 |
|
T45 |
21 |
|
T26 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T42 |
29 |
|
T45 |
21 |
|
T26 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T42 |
35 |
|
T45 |
21 |
|
T26 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T42 |
29 |
|
T45 |
20 |
|
T26 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T42 |
35 |
|
T45 |
20 |
|
T26 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T42 |
29 |
|
T45 |
20 |
|
T26 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T42 |
35 |
|
T45 |
20 |
|
T26 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T42 |
34 |
|
T45 |
20 |
|
T26 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T42 |
33 |
|
T45 |
20 |
|
T26 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T42 |
29 |
|
T45 |
19 |
|
T26 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T42 |
32 |
|
T45 |
20 |
|
T26 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T42 |
26 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T42 |
29 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T42 |
32 |
|
T45 |
19 |
|
T26 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T42 |
28 |
|
T45 |
18 |
|
T26 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T42 |
31 |
|
T45 |
19 |
|
T26 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T42 |
28 |
|
T45 |
18 |
|
T26 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T42 |
28 |
|
T45 |
19 |
|
T26 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T42 |
28 |
|
T45 |
18 |
|
T26 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T42 |
28 |
|
T45 |
17 |
|
T26 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T42 |
27 |
|
T45 |
19 |
|
T26 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T42 |
27 |
|
T45 |
16 |
|
T26 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T42 |
25 |
|
T45 |
19 |
|
T26 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T42 |
27 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
21 |
|
T45 |
10 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T42 |
23 |
|
T45 |
19 |
|
T26 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T42 |
26 |
|
T45 |
9 |
|
T26 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T42 |
26 |
|
T45 |
16 |
|
T26 |
45 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57361 |
1 |
|
|
T42 |
1433 |
|
T45 |
623 |
|
T26 |
1747 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48641 |
1 |
|
|
T42 |
944 |
|
T45 |
570 |
|
T26 |
1703 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60891 |
1 |
|
|
T42 |
1955 |
|
T45 |
1184 |
|
T26 |
1706 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43139 |
1 |
|
|
T42 |
758 |
|
T45 |
398 |
|
T26 |
1346 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T42 |
52 |
|
T45 |
19 |
|
T26 |
58 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T42 |
51 |
|
T45 |
23 |
|
T26 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T42 |
50 |
|
T45 |
19 |
|
T26 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T42 |
49 |
|
T45 |
23 |
|
T26 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T42 |
50 |
|
T45 |
19 |
|
T26 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T42 |
48 |
|
T45 |
23 |
|
T26 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T42 |
49 |
|
T45 |
17 |
|
T26 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T42 |
48 |
|
T45 |
23 |
|
T26 |
58 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T42 |
46 |
|
T45 |
23 |
|
T26 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T42 |
47 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T42 |
45 |
|
T45 |
23 |
|
T26 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T42 |
47 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T42 |
43 |
|
T45 |
23 |
|
T26 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T42 |
47 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T42 |
19 |
|
T45 |
8 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T42 |
42 |
|
T45 |
23 |
|
T26 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T42 |
46 |
|
T45 |
14 |
|
T26 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T42 |
42 |
|
T45 |
22 |
|
T26 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T42 |
45 |
|
T45 |
13 |
|
T26 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T42 |
39 |
|
T45 |
22 |
|
T26 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T42 |
43 |
|
T45 |
13 |
|
T26 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T42 |
39 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T42 |
42 |
|
T45 |
13 |
|
T26 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T42 |
36 |
|
T45 |
22 |
|
T26 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T42 |
40 |
|
T45 |
13 |
|
T26 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T42 |
36 |
|
T45 |
20 |
|
T26 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T42 |
39 |
|
T45 |
13 |
|
T26 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T42 |
34 |
|
T45 |
20 |
|
T26 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T42 |
18 |
|
T45 |
11 |
|
T26 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T42 |
39 |
|
T45 |
13 |
|
T26 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T42 |
19 |
|
T45 |
7 |
|
T26 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T42 |
34 |
|
T45 |
19 |
|
T26 |
44 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57940 |
1 |
|
|
T42 |
991 |
|
T45 |
625 |
|
T26 |
1714 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46231 |
1 |
|
|
T42 |
1342 |
|
T45 |
1049 |
|
T26 |
1117 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54692 |
1 |
|
|
T42 |
1745 |
|
T45 |
693 |
|
T26 |
2086 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51373 |
1 |
|
|
T42 |
1068 |
|
T45 |
492 |
|
T26 |
1774 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1764 |
1 |
|
|
T42 |
54 |
|
T45 |
24 |
|
T26 |
59 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T42 |
52 |
|
T45 |
20 |
|
T26 |
57 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T42 |
52 |
|
T45 |
23 |
|
T26 |
57 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T42 |
49 |
|
T45 |
19 |
|
T26 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T42 |
52 |
|
T45 |
23 |
|
T26 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T42 |
47 |
|
T45 |
19 |
|
T26 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T42 |
50 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T42 |
45 |
|
T45 |
18 |
|
T26 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T42 |
46 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T42 |
44 |
|
T45 |
18 |
|
T26 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T42 |
45 |
|
T45 |
23 |
|
T26 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T42 |
41 |
|
T45 |
18 |
|
T26 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T42 |
44 |
|
T45 |
23 |
|
T26 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T42 |
44 |
|
T45 |
23 |
|
T26 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T42 |
44 |
|
T45 |
23 |
|
T26 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T42 |
42 |
|
T45 |
23 |
|
T26 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T42 |
41 |
|
T45 |
23 |
|
T26 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T42 |
40 |
|
T45 |
18 |
|
T26 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T42 |
41 |
|
T45 |
19 |
|
T26 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T42 |
39 |
|
T45 |
18 |
|
T26 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T42 |
41 |
|
T45 |
19 |
|
T26 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T42 |
38 |
|
T45 |
18 |
|
T26 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T42 |
40 |
|
T45 |
19 |
|
T26 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T42 |
38 |
|
T45 |
18 |
|
T26 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T42 |
16 |
|
T45 |
3 |
|
T26 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T42 |
40 |
|
T45 |
17 |
|
T26 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
18 |
|
T45 |
7 |
|
T26 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T42 |
35 |
|
T45 |
17 |
|
T26 |
42 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58221 |
1 |
|
|
T42 |
974 |
|
T45 |
1563 |
|
T26 |
2572 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45586 |
1 |
|
|
T42 |
1999 |
|
T45 |
339 |
|
T26 |
1488 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56484 |
1 |
|
|
T42 |
848 |
|
T45 |
591 |
|
T26 |
1440 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51304 |
1 |
|
|
T42 |
1269 |
|
T45 |
361 |
|
T26 |
1181 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T42 |
58 |
|
T45 |
17 |
|
T26 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T42 |
62 |
|
T45 |
19 |
|
T26 |
60 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T42 |
57 |
|
T45 |
17 |
|
T26 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T42 |
61 |
|
T45 |
19 |
|
T26 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T42 |
55 |
|
T45 |
17 |
|
T26 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T42 |
59 |
|
T45 |
18 |
|
T26 |
58 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T42 |
53 |
|
T45 |
17 |
|
T26 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T42 |
56 |
|
T45 |
18 |
|
T26 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T42 |
53 |
|
T45 |
17 |
|
T26 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T42 |
55 |
|
T45 |
18 |
|
T26 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T42 |
52 |
|
T45 |
16 |
|
T26 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T42 |
53 |
|
T45 |
18 |
|
T26 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T42 |
51 |
|
T45 |
15 |
|
T26 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T42 |
53 |
|
T45 |
17 |
|
T26 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T42 |
51 |
|
T45 |
15 |
|
T26 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T42 |
9 |
|
T45 |
9 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T42 |
51 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T42 |
49 |
|
T45 |
15 |
|
T26 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T42 |
50 |
|
T45 |
16 |
|
T26 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T42 |
48 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T42 |
49 |
|
T45 |
15 |
|
T26 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T42 |
45 |
|
T45 |
13 |
|
T26 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T42 |
48 |
|
T45 |
14 |
|
T26 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T42 |
43 |
|
T45 |
13 |
|
T26 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T42 |
48 |
|
T45 |
14 |
|
T26 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T42 |
42 |
|
T45 |
13 |
|
T26 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T42 |
48 |
|
T45 |
13 |
|
T26 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T42 |
41 |
|
T45 |
12 |
|
T26 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T42 |
47 |
|
T45 |
13 |
|
T26 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T42 |
14 |
|
T45 |
11 |
|
T26 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T42 |
41 |
|
T45 |
11 |
|
T26 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T42 |
9 |
|
T45 |
8 |
|
T26 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T42 |
46 |
|
T45 |
13 |
|
T26 |
38 |