Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4288829 |
1 |
|
|
T33 |
357 |
|
T34 |
405 |
|
T35 |
413 |
| auto[1] |
2112165 |
1 |
|
|
T38 |
118 |
|
T39 |
713 |
|
T21 |
15 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5359342 |
1 |
|
|
T33 |
357 |
|
T34 |
405 |
|
T35 |
413 |
| auto[1] |
1041652 |
1 |
|
|
T38 |
82 |
|
T39 |
334 |
|
T21 |
9 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4307942 |
1 |
|
|
T33 |
357 |
|
T34 |
405 |
|
T35 |
413 |
| auto[1] |
2093052 |
1 |
|
|
T38 |
153 |
|
T39 |
742 |
|
T21 |
17 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
522064 |
1 |
|
|
T38 |
41 |
|
T39 |
177 |
|
T21 |
8 |
| auto[1] |
auto[0] |
auto[1] |
519586 |
1 |
|
|
T38 |
58 |
|
T39 |
136 |
|
T21 |
6 |
| auto[1] |
auto[1] |
auto[0] |
529336 |
1 |
|
|
T38 |
30 |
|
T39 |
231 |
|
T30 |
12 |
| auto[1] |
auto[1] |
auto[1] |
522066 |
1 |
|
|
T38 |
24 |
|
T39 |
198 |
|
T21 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |