Summary for Variable cp_intr
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for cp_intr
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
13837660 |
1 |
|
|
T1 |
163847 |
|
T2 |
8654 |
|
T3 |
16669 |
all_values[1] |
13837660 |
1 |
|
|
T1 |
163847 |
|
T2 |
8654 |
|
T3 |
16669 |
all_values[2] |
13837660 |
1 |
|
|
T1 |
163847 |
|
T2 |
8654 |
|
T3 |
16669 |
Summary for Variable cp_intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
97327 |
1 |
|
|
T1 |
784 |
|
T3 |
75 |
|
T4 |
9 |
auto[1] |
41415653 |
1 |
|
|
T1 |
490757 |
|
T2 |
25962 |
|
T3 |
49932 |
Summary for Variable cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
39048054 |
1 |
|
|
T1 |
473317 |
|
T2 |
25927 |
|
T3 |
49946 |
auto[1] |
2464926 |
1 |
|
|
T1 |
18224 |
|
T2 |
35 |
|
T3 |
61 |
Summary for Cross intr_cg_cc
Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
12 |
0 |
12 |
100.00 |
|
Automatically Generated Cross Bins for intr_cg_cc
Bins
cp_intr | cp_intr_en | cp_intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
auto[0] |
auto[0] |
28528 |
1 |
|
|
T3 |
23 |
|
T4 |
3 |
|
T26 |
138 |
all_values[0] |
auto[0] |
auto[1] |
485 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T26 |
2 |
all_values[0] |
auto[1] |
auto[0] |
13761165 |
1 |
|
|
T1 |
163336 |
|
T2 |
8619 |
|
T3 |
16585 |
all_values[0] |
auto[1] |
auto[1] |
47482 |
1 |
|
|
T1 |
511 |
|
T2 |
35 |
|
T3 |
59 |
all_values[1] |
auto[0] |
auto[0] |
26405 |
1 |
|
|
T1 |
1 |
|
T3 |
25 |
|
T4 |
1 |
all_values[1] |
auto[0] |
auto[1] |
185 |
1 |
|
|
T29 |
1 |
|
T6 |
1 |
|
T13 |
1 |
all_values[1] |
auto[1] |
auto[0] |
13810490 |
1 |
|
|
T1 |
163846 |
|
T2 |
8654 |
|
T3 |
16644 |
all_values[1] |
auto[1] |
auto[1] |
580 |
1 |
|
|
T4 |
1 |
|
T26 |
1 |
|
T29 |
1 |
all_values[2] |
auto[0] |
auto[0] |
33448 |
1 |
|
|
T1 |
783 |
|
T3 |
25 |
|
T4 |
1 |
all_values[2] |
auto[0] |
auto[1] |
8276 |
1 |
|
|
T4 |
3 |
|
T29 |
6 |
|
T6 |
5 |
all_values[2] |
auto[1] |
auto[0] |
11388018 |
1 |
|
|
T1 |
145351 |
|
T2 |
8654 |
|
T3 |
16644 |
all_values[2] |
auto[1] |
auto[1] |
2407918 |
1 |
|
|
T1 |
17713 |
|
T17 |
9200 |
|
T18 |
10363 |