Group : hmac_env_pkg::hmac_env_cov::status_cg
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Group : hmac_env_pkg::hmac_env_cov::status_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_hmac_env_0.1/hmac_env_cov.sv



Summary for Group hmac_env_pkg::hmac_env_cov::status_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00
Crosses 168 0 168 100.00


Variables for Group hmac_env_pkg::hmac_env_cov::status_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
digest_swap 2 0 2 100.00 100 1 1 2
endian_swap 2 0 2 100.00 100 1 1 2
hmac_en 2 0 2 100.00 100 1 1 2
sta_fifo_depth 17 0 17 100.00 100 1 1 0
sta_fifo_empty 2 0 2 100.00 100 1 1 2
sta_fifo_full 2 0 2 100.00 100 1 1 2


Crosses for Group hmac_env_pkg::hmac_env_cov::status_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
fifo_empty_cross 16 0 16 100.00 100 1 1 0
fifo_full_cross 16 0 16 100.00 100 1 1 0
fifo_depth_cross 136 0 136 100.00 100 1 1 0


Summary for Variable digest_swap

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for digest_swap

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6558928 1 T1 6550 T2 26 T3 4383
auto[1] 2574800 1 T1 7950 T3 3880 T4 4240



Summary for Variable endian_swap

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for endian_swap

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2614566 1 T1 5402 T3 3878 T4 3327
auto[1] 6519162 1 T1 9098 T2 26 T3 4385



Summary for Variable hmac_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for hmac_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 5892899 1 T1 5630 T3 3976 T4 5883
auto[1] 3240829 1 T1 8870 T2 26 T3 4287



Summary for Variable sta_fifo_depth

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 17 0 17 100.00


User Defined Bins for sta_fifo_depth

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fifo_depth[0] 5715294 1 T1 13753 T2 5 T3 7145
fifo_depth[1] 431261 1 T1 301 T2 2 T3 445
fifo_depth[2] 359168 1 T1 167 T2 5 T3 374
fifo_depth[3] 294994 1 T1 79 T2 2 T3 198
fifo_depth[4] 260479 1 T1 91 T2 3 T3 70
fifo_depth[5] 229406 1 T1 34 T2 1 T3 23
fifo_depth[6] 220843 1 T1 26 T2 1 T3 6
fifo_depth[7] 193745 1 T1 17 T2 3 T3 2
fifo_depth[8] 179499 1 T1 30 T2 1 T4 83
fifo_depth[9] 122599 1 T1 1 T4 44 T23 539
fifo_depth[10] 98229 1 T1 1 T4 23 T23 345
fifo_depth[11] 62430 1 T2 1 T4 14 T23 202
fifo_depth[12] 68250 1 T2 2 T4 9 T23 100
fifo_depth[13] 36287 1 T4 1 T23 52 T24 1
fifo_depth[14] 47896 1 T4 1 T23 16 T11 1081
fifo_depth[15] 31455 1 T4 1 T23 6 T11 653
fifo_depth[16] 108123 1 T4 1 T23 1 T11 3167



Summary for Variable sta_fifo_empty

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for sta_fifo_empty

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3551055 1 T1 747 T2 21 T3 1118
auto[1] 5582673 1 T1 13753 T2 5 T3 7145



Summary for Variable sta_fifo_full

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for sta_fifo_full

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9001107 1 T1 14500 T2 26 T3 8263
auto[1] 132621 1 T11 4915 T15 3 T12 4322



Summary for Cross fifo_empty_cross

Samples crossed: sta_fifo_empty hmac_en endian_swap digest_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 16 0 16 100.00


Automatically Generated Cross Bins for fifo_empty_cross

Bins
sta_fifo_emptyhmac_enendian_swapdigest_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] auto[0] 265232 1 T1 62 T3 115 T4 301
auto[0] auto[0] auto[0] auto[1] 269489 1 T1 72 T3 184 T4 262
auto[0] auto[0] auto[1] auto[0] 992362 1 T1 115 T3 137 T4 410
auto[0] auto[0] auto[1] auto[1] 267541 1 T1 50 T3 78 T4 419
auto[0] auto[1] auto[0] auto[0] 461520 1 T1 91 T3 171 T4 357
auto[0] auto[1] auto[0] auto[1] 420215 1 T1 152 T3 72 T23 826
auto[0] auto[1] auto[1] auto[0] 440750 1 T1 70 T2 21 T3 166
auto[0] auto[1] auto[1] auto[1] 433946 1 T1 135 T3 195 T4 823
auto[1] auto[0] auto[0] auto[0] 232304 1 T1 127 T3 687 T4 444
auto[1] auto[0] auto[0] auto[1] 229373 1 T1 292 T3 1209 T4 634
auto[1] auto[0] auto[1] auto[0] 3402662 1 T1 2544 T3 1026 T4 2576
auto[1] auto[0] auto[1] auto[1] 233936 1 T1 2368 T3 540 T4 837
auto[1] auto[1] auto[0] auto[0] 379522 1 T1 1352 T3 1072 T4 1325
auto[1] auto[1] auto[0] auto[1] 356911 1 T1 3254 T3 368 T4 4
auto[1] auto[1] auto[1] auto[0] 384576 1 T1 2189 T2 5 T3 1009
auto[1] auto[1] auto[1] auto[1] 363389 1 T1 1627 T3 1234 T4 1261



Summary for Cross fifo_full_cross

Samples crossed: sta_fifo_full hmac_en endian_swap digest_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 16 0 16 100.00


Automatically Generated Cross Bins for fifo_full_cross

Bins
sta_fifo_fullhmac_enendian_swapdigest_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] auto[0] 479166 1 T1 189 T3 802 T4 745
auto[0] auto[0] auto[0] auto[1] 480198 1 T1 364 T3 1393 T4 896
auto[0] auto[0] auto[1] auto[0] 4379879 1 T1 2659 T3 1163 T4 2986
auto[0] auto[0] auto[1] auto[1] 484005 1 T1 2418 T3 618 T4 1256
auto[0] auto[1] auto[0] auto[0] 825764 1 T1 1443 T3 1243 T4 1682
auto[0] auto[1] auto[0] auto[1] 761908 1 T1 3406 T3 440 T4 4
auto[0] auto[1] auto[1] auto[0] 806970 1 T1 2259 T2 26 T3 1175
auto[0] auto[1] auto[1] auto[1] 783217 1 T1 1762 T3 1429 T4 2084
auto[1] auto[0] auto[0] auto[0] 18370 1 T11 1163 T15 1 T12 1769
auto[1] auto[0] auto[0] auto[1] 18664 1 T11 554 T15 1 T12 904
auto[1] auto[0] auto[1] auto[0] 15145 1 T11 253 T12 65 T47 1
auto[1] auto[0] auto[1] auto[1] 17472 1 T11 905 T12 1242 T47 1
auto[1] auto[1] auto[0] auto[0] 15278 1 T11 752 T119 439 T48 2
auto[1] auto[1] auto[0] auto[1] 15218 1 T11 1 T15 1 T12 31
auto[1] auto[1] auto[1] auto[0] 18356 1 T11 529 T12 1 T119 78
auto[1] auto[1] auto[1] auto[1] 14118 1 T11 758 T12 310 T47 2



Summary for Cross fifo_depth_cross

Samples crossed: sta_fifo_depth hmac_en endian_swap digest_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 136 0 136 100.00


Automatically Generated Cross Bins for fifo_depth_cross

Bins
sta_fifo_depthhmac_enendian_swapdigest_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fifo_depth[0] auto[0] auto[0] auto[0] 250674 1 T1 127 T3 687 T4 444
fifo_depth[0] auto[0] auto[0] auto[1] 248037 1 T1 292 T3 1209 T4 634
fifo_depth[0] auto[0] auto[1] auto[0] 3417807 1 T1 2544 T3 1026 T4 2576
fifo_depth[0] auto[0] auto[1] auto[1] 251408 1 T1 2368 T3 540 T4 837
fifo_depth[0] auto[1] auto[0] auto[0] 394800 1 T1 1352 T3 1072 T4 1325
fifo_depth[0] auto[1] auto[0] auto[1] 372129 1 T1 3254 T3 368 T4 4
fifo_depth[0] auto[1] auto[1] auto[0] 402932 1 T1 2189 T2 5 T3 1009
fifo_depth[0] auto[1] auto[1] auto[1] 377507 1 T1 1627 T3 1234 T4 1261
fifo_depth[1] auto[0] auto[0] auto[0] 19537 1 T1 11 T3 43 T4 45
fifo_depth[1] auto[0] auto[0] auto[1] 18764 1 T1 13 T3 73 T4 60
fifo_depth[1] auto[0] auto[1] auto[0] 208425 1 T1 62 T3 57 T4 140
fifo_depth[1] auto[0] auto[1] auto[1] 19928 1 T1 27 T3 25 T4 91
fifo_depth[1] auto[1] auto[0] auto[0] 41892 1 T1 28 T3 74 T4 49
fifo_depth[1] auto[1] auto[0] auto[1] 41011 1 T1 67 T3 24 T23 96
fifo_depth[1] auto[1] auto[1] auto[0] 42094 1 T1 37 T2 2 T3 72
fifo_depth[1] auto[1] auto[1] auto[1] 39610 1 T1 56 T3 77 T4 142
fifo_depth[2] auto[0] auto[0] auto[0] 16887 1 T1 12 T3 39 T4 57
fifo_depth[2] auto[0] auto[0] auto[1] 16791 1 T1 20 T3 50 T4 52
fifo_depth[2] auto[0] auto[1] auto[0] 158172 1 T1 31 T3 50 T4 148
fifo_depth[2] auto[0] auto[1] auto[1] 17761 1 T1 11 T3 29 T4 74
fifo_depth[2] auto[1] auto[0] auto[0] 38430 1 T1 24 T3 60 T4 44
fifo_depth[2] auto[1] auto[0] auto[1] 36641 1 T1 28 T3 23 T23 94
fifo_depth[2] auto[1] auto[1] auto[0] 38188 1 T1 6 T2 5 T3 57
fifo_depth[2] auto[1] auto[1] auto[1] 36298 1 T1 35 T3 66 T4 142
fifo_depth[3] auto[0] auto[0] auto[0] 13655 1 T1 10 T3 18 T4 52
fifo_depth[3] auto[0] auto[0] auto[1] 14048 1 T1 11 T3 34 T4 48
fifo_depth[3] auto[0] auto[1] auto[0] 119609 1 T1 7 T3 21 T4 86
fifo_depth[3] auto[0] auto[1] auto[1] 14809 1 T1 5 T3 19 T4 65
fifo_depth[3] auto[1] auto[0] auto[0] 33716 1 T1 11 T3 27 T4 40
fifo_depth[3] auto[1] auto[0] auto[1] 33342 1 T1 19 T3 18 T23 87
fifo_depth[3] auto[1] auto[1] auto[0] 33918 1 T1 5 T2 2 T3 23
fifo_depth[3] auto[1] auto[1] auto[1] 31897 1 T1 11 T3 38 T4 129
fifo_depth[4] auto[0] auto[0] auto[0] 14025 1 T1 16 T3 12 T4 34
fifo_depth[4] auto[0] auto[0] auto[1] 14070 1 T1 14 T3 20 T4 40
fifo_depth[4] auto[0] auto[1] auto[0] 87669 1 T1 7 T3 5 T4 31
fifo_depth[4] auto[0] auto[1] auto[1] 14473 1 T1 3 T3 5 T4 44
fifo_depth[4] auto[1] auto[0] auto[0] 33708 1 T1 15 T3 6 T4 50
fifo_depth[4] auto[1] auto[0] auto[1] 31949 1 T1 13 T3 4 T23 96
fifo_depth[4] auto[1] auto[1] auto[0] 33256 1 T1 5 T2 3 T3 10
fifo_depth[4] auto[1] auto[1] auto[1] 31329 1 T1 18 T3 8 T4 121
fifo_depth[5] auto[0] auto[0] auto[0] 11821 1 T1 5 T3 1 T4 25
fifo_depth[5] auto[0] auto[0] auto[1] 12422 1 T1 4 T3 4 T4 27
fifo_depth[5] auto[0] auto[1] auto[0] 71371 1 T1 1 T3 4 T4 5
fifo_depth[5] auto[0] auto[1] auto[1] 12851 1 T1 2 T4 51 T25 7
fifo_depth[5] auto[1] auto[0] auto[0] 30693 1 T1 6 T3 2 T4 32
fifo_depth[5] auto[1] auto[0] auto[1] 30324 1 T1 8 T3 3 T23 89
fifo_depth[5] auto[1] auto[1] auto[0] 30987 1 T1 4 T2 1 T3 4
fifo_depth[5] auto[1] auto[1] auto[1] 28937 1 T1 4 T3 5 T4 119
fifo_depth[6] auto[0] auto[0] auto[0] 12367 1 T1 3 T3 1 T4 31
fifo_depth[6] auto[0] auto[0] auto[1] 12549 1 T1 5 T3 2 T4 21
fifo_depth[6] auto[0] auto[1] auto[0] 62362 1 T1 3 T14 1 T11 3588
fifo_depth[6] auto[0] auto[1] auto[1] 12819 1 T1 1 T4 36 T25 2
fifo_depth[6] auto[1] auto[0] auto[0] 31512 1 T1 2 T3 2 T4 32
fifo_depth[6] auto[1] auto[0] auto[1] 29622 1 T1 2 T23 88 T24 2
fifo_depth[6] auto[1] auto[1] auto[0] 30461 1 T1 4 T2 1 T23 305
fifo_depth[6] auto[1] auto[1] auto[1] 29151 1 T1 6 T3 1 T4 90
fifo_depth[7] auto[0] auto[0] auto[0] 11054 1 T1 3 T3 1 T4 22
fifo_depth[7] auto[0] auto[0] auto[1] 11341 1 T1 4 T3 1 T4 11
fifo_depth[7] auto[0] auto[1] auto[0] 49619 1 T1 1 T11 2633 T55 16
fifo_depth[7] auto[0] auto[1] auto[1] 11571 1 T1 1 T4 27 T11 194
fifo_depth[7] auto[1] auto[0] auto[0] 28248 1 T1 1 T4 33 T23 183
fifo_depth[7] auto[1] auto[0] auto[1] 27495 1 T1 3 T23 87 T24 9
fifo_depth[7] auto[1] auto[1] auto[0] 28461 1 T1 1 T2 3 T23 294
fifo_depth[7] auto[1] auto[1] auto[1] 25956 1 T1 3 T4 49 T23 283
fifo_depth[8] auto[0] auto[0] auto[0] 12677 1 T1 2 T4 12 T11 121
fifo_depth[8] auto[0] auto[0] auto[1] 11374 1 T4 2 T11 215 T19 29
fifo_depth[8] auto[0] auto[1] auto[0] 39295 1 T1 3 T11 1963 T55 20
fifo_depth[8] auto[0] auto[1] auto[1] 11212 1 T4 15 T11 152 T19 20
fifo_depth[8] auto[1] auto[0] auto[0] 27738 1 T1 4 T4 34 T23 181
fifo_depth[8] auto[1] auto[0] auto[1] 24966 1 T1 12 T23 62 T24 2
fifo_depth[8] auto[1] auto[1] auto[0] 26140 1 T1 7 T2 1 T23 229
fifo_depth[8] auto[1] auto[1] auto[1] 26097 1 T1 2 T4 20 T23 265
fifo_depth[9] auto[0] auto[0] auto[0] 8082 1 T4 6 T11 96 T55 17
fifo_depth[9] auto[0] auto[0] auto[1] 7632 1 T4 1 T11 129 T19 27
fifo_depth[9] auto[0] auto[1] auto[0] 26110 1 T11 1222 T55 9 T15 374
fifo_depth[9] auto[0] auto[1] auto[1] 7874 1 T4 9 T11 83 T19 18
fifo_depth[9] auto[1] auto[0] auto[0] 19388 1 T4 17 T23 108 T11 329
fifo_depth[9] auto[1] auto[0] auto[1] 17842 1 T23 55 T24 3 T11 399
fifo_depth[9] auto[1] auto[1] auto[0] 18470 1 T1 1 T23 191 T24 2
fifo_depth[9] auto[1] auto[1] auto[1] 17201 1 T4 11 T23 185 T24 3
fifo_depth[10] auto[0] auto[0] auto[0] 7620 1 T4 7 T11 74 T55 6
fifo_depth[10] auto[0] auto[0] auto[1] 7031 1 T1 1 T11 229 T19 14
fifo_depth[10] auto[0] auto[1] auto[0] 18673 1 T11 702 T55 7 T15 251
fifo_depth[10] auto[0] auto[1] auto[1] 6865 1 T4 6 T11 70 T19 19
fifo_depth[10] auto[1] auto[0] auto[0] 16747 1 T4 10 T23 81 T11 584
fifo_depth[10] auto[1] auto[0] auto[1] 13721 1 T23 39 T24 4 T11 252
fifo_depth[10] auto[1] auto[1] auto[0] 14060 1 T23 112 T24 2 T11 118
fifo_depth[10] auto[1] auto[1] auto[1] 13512 1 T23 113 T24 2 T11 191
fifo_depth[11] auto[0] auto[0] auto[0] 4870 1 T4 3 T11 83 T55 3
fifo_depth[11] auto[0] auto[0] auto[1] 4726 1 T11 108 T19 7 T15 35
fifo_depth[11] auto[0] auto[1] auto[0] 11622 1 T11 442 T55 1 T15 156
fifo_depth[11] auto[0] auto[1] auto[1] 4397 1 T4 1 T11 72 T19 8
fifo_depth[11] auto[1] auto[0] auto[0] 10567 1 T4 10 T23 59 T11 204
fifo_depth[11] auto[1] auto[0] auto[1] 8962 1 T23 16 T24 3 T11 161
fifo_depth[11] auto[1] auto[1] auto[0] 9285 1 T2 1 T23 61 T24 1
fifo_depth[11] auto[1] auto[1] auto[1] 8001 1 T23 66 T11 120 T19 28
fifo_depth[12] auto[0] auto[0] auto[0] 6702 1 T4 3 T11 120 T15 16
fifo_depth[12] auto[0] auto[0] auto[1] 6648 1 T11 295 T19 4 T55 1
fifo_depth[12] auto[0] auto[1] auto[0] 9918 1 T11 456 T15 81 T12 158
fifo_depth[12] auto[0] auto[1] auto[1] 6117 1 T11 83 T19 2 T55 6
fifo_depth[12] auto[1] auto[0] auto[0] 11301 1 T4 6 T23 18 T11 495
fifo_depth[12] auto[1] auto[0] auto[1] 8328 1 T23 13 T24 1 T11 184
fifo_depth[12] auto[1] auto[1] auto[0] 8596 1 T2 2 T23 34 T11 76
fifo_depth[12] auto[1] auto[1] auto[1] 10640 1 T23 35 T24 2 T11 41
fifo_depth[13] auto[0] auto[0] auto[0] 3531 1 T4 1 T11 86 T15 5
fifo_depth[13] auto[0] auto[0] auto[1] 3443 1 T11 78 T19 2 T55 1
fifo_depth[13] auto[0] auto[1] auto[0] 5264 1 T11 196 T15 30 T12 88
fifo_depth[13] auto[0] auto[1] auto[1] 3500 1 T11 61 T15 13 T12 82
fifo_depth[13] auto[1] auto[0] auto[0] 6445 1 T23 20 T11 163 T19 3
fifo_depth[13] auto[1] auto[0] auto[1] 4803 1 T23 3 T11 100 T19 5
fifo_depth[13] auto[1] auto[1] auto[0] 5050 1 T23 13 T11 50 T19 1
fifo_depth[13] auto[1] auto[1] auto[1] 4251 1 T23 16 T24 1 T11 82
fifo_depth[14] auto[0] auto[0] auto[0] 4778 1 T4 1 T11 80 T15 3
fifo_depth[14] auto[0] auto[0] auto[1] 5644 1 T11 276 T12 56 T13 3
fifo_depth[14] auto[0] auto[1] auto[0] 6237 1 T11 96 T15 9 T12 164
fifo_depth[14] auto[0] auto[1] auto[1] 5386 1 T11 34 T55 1 T15 3
fifo_depth[14] auto[1] auto[0] auto[0] 8496 1 T23 5 T11 418 T19 1
fifo_depth[14] auto[1] auto[0] auto[1] 5267 1 T11 90 T19 4 T53 10
fifo_depth[14] auto[1] auto[1] auto[0] 5382 1 T23 5 T11 48 T53 10
fifo_depth[14] auto[1] auto[1] auto[1] 6706 1 T23 6 T11 39 T19 5
fifo_depth[15] auto[0] auto[0] auto[0] 3340 1 T4 1 T11 51 T12 397
fifo_depth[15] auto[0] auto[0] auto[1] 3584 1 T11 138 T12 26 T119 1
fifo_depth[15] auto[0] auto[1] auto[0] 3782 1 T11 116 T55 2 T15 1
fifo_depth[15] auto[0] auto[1] auto[1] 3162 1 T11 23 T15 1 T12 116
fifo_depth[15] auto[1] auto[0] auto[0] 5422 1 T23 2 T11 136 T53 2
fifo_depth[15] auto[1] auto[0] auto[1] 3866 1 T23 1 T11 82 T19 1
fifo_depth[15] auto[1] auto[1] auto[0] 4435 1 T11 41 T19 1 T53 4
fifo_depth[15] auto[1] auto[1] auto[1] 3864 1 T23 3 T11 66 T19 2
fifo_depth[16] auto[0] auto[0] auto[0] 9931 1 T4 1 T11 120 T12 698
fifo_depth[16] auto[0] auto[0] auto[1] 10087 1 T11 271 T12 83 T119 5
fifo_depth[16] auto[0] auto[1] auto[0] 17640 1 T11 599 T12 164 T119 34
fifo_depth[16] auto[0] auto[1] auto[1] 17469 1 T11 864 T12 1602 T119 435
fifo_depth[16] auto[1] auto[0] auto[0] 15771 1 T11 1000 T15 1 T120 2
fifo_depth[16] auto[1] auto[0] auto[1] 13045 1 T11 77 T53 2 T15 2
fifo_depth[16] auto[1] auto[1] auto[0] 8433 1 T11 11 T53 2 T69 1
fifo_depth[16] auto[1] auto[1] auto[1] 15747 1 T23 1 T11 225 T19 1

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