SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
hmac_errors | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | STATUS |
illegalvalue | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
key_length_higher_blk_size | 32 | 1 | T46 | 2 | T13 | 1 | T15 | 8 | ||||
push_msg_when_idle | 56688 | 1 | T18 | 2 | T45 | 361 | T46 | 1868 | ||||
hash_start_when_active | 25 | 1 | T13 | 6 | T15 | 5 | T16 | 2 | ||||
update_secret_key_in_process | 2165200 | 1 | T17 | 43560 | T18 | 67739 | T25 | 48 | ||||
hash_start_when_sha_disabled | 21 | 1 | T13 | 2 | T14 | 1 | T15 | 2 | ||||
no_error | 217 | 1 | T18 | 4 | T28 | 4 | T118 | 7 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |