SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
hmac_errors | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | STATUS |
illegalvalue | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
key_length_higher_blk_size | 28 | 1 | T23 | 5 | T53 | 1 | T117 | 1 | ||||
push_msg_when_idle | 76790 | 1 | T141 | 5 | T142 | 1 | T23 | 12888 | ||||
hash_start_when_active | 22 | 1 | T23 | 5 | T26 | 1 | T11 | 2 | ||||
update_secret_key_in_process | 2483495 | 1 | T2 | 49 | T32 | 48 | T7 | 32719 | ||||
hash_start_when_sha_disabled | 21 | 1 | T23 | 5 | T24 | 1 | T11 | 2 | ||||
no_error | 333 | 1 | T2 | 8 | T32 | 1 | T7 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |