SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
hmac_errors | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
no_error | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegalvalue | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
invalid_config | 4952 | 1 | T1 | 8 | T2 | 3 | T3 | 9 | ||||
push_msg_when_disallowed | 610587 | 1 | T2 | 8603 | T3 | 13228 | T8 | 5548 | ||||
hash_start_when_active | 130 | 1 | T2 | 1 | T3 | 4 | T31 | 4 | ||||
update_secret_key_in_process | 15682429 | 1 | T2 | 2825 | T3 | 4103 | T4 | 43195 | ||||
hash_start_when_sha_disabled | 87 | 1 | T2 | 1 | T3 | 3 | T31 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |