Group : hmac_env_pkg::hmac_env_cov::status_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : hmac_env_pkg::hmac_env_cov::status_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_hmac_env_0.1/hmac_env_cov.sv


Summary for Group hmac_env_pkg::hmac_env_cov::status_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 20 0 20 100.00
Crosses 192 0 192 100.00


Variables for Group hmac_env_pkg::hmac_env_cov::status_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
digest_swap 2 0 2 100.00 100 1 1 2
endian_swap 2 0 2 100.00 100 1 1 2
hmac_en 2 0 2 100.00 100 1 1 2
key_swap 2 0 2 100.00 100 1 1 2
sta_fifo_depth 8 0 8 100.00 100 1 1 0
sta_fifo_empty 2 0 2 100.00 100 1 1 2
sta_fifo_full 2 0 2 100.00 100 1 1 2


Crosses for Group hmac_env_pkg::hmac_env_cov::status_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
fifo_empty_cross 32 0 32 100.00 100 1 1 0
fifo_full_cross 32 0 32 100.00 100 1 1 0
fifo_depth_cross 128 0 128 100.00 100 1 1 0


Summary for Variable digest_swap

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for digest_swap

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4585907 1 T1 20125 T2 10058 T3 11052
auto[1] 2841756 1 T1 13895 T2 5103 T3 8965


Summary for Variable endian_swap

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for endian_swap

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2907803 1 T1 14636 T2 7083 T3 6185
auto[1] 4519860 1 T1 19384 T2 8078 T3 13832


Summary for Variable hmac_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for hmac_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3314572 1 T2 10300 T4 3 T5 239
auto[1] 4113091 1 T1 34020 T2 4861 T3 20017


Summary for Variable key_swap

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for key_swap

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4575266 1 T1 15364 T2 5380 T3 4560
auto[1] 2852397 1 T1 18656 T2 9781 T3 15457


Summary for Variable sta_fifo_depth

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for sta_fifo_depth

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fifo_depth[0] 6680359 1 T1 29184 T2 1934 T3 17747
fifo_depth[1] 117227 1 T1 740 T2 54 T3 354
fifo_depth[2] 90216 1 T1 719 T2 88 T3 356
fifo_depth[3] 71201 1 T1 765 T2 82 T3 358
fifo_depth[4] 64844 1 T1 739 T2 214 T3 337
fifo_depth[5] 51559 1 T1 648 T2 276 T3 282
fifo_depth[6] 42761 1 T1 550 T2 481 T3 252
fifo_depth[7] 28748 1 T1 346 T2 501 T3 159


Summary for Variable sta_fifo_empty

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for sta_fifo_empty

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 747304 1 T1 4836 T2 13227 T3 2270
auto[1] 6680359 1 T1 29184 T2 1934 T3 17747


Summary for Variable sta_fifo_full

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for sta_fifo_full

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7418325 1 T1 34020 T2 15037 T3 20017
auto[1] 9338 1 T2 124 T14 207 T10 263


Summary for Cross fifo_empty_cross

Samples crossed: sta_fifo_empty hmac_en endian_swap digest_swap key_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 32 0 32 100.00


Automatically Generated Cross Bins for fifo_empty_cross

Bins
sta_fifo_emptyhmac_enendian_swapdigest_swapkey_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] auto[0] auto[0] 30102 1 T2 355 T6 2 T14 397
auto[0] auto[0] auto[0] auto[0] auto[1] 30810 1 T2 263 T6 1 T14 326
auto[0] auto[0] auto[0] auto[1] auto[0] 33465 1 T2 1447 T14 295 T15 25
auto[0] auto[0] auto[0] auto[1] auto[1] 33390 1 T2 591 T14 1071 T15 70
auto[0] auto[0] auto[1] auto[0] auto[0] 138682 1 T2 857 T4 2 T6 3
auto[0] auto[0] auto[1] auto[0] auto[1] 36728 1 T2 5957 T4 1 T15 165
auto[0] auto[0] auto[1] auto[1] auto[0] 33469 1 T15 185 T10 1412 T25 1
auto[0] auto[0] auto[1] auto[1] auto[1] 32847 1 T2 334 T6 2 T14 5
auto[0] auto[1] auto[0] auto[0] auto[0] 40133 1 T1 692 T2 284 T5 1
auto[0] auto[1] auto[0] auto[0] auto[1] 44345 1 T1 1355 T2 816 T5 2
auto[0] auto[1] auto[0] auto[1] auto[0] 53029 1 T2 1378 T3 135 T10 1128
auto[0] auto[1] auto[0] auto[1] auto[1] 40740 1 T1 15 T2 537 T5 2
auto[0] auto[1] auto[1] auto[0] auto[0] 57797 1 T2 366 T3 263 T14 893
auto[0] auto[1] auto[1] auto[0] auto[1] 46610 1 T1 1041 T3 252 T14 17
auto[0] auto[1] auto[1] auto[1] auto[0] 43059 1 T1 846 T2 42 T3 555
auto[0] auto[1] auto[1] auto[1] auto[1] 52098 1 T1 887 T3 1065 T14 912
auto[1] auto[0] auto[0] auto[0] auto[0] 185046 1 T2 5 T5 23 T6 1
auto[1] auto[0] auto[0] auto[0] auto[1] 188130 1 T2 141 T6 3 T14 18
auto[1] auto[0] auto[0] auto[1] auto[0] 172845 1 T2 22 T6 1 T14 1208
auto[1] auto[0] auto[0] auto[1] auto[1] 163694 1 T2 5 T5 28 T14 36
auto[1] auto[0] auto[1] auto[0] auto[0] 1717986 1 T2 227 T5 74 T6 1
auto[1] auto[0] auto[1] auto[0] auto[1] 169915 1 T2 78 T5 14 T14 51
auto[1] auto[0] auto[1] auto[1] auto[0] 185958 1 T5 24 T15 3837 T10 703
auto[1] auto[0] auto[1] auto[1] auto[1] 161505 1 T2 18 T5 76 T6 1
auto[1] auto[1] auto[0] auto[0] auto[0] 484898 1 T1 4098 T2 89 T3 1272
auto[1] auto[1] auto[0] auto[0] auto[1] 467454 1 T1 4445 T2 498 T3 1890
auto[1] auto[1] auto[0] auto[1] auto[0] 457768 1 T1 3410 T2 174 T3 492
auto[1] auto[1] auto[0] auto[1] auto[1] 481954 1 T1 621 T2 478 T3 2396
auto[1] auto[1] auto[1] auto[0] auto[0] 497767 1 T1 3891 T2 122 T3 926
auto[1] auto[1] auto[1] auto[0] auto[1] 449504 1 T1 4603 T3 6449 T5 60
auto[1] auto[1] auto[1] auto[1] auto[0] 443262 1 T1 2427 T2 12 T3 917
auto[1] auto[1] auto[1] auto[1] auto[1] 452673 1 T1 5689 T2 65 T3 3405


Summary for Cross fifo_full_cross

Samples crossed: sta_fifo_full hmac_en endian_swap digest_swap key_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 32 0 32 100.00


Automatically Generated Cross Bins for fifo_full_cross

Bins
sta_fifo_fullhmac_enendian_swapdigest_swapkey_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] auto[0] auto[0] 214675 1 T2 360 T5 23 T6 3
auto[0] auto[0] auto[0] auto[0] auto[1] 217433 1 T2 404 T6 4 T14 317
auto[0] auto[0] auto[0] auto[1] auto[0] 205535 1 T2 1395 T6 1 T14 1503
auto[0] auto[0] auto[0] auto[1] auto[1] 195875 1 T2 596 T5 28 T14 988
auto[0] auto[0] auto[1] auto[0] auto[0] 1856056 1 T2 1078 T4 2 T5 74
auto[0] auto[0] auto[1] auto[0] auto[1] 206088 1 T2 6018 T4 1 T5 14
auto[0] auto[0] auto[1] auto[1] auto[0] 218853 1 T5 24 T15 4022 T10 2108
auto[0] auto[0] auto[1] auto[1] auto[1] 193910 1 T2 340 T5 76 T6 3
auto[0] auto[1] auto[0] auto[0] auto[0] 524870 1 T1 4790 T2 373 T3 1272
auto[0] auto[1] auto[0] auto[0] auto[1] 511606 1 T1 5800 T2 1305 T3 1890
auto[0] auto[1] auto[0] auto[1] auto[0] 510504 1 T1 3410 T2 1552 T3 627
auto[0] auto[1] auto[0] auto[1] auto[1] 522288 1 T1 636 T2 1015 T3 2396
auto[0] auto[1] auto[1] auto[0] auto[0] 554991 1 T1 3891 T2 482 T3 1189
auto[0] auto[1] auto[1] auto[0] auto[1] 495682 1 T1 5644 T3 6701 T5 60
auto[0] auto[1] auto[1] auto[1] auto[0] 485568 1 T1 3273 T2 54 T3 1472
auto[0] auto[1] auto[1] auto[1] auto[1] 504391 1 T1 6576 T2 65 T3 4470
auto[1] auto[0] auto[0] auto[0] auto[0] 473 1 T14 30 T10 20 T124 84
auto[1] auto[0] auto[0] auto[0] auto[1] 1507 1 T14 27 T10 29 T124 4
auto[1] auto[0] auto[0] auto[1] auto[0] 775 1 T2 74 T125 6 T126 3
auto[1] auto[0] auto[0] auto[1] auto[1] 1209 1 T14 119 T10 126 T124 18
auto[1] auto[0] auto[1] auto[0] auto[0] 612 1 T2 6 T14 1 T10 12
auto[1] auto[0] auto[1] auto[0] auto[1] 555 1 T2 17 T36 6 T127 1
auto[1] auto[0] auto[1] auto[1] auto[0] 574 1 T10 7 T126 7 T128 29
auto[1] auto[0] auto[1] auto[1] auto[1] 442 1 T2 12 T10 37 T127 9
auto[1] auto[1] auto[0] auto[0] auto[0] 161 1 T10 4 T129 70 T128 14
auto[1] auto[1] auto[0] auto[0] auto[1] 193 1 T2 9 T36 6 T81 8
auto[1] auto[1] auto[0] auto[1] auto[0] 293 1 T125 1 T36 20 T126 14
auto[1] auto[1] auto[0] auto[1] auto[1] 406 1 T10 3 T129 135 T130 9
auto[1] auto[1] auto[1] auto[0] auto[0] 573 1 T2 6 T14 24 T131 13
auto[1] auto[1] auto[1] auto[0] auto[1] 432 1 T124 43 T126 44 T132 152
auto[1] auto[1] auto[1] auto[1] auto[0] 753 1 T10 8 T129 144 T131 7
auto[1] auto[1] auto[1] auto[1] auto[1] 380 1 T14 6 T10 17 T127 1


Summary for Cross fifo_depth_cross

Samples crossed: sta_fifo_depth hmac_en endian_swap digest_swap key_swap
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for fifo_depth_cross

Bins
sta_fifo_depthhmac_enendian_swapdigest_swapkey_swapCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fifo_depth[0] auto[0] auto[0] auto[0] auto[0] 185046 1 T2 5 T5 23 T6 1
fifo_depth[0] auto[0] auto[0] auto[0] auto[1] 188130 1 T2 141 T6 3 T14 18
fifo_depth[0] auto[0] auto[0] auto[1] auto[0] 172845 1 T2 22 T6 1 T14 1208
fifo_depth[0] auto[0] auto[0] auto[1] auto[1] 163694 1 T2 5 T5 28 T14 36
fifo_depth[0] auto[0] auto[1] auto[0] auto[0] 1717986 1 T2 227 T5 74 T6 1
fifo_depth[0] auto[0] auto[1] auto[0] auto[1] 169915 1 T2 78 T5 14 T14 51
fifo_depth[0] auto[0] auto[1] auto[1] auto[0] 185958 1 T5 24 T15 3837 T10 703
fifo_depth[0] auto[0] auto[1] auto[1] auto[1] 161505 1 T2 18 T5 76 T6 1
fifo_depth[0] auto[1] auto[0] auto[0] auto[0] 484898 1 T1 4098 T2 89 T3 1272
fifo_depth[0] auto[1] auto[0] auto[0] auto[1] 467454 1 T1 4445 T2 498 T3 1890
fifo_depth[0] auto[1] auto[0] auto[1] auto[0] 457768 1 T1 3410 T2 174 T3 492
fifo_depth[0] auto[1] auto[0] auto[1] auto[1] 481954 1 T1 621 T2 478 T3 2396
fifo_depth[0] auto[1] auto[1] auto[0] auto[0] 497767 1 T1 3891 T2 122 T3 926
fifo_depth[0] auto[1] auto[1] auto[0] auto[1] 449504 1 T1 4603 T3 6449 T5 60
fifo_depth[0] auto[1] auto[1] auto[1] auto[0] 443262 1 T1 2427 T2 12 T3 917
fifo_depth[0] auto[1] auto[1] auto[1] auto[1] 452673 1 T1 5689 T2 65 T3 3405
fifo_depth[1] auto[0] auto[0] auto[0] auto[0] 3510 1 T6 1 T14 11 T15 71
fifo_depth[1] auto[0] auto[0] auto[0] auto[1] 3472 1 T2 1 T15 104 T10 18
fifo_depth[1] auto[0] auto[0] auto[1] auto[0] 3228 1 T2 9 T14 50 T15 17
fifo_depth[1] auto[0] auto[0] auto[1] auto[1] 3024 1 T2 2 T14 7 T15 42
fifo_depth[1] auto[0] auto[1] auto[0] auto[0] 39351 1 T2 4 T14 21 T15 11
fifo_depth[1] auto[0] auto[1] auto[0] auto[1] 3415 1 T2 20 T15 107 T10 34
fifo_depth[1] auto[0] auto[1] auto[1] auto[0] 3822 1 T15 116 T10 16 T25 1
fifo_depth[1] auto[0] auto[1] auto[1] auto[1] 3239 1 T15 33 T10 113 T30 17
fifo_depth[1] auto[1] auto[0] auto[0] auto[0] 6492 1 T1 94 T15 10 T10 105
fifo_depth[1] auto[1] auto[0] auto[0] auto[1] 6995 1 T1 186 T5 1 T15 63
fifo_depth[1] auto[1] auto[0] auto[1] auto[0] 6203 1 T2 13 T3 23 T10 82
fifo_depth[1] auto[1] auto[0] auto[1] auto[1] 6298 1 T1 1 T2 2 T5 1
fifo_depth[1] auto[1] auto[1] auto[0] auto[0] 8548 1 T2 2 T3 35 T14 6
fifo_depth[1] auto[1] auto[1] auto[0] auto[1] 6189 1 T1 171 T3 35 T14 3
fifo_depth[1] auto[1] auto[1] auto[1] auto[0] 6614 1 T1 148 T2 1 T3 111
fifo_depth[1] auto[1] auto[1] auto[1] auto[1] 6827 1 T1 140 T3 150 T15 46
fifo_depth[2] auto[0] auto[0] auto[0] auto[0] 2830 1 T2 9 T14 13 T15 31
fifo_depth[2] auto[0] auto[0] auto[0] auto[1] 2614 1 T2 7 T14 3 T15 34
fifo_depth[2] auto[0] auto[0] auto[1] auto[0] 2601 1 T2 10 T14 52 T15 6
fifo_depth[2] auto[0] auto[0] auto[1] auto[1] 2351 1 T2 12 T14 9 T15 18
fifo_depth[2] auto[0] auto[1] auto[0] auto[0] 25683 1 T2 8 T14 3 T15 3
fifo_depth[2] auto[0] auto[1] auto[0] auto[1] 2783 1 T2 3 T15 44 T10 44
fifo_depth[2] auto[0] auto[1] auto[1] auto[0] 2838 1 T15 50 T10 27 T7 4
fifo_depth[2] auto[0] auto[1] auto[1] auto[1] 2796 1 T2 8 T15 23 T16 1
fifo_depth[2] auto[1] auto[0] auto[0] auto[0] 5904 1 T1 96 T2 3 T5 1
fifo_depth[2] auto[1] auto[0] auto[0] auto[1] 5734 1 T1 189 T15 25 T25 28
fifo_depth[2] auto[1] auto[0] auto[1] auto[0] 5287 1 T2 21 T3 20 T10 72
fifo_depth[2] auto[1] auto[0] auto[1] auto[1] 5358 1 T1 1 T2 2 T5 1
fifo_depth[2] auto[1] auto[1] auto[0] auto[0] 6838 1 T2 4 T3 38 T14 5
fifo_depth[2] auto[1] auto[1] auto[0] auto[1] 5081 1 T1 164 T3 36 T14 3
fifo_depth[2] auto[1] auto[1] auto[1] auto[0] 5684 1 T1 130 T2 1 T3 106
fifo_depth[2] auto[1] auto[1] auto[1] auto[1] 5834 1 T1 139 T3 156 T14 7
fifo_depth[3] auto[0] auto[0] auto[0] auto[0] 2052 1 T2 6 T14 11 T15 12
fifo_depth[3] auto[0] auto[0] auto[0] auto[1] 1923 1 T2 5 T14 1 T15 13
fifo_depth[3] auto[0] auto[0] auto[1] auto[0] 2063 1 T2 9 T14 48 T15 2
fifo_depth[3] auto[0] auto[0] auto[1] auto[1] 1752 1 T2 11 T14 8 T15 7
fifo_depth[3] auto[0] auto[1] auto[0] auto[0] 18944 1 T2 2 T14 21 T15 3
fifo_depth[3] auto[0] auto[1] auto[0] auto[1] 1968 1 T2 20 T15 13 T10 36
fifo_depth[3] auto[0] auto[1] auto[1] auto[0] 1960 1 T15 16 T10 30 T7 2
fifo_depth[3] auto[0] auto[1] auto[1] auto[1] 2126 1 T14 2 T15 3 T16 2
fifo_depth[3] auto[1] auto[0] auto[0] auto[0] 4743 1 T1 114 T2 2 T15 4
fifo_depth[3] auto[1] auto[0] auto[0] auto[1] 4842 1 T1 195 T15 8 T25 5
fifo_depth[3] auto[1] auto[0] auto[1] auto[0] 4405 1 T2 25 T3 24 T10 87
fifo_depth[3] auto[1] auto[0] auto[1] auto[1] 4502 1 T1 2 T15 2 T16 1
fifo_depth[3] auto[1] auto[1] auto[0] auto[0] 6010 1 T2 2 T3 39 T14 5
fifo_depth[3] auto[1] auto[1] auto[0] auto[1] 4388 1 T1 155 T3 39 T14 1
fifo_depth[3] auto[1] auto[1] auto[1] auto[0] 4673 1 T1 144 T3 95 T15 1
fifo_depth[3] auto[1] auto[1] auto[1] auto[1] 4850 1 T1 155 T3 161 T15 5
fifo_depth[4] auto[0] auto[0] auto[0] auto[0] 2084 1 T2 7 T14 13 T10 41
fifo_depth[4] auto[0] auto[0] auto[0] auto[1] 1956 1 T2 6 T14 1 T15 8
fifo_depth[4] auto[0] auto[0] auto[1] auto[0] 1952 1 T2 12 T14 48 T10 10
fifo_depth[4] auto[0] auto[0] auto[1] auto[1] 1789 1 T2 45 T14 11 T15 3
fifo_depth[4] auto[0] auto[1] auto[0] auto[0] 14148 1 T2 6 T4 1 T6 2
fifo_depth[4] auto[0] auto[1] auto[0] auto[1] 2254 1 T2 72 T15 1 T10 69
fifo_depth[4] auto[0] auto[1] auto[1] auto[0] 1933 1 T15 3 T10 42 T7 4
fifo_depth[4] auto[0] auto[1] auto[1] auto[1] 2372 1 T2 4 T14 1 T15 1
fifo_depth[4] auto[1] auto[0] auto[0] auto[0] 4562 1 T1 91 T2 2 T15 1
fifo_depth[4] auto[1] auto[0] auto[0] auto[1] 4489 1 T1 195 T5 1 T15 2
fifo_depth[4] auto[1] auto[0] auto[1] auto[0] 4065 1 T2 55 T3 14 T10 100
fifo_depth[4] auto[1] auto[0] auto[1] auto[1] 4246 1 T1 3 T2 2 T10 3
fifo_depth[4] auto[1] auto[1] auto[0] auto[0] 5528 1 T2 3 T3 47 T14 8
fifo_depth[4] auto[1] auto[1] auto[0] auto[1] 4115 1 T1 168 T3 30 T14 2
fifo_depth[4] auto[1] auto[1] auto[1] auto[0] 4660 1 T1 147 T3 91 T10 68
fifo_depth[4] auto[1] auto[1] auto[1] auto[1] 4691 1 T1 135 T3 155 T14 3
fifo_depth[5] auto[0] auto[0] auto[0] auto[0] 1437 1 T2 38 T14 12 T10 29
fifo_depth[5] auto[0] auto[0] auto[0] auto[1] 1353 1 T2 39 T14 1 T10 18
fifo_depth[5] auto[0] auto[0] auto[1] auto[0] 1569 1 T2 9 T14 50 T10 11
fifo_depth[5] auto[0] auto[0] auto[1] auto[1] 1452 1 T2 42 T14 7 T10 25
fifo_depth[5] auto[0] auto[1] auto[0] auto[0] 10070 1 T2 5 T14 20 T10 52
fifo_depth[5] auto[0] auto[1] auto[0] auto[1] 1551 1 T2 82 T10 67 T7 4
fifo_depth[5] auto[0] auto[1] auto[1] auto[0] 1351 1 T10 23 T7 2 T133 48
fifo_depth[5] auto[0] auto[1] auto[1] auto[1] 1810 1 T14 1 T10 117 T53 1
fifo_depth[5] auto[1] auto[0] auto[0] auto[0] 3921 1 T1 87 T2 3 T10 119
fifo_depth[5] auto[1] auto[0] auto[0] auto[1] 3893 1 T1 181 T10 1 T29 16
fifo_depth[5] auto[1] auto[0] auto[1] auto[0] 3405 1 T2 53 T3 22 T10 70
fifo_depth[5] auto[1] auto[0] auto[1] auto[1] 3653 1 T1 3 T2 2 T10 5
fifo_depth[5] auto[1] auto[1] auto[0] auto[0] 4802 1 T2 2 T3 35 T14 11
fifo_depth[5] auto[1] auto[1] auto[0] auto[1] 3539 1 T1 135 T3 35 T14 4
fifo_depth[5] auto[1] auto[1] auto[1] auto[0] 3747 1 T1 114 T2 1 T3 59
fifo_depth[5] auto[1] auto[1] auto[1] auto[1] 4006 1 T1 128 T3 131 T14 17
fifo_depth[6] auto[0] auto[0] auto[0] auto[0] 1431 1 T2 6 T14 14 T10 40
fifo_depth[6] auto[0] auto[0] auto[0] auto[1] 1167 1 T2 5 T6 1 T10 21
fifo_depth[6] auto[0] auto[0] auto[1] auto[0] 1449 1 T2 10 T14 43 T10 10
fifo_depth[6] auto[0] auto[0] auto[1] auto[1] 1186 1 T2 9 T14 8 T10 23
fifo_depth[6] auto[0] auto[1] auto[0] auto[0] 7414 1 T2 4 T14 34 T10 19
fifo_depth[6] auto[0] auto[1] auto[0] auto[1] 1991 1 T2 402 T10 22 T7 3
fifo_depth[6] auto[0] auto[1] auto[1] auto[0] 1207 1 T10 23 T7 2 T41 1
fifo_depth[6] auto[0] auto[1] auto[1] auto[1] 1652 1 T2 4 T14 1 T10 105
fifo_depth[6] auto[1] auto[0] auto[0] auto[0] 3450 1 T1 90 T2 3 T10 104
fifo_depth[6] auto[1] auto[0] auto[0] auto[1] 3206 1 T1 178 T2 1 T29 14
fifo_depth[6] auto[1] auto[0] auto[1] auto[0] 2905 1 T2 19 T3 12 T10 68
fifo_depth[6] auto[1] auto[0] auto[1] auto[1] 3032 1 T1 1 T2 13 T10 10
fifo_depth[6] auto[1] auto[1] auto[0] auto[0] 3823 1 T2 4 T3 37 T14 10
fifo_depth[6] auto[1] auto[1] auto[0] auto[1] 2830 1 T1 108 T3 27 T14 2
fifo_depth[6] auto[1] auto[1] auto[1] auto[0] 2793 1 T1 80 T2 1 T3 49
fifo_depth[6] auto[1] auto[1] auto[1] auto[1] 3225 1 T1 93 T3 127 T14 5
fifo_depth[7] auto[0] auto[0] auto[0] auto[0] 829 1 T2 6 T14 13 T10 19
fifo_depth[7] auto[0] auto[0] auto[0] auto[1] 844 1 T2 5 T14 1 T10 17
fifo_depth[7] auto[0] auto[0] auto[1] auto[0] 991 1 T2 9 T14 4 T16 1
fifo_depth[7] auto[0] auto[0] auto[1] auto[1] 965 1 T2 42 T14 14 T10 18
fifo_depth[7] auto[0] auto[1] auto[0] auto[0] 4534 1 T2 4 T14 19 T10 17
fifo_depth[7] auto[0] auto[1] auto[0] auto[1] 1408 1 T2 370 T4 1 T10 50
fifo_depth[7] auto[0] auto[1] auto[1] auto[0] 875 1 T10 18 T7 1 T133 16
fifo_depth[7] auto[0] auto[1] auto[1] auto[1] 1144 1 T10 122 T133 6 T40 22
fifo_depth[7] auto[1] auto[0] auto[0] auto[0] 2244 1 T1 51 T2 1 T10 87
fifo_depth[7] auto[1] auto[0] auto[0] auto[1] 2128 1 T1 118 T29 11 T7 1
fifo_depth[7] auto[1] auto[0] auto[1] auto[0] 1994 1 T2 51 T3 9 T10 57
fifo_depth[7] auto[1] auto[0] auto[1] auto[1] 2132 1 T1 1 T2 10 T10 8
fifo_depth[7] auto[1] auto[1] auto[0] auto[0] 2701 1 T2 3 T3 11 T14 6
fifo_depth[7] auto[1] auto[1] auto[0] auto[1] 1931 1 T1 79 T3 27 T14 2
fifo_depth[7] auto[1] auto[1] auto[1] auto[0] 1788 1 T1 49 T3 33 T10 38
fifo_depth[7] auto[1] auto[1] auto[1] auto[1] 2240 1 T1 48 T3 79 T14 27

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%