| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 6 | 0 | 6 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| hmac_errors | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 6 | 0 | 6 | 100.00 |
| NAME | COUNT | STATUS |
| illegalvalue | 0 | Illegal |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| invalid_config | 155073 | 1 | T1 | 11 | T2 | 20 | T4 | 1999 | ||||
| push_msg_when_disallowed | 8389000 | 1 | T1 | 7329 | T2 | 19041 | T4 | 15859 | ||||
| hash_start_when_active | 49557 | 1 | T55 | 404 | T52 | 737 | T56 | 1 | ||||
| update_secret_key_in_process | 3856656 | 1 | T15 | 15151 | T57 | 288320 | T52 | 14726 | ||||
| hash_start_when_sha_disabled | 1366 | 1 | T7 | 1 | T55 | 3 | T52 | 6 | ||||
| no_error | 196408 | 1 | T2 | 2746 | T3 | 4001 | T5 | 358 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |