| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 6 | 0 | 6 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| hmac_errors | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 6 | 0 | 6 | 100.00 |
| NAME | COUNT | STATUS |
| illegalvalue | 0 | Illegal |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| invalid_config | 134584 | 1 | T1 | 17 | T4 | 2 | T5 | 4 | ||||
| push_msg_when_disallowed | 6373289 | 1 | T1 | 413 | T4 | 1393 | T5 | 135 | ||||
| hash_start_when_active | 40325 | 1 | T46 | 3 | T47 | 887 | T48 | 418 | ||||
| update_secret_key_in_process | 3801196 | 1 | T42 | 944 | T43 | 9147 | T44 | 12047 | ||||
| hash_start_when_sha_disabled | 727 | 1 | T45 | 2 | T46 | 1 | T47 | 554 | ||||
| no_error | 173632 | 1 | T5 | 13 | T6 | 64 | T7 | 54 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |