69c572b503| Build Mode | Flow Infos | Flow Warnings | Flow Errors | Lint Infos | Lint Warnings | Lint Errors |
|---|---|---|---|---|---|---|
| default | 0 | 0 | 0 | 367 | 0 | 0 |
'default'I FSM_DEFAULT_REQ: hmac.sv:184 Next state register 'done_state_d' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_diff_decode.sv:158 Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine New
I NESTED_SUBPROG: prim_sha2_pkg.sv:148 Function 'rotr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:151 Function 'rotr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:197 Function 'rotr64' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:200 Function 'rotr64' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:219 Function 'rotr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:219 Function 'shiftr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:220 Function 'rotr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:220 Function 'shiftr32' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:229 Function 'rotr64' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:229 Function 'shiftr64' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:230 Function 'rotr64' is called from within a function New
I NESTED_SUBPROG: prim_sha2_pkg.sv:230 Function 'shiftr64' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:143 Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:176 Function 'extract_h2d_cmd_intg' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:178 Function 'prim_secded_pkg::prim_secded_inv_64_57_enc' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:187 Function 'prim_secded_pkg::prim_secded_inv_39_32_enc' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:196 Function 'get_cmd_intg' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:203 Function 'get_data_intg' is called from within a function New
I VAR_INDEX_WRITE: hmac.sv:208 Variable range select expression 'secret_key_d[32 * i +: 32]' encountered New
I VAR_INDEX_WRITE: hmac.sv:251 Variable index expression 'digest_sw[i / 2]' encountered New
I VAR_INDEX_WRITE: hmac.sv:252 Variable index expression 'digest_sw_we[i / 2]' encountered New
I VAR_INDEX_WRITE: hmac.sv:257 Variable index expression 'digest_sw[i / 2]' encountered New
I VAR_INDEX_WRITE: hmac.sv:258 Variable index expression 'digest_sw_we[i / 2]' encountered New
I VAR_INDEX_WRITE: prim_fifo_sync.sv:124 Variable index expression 'gen_normal_fifo.storage[gen_normal_fifo.fifo_wptr]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:390 Variable index expression 'wmask_intg[woffset]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:391 Variable index expression 'wdata_intg[woffset]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:455 Variable range select expression 'gen_rmask.rmask[8 * i +: 8]' encountered New
I CASE_INC: hmac.sv:274 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: hmac.sv:295 Case statement tag not specified for value 'b000000 and many other values New
I CASE_INC: hmac_core.sv:132 Case statement tag not specified for value 'b000000 and many other values New
I CASE_INC: hmac_core.sv:234 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: hmac_core.sv:256 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: hmac_core.sv:323 Case statement tag not specified for value 'b111 New
I CASE_INC: prim_alert_sender.sv:199 Case statement tag not specified for value 'b111 New
I CASE_INC: prim_diff_decode.sv:115 Case statement tag not specified for value 'b11 New
I CASE_INC: prim_sha2.sv:335 Case statement tag not specified for value 'b11 New
I CASE_INC: prim_sha2.sv:416 Case statement tag not specified for value 'b11 New
I CASE_INC: prim_sha2_pad.sv:83 Case statement tag not specified for value 'b101 and 2 other values New
I CASE_INC: prim_sha2_pad.sv:184 Case statement tag not specified for value 'b110 and 1 other value New
I CASE_INC: tlul_err.sv:62 Case statement tag not specified for value 'h3 New
I CASE_SEL_CONST: hmac.sv:801 Constant value '1'b1' found as case statement selector New
I EXTRA_PARENS: prim_sha2_32.sv:166 '(gen_multimode_logic.word_part_reset || hash_go || !sha_en_i)' is enclosed within two sets of parenthesis New
I ONE_BIT_VEC: hmac.sv:13 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'AlertAsyncOn' has a length of one, instance 'hmac' of module 'hmac' (NumAlerts=1) New
I ONE_BIT_VEC: hmac.sv:21 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_rx_i' has a length of one, instance 'hmac' of module 'hmac' (NumAlerts=1) New
I ONE_BIT_VEC: hmac.sv:22 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_tx_o' has a length of one, instance 'hmac' of module 'hmac' (NumAlerts=1) New
I ONE_BIT_VEC: hmac.sv:716 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_test' has a length of one, instance 'hmac' of module 'hmac' (NumAlerts=1) New
I ONE_BIT_VEC: hmac.sv:740 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'AlertIsFatal' has a length of one, instance 'hmac' of module 'hmac' (NumAlerts=1) New
I ONE_BIT_VEC: hmac_reg_pkg.sv:301 Declaration range '[0:0]' of 'HMAC_CFG_ENDIAN_SWAP_RESVAL' has a length of one New
I ONE_BIT_VEC: hmac_reg_pkg.sv:302 Declaration range '[0:0]' of 'HMAC_CFG_DIGEST_SWAP_RESVAL' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:97 Declaration range '[0:0]' of 'reg_steer' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:577 Declaration range '[0:0]' of 'alert_test_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:842 Declaration range '[0:0]' of 'wipe_secret_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:863 Declaration range '[0:0]' of 'key_0_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:884 Declaration range '[0:0]' of 'key_1_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:905 Declaration range '[0:0]' of 'key_2_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:926 Declaration range '[0:0]' of 'key_3_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:947 Declaration range '[0:0]' of 'key_4_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:968 Declaration range '[0:0]' of 'key_5_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:989 Declaration range '[0:0]' of 'key_6_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1010 Declaration range '[0:0]' of 'key_7_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1031 Declaration range '[0:0]' of 'key_8_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1052 Declaration range '[0:0]' of 'key_9_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1073 Declaration range '[0:0]' of 'key_10_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1094 Declaration range '[0:0]' of 'key_11_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1115 Declaration range '[0:0]' of 'key_12_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1136 Declaration range '[0:0]' of 'key_13_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1157 Declaration range '[0:0]' of 'key_14_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1178 Declaration range '[0:0]' of 'key_15_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1199 Declaration range '[0:0]' of 'key_16_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1220 Declaration range '[0:0]' of 'key_17_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1241 Declaration range '[0:0]' of 'key_18_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1262 Declaration range '[0:0]' of 'key_19_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1283 Declaration range '[0:0]' of 'key_20_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1304 Declaration range '[0:0]' of 'key_21_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1325 Declaration range '[0:0]' of 'key_22_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1346 Declaration range '[0:0]' of 'key_23_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1367 Declaration range '[0:0]' of 'key_24_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1388 Declaration range '[0:0]' of 'key_25_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1409 Declaration range '[0:0]' of 'key_26_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1430 Declaration range '[0:0]' of 'key_27_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1451 Declaration range '[0:0]' of 'key_28_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1472 Declaration range '[0:0]' of 'key_29_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1493 Declaration range '[0:0]' of 'key_30_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1514 Declaration range '[0:0]' of 'key_31_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1535 Declaration range '[0:0]' of 'digest_0_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1556 Declaration range '[0:0]' of 'digest_1_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1577 Declaration range '[0:0]' of 'digest_2_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1598 Declaration range '[0:0]' of 'digest_3_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1619 Declaration range '[0:0]' of 'digest_4_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1640 Declaration range '[0:0]' of 'digest_5_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1661 Declaration range '[0:0]' of 'digest_6_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1682 Declaration range '[0:0]' of 'digest_7_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1703 Declaration range '[0:0]' of 'digest_8_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1724 Declaration range '[0:0]' of 'digest_9_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1745 Declaration range '[0:0]' of 'digest_10_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1766 Declaration range '[0:0]' of 'digest_11_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1787 Declaration range '[0:0]' of 'digest_12_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1808 Declaration range '[0:0]' of 'digest_13_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1829 Declaration range '[0:0]' of 'digest_14_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1850 Declaration range '[0:0]' of 'digest_15_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1870 Declaration range '[0:0]' of 'msg_length_lower_flds_we' has a length of one New
I ONE_BIT_VEC: hmac_reg_top.sv:1890 Declaration range '[0:0]' of 'msg_length_upper_flds_we' has a length of one New
I ONE_BIT_VEC: prim_buf.sv:24 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_buf.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:22 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:27 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:28 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:44 Declaration range '[Width - 1:0]' ([0:0]) of 'event_intr_i' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:47 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_enable_q_i' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:48 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_test_q_i' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:50 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_state_q_i' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:52 Declaration range '[Width - 1:0]' ([0:0]) of 'hw2reg_intr_state_d_o' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:55 Declaration range '[Width - 1:0]' ([0:0]) of 'intr_o' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:58 Declaration range '[Width - 1:0]' ([0:0]) of 'status' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:61 Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_event.new_event' has a length of one, instance 'hmac.intr_hw_hmac_done' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:72 Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_status.test_q' has a length of one, instance 'hmac.intr_hw_fifo_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_fifo_sync.sv:32 Declaration range '[DepthW - 1:0]' ([0:0]) of 'depth_o' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo' of module 'prim_fifo_sync' (Depth=1,DepthW=1 ('prim_util_pkg::vbits(Depth + 1)')) New
I ONE_BIT_VEC: prim_fifo_sync.sv:63 Declaration range '[gen_normal_fifo.PtrW - 1:0]' ([0:0]) of 'gen_normal_fifo.fifo_wptr' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo' of module 'prim_fifo_sync' (Depth=1,gen_normal_fifo.PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync.sv:105 Declaration range '[Depth - 1:0]' ([0:0]) of 'gen_normal_fifo.storage' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo' of module 'prim_fifo_sync' (Depth=1,Width=17) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:25 Declaration range '[PtrW - 1:0]' ([0:0]) of 'wptr_o' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:26 Declaration range '[PtrW - 1:0]' ([0:0]) of 'rptr_o' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:31 Declaration range '[DepthW - 1:0]' ([0:0]) of 'depth_o' has a length of one, instance 'hmac.u_tlul_adapter.u_reqfifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,DepthW=1 ('prim_util_pkg::vbits(Depth + 1)')) New
I ONE_BIT_VEC: prim_flop_2sync.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:16 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:17 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:20 Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:21 Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:9 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:13 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'hmac.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_subreg.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:25 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:29 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:34 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:35 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:39 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:17 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:24 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:28 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'hmac.u_reg.u_intr_state_hmac_done.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:36 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'hmac.u_reg.u_intr_enable_hmac_done.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:47 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_wd' has a length of one, instance 'hmac.u_reg.u_intr_state_fifo_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:48 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_q' has a length of one, instance 'hmac.u_reg.u_intr_state_fifo_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'hmac.u_reg.u_intr_test_hmac_done' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:14 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'hmac.u_reg.u_intr_test_hmac_done' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:19 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'hmac.u_reg.u_intr_test_hmac_done' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:20 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'hmac.u_reg.u_intr_test_hmac_done' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'hmac.u_reg.u_intr_test_hmac_done' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:180 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'sram_req_t' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:180 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'sramreqfifo_wdata' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:180 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'woffset' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:349 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'woffset' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:362 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_combined' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:363 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_combined' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:366 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_int' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:367 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_int' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:370 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_intg' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataIntgWidth=7,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:371 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_intg' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataIntgWidth=7,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:431 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'rdata_reshaped' has a length of one, instance 'hmac.u_tlul_adapter' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:23 Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_i' has a length of one, instance 'hmac.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareReqW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:24 Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_o' has a length of one, instance 'hmac.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareReqW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:25 Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_i' has a length of one, instance 'hmac.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareRspW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:26 Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_o' has a length of one, instance 'hmac.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareRspW=1) New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_h_o' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_int' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_out' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_socket_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_sram_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_p' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_u_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_i' has a length of one New
I ONE_BIT_VEC: tlul_socket_1n.sv:67 Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_i' has a length of one, instance 'hmac.u_reg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)')) New
I ONE_BIT_VEC: tlul_socket_1n.sv:78 Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_t' has a length of one, instance 'hmac.u_reg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)')) New
I ONE_BIT_VEC: tlul_socket_1n.sv:108 Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_outstanding' has a length of one, instance 'hmac.u_reg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)')) New
I UNREACHABLE: prim_packer.sv:85 'g_pos_nodup.pos_d' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_packer.sv:206 'stored_data_next' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_packer.sv:207 'stored_mask_next' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_packer.sv:271 'flush_st_next' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_packer.sv:273 'flush_valid' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_packer.sv:274 'flush_done' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_sha2_pad.sv:100 'shaf_rdata_o' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: prim_sha2_pad.sv:112 'shaf_rdata_o' is assigned to a non-x value within the default branch of a fully specified case statement New
I EXPLICIT_BITLEN: hmac.sv:246 Bit length not specified for constant '2' New
I EXPLICIT_BITLEN: prim_fifo_sync_cnt.sv:51 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_sync_cnt.sv:52 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:116 Bit length not specified for constant '8' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:121 Bit length not specified for constant '8' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:148 Bit length not specified for constant '11' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:148 Bit length not specified for constant '25' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:148 Bit length not specified for constant '6' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:151 Bit length not specified for constant '13' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:151 Bit length not specified for constant '2' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:151 Bit length not specified for constant '22' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:173 Bit length not specified for constant '11' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:173 Bit length not specified for constant '25' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:173 Bit length not specified for constant '6' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:176 Bit length not specified for constant '13' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:176 Bit length not specified for constant '2' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:176 Bit length not specified for constant '22' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:197 Bit length not specified for constant '14' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:197 Bit length not specified for constant '18' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:197 Bit length not specified for constant '41' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:200 Bit length not specified for constant '28' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:200 Bit length not specified for constant '34' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:200 Bit length not specified for constant '39' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:219 Bit length not specified for constant '18' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:219 Bit length not specified for constant '3' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:219 Bit length not specified for constant '7' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:220 Bit length not specified for constant '10' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:220 Bit length not specified for constant '17' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:220 Bit length not specified for constant '19' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:229 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:229 Bit length not specified for constant '7' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:229 Bit length not specified for constant '8' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:230 Bit length not specified for constant '19' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:230 Bit length not specified for constant '6' New
I EXPLICIT_BITLEN: prim_sha2_pkg.sv:230 Bit length not specified for constant '61' New
I EXPLICIT_BITLEN: prim_util_pkg.sv:85 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_sram_byte.sv:108 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_err.sv:69 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: tlul_err.sv:77 Bit length not specified for constant "'h2" New
I INSIDE_OP_CONTEXT: tlul_adapter_sram.sv:343 'inside' operator is not within an always block or subprogram New
I MIN_NAME_LEN: hmac.sv:206 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac.sv:225 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac.sv:589 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac.sv:781 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:23 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:26 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:29 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:35 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:38 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:41 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:47 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:51 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:55 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:61 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:67 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:71 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:75 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:79 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:83 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:87 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:94 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:98 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:102 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:106 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:112 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:117 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:122 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:127 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:132 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:138 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:142 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:146 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:153 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:156 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:159 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:162 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:165 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:168 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:174 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:177 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:180 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:185 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:190 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:194 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:198 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: hmac_reg_pkg.sv:202 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_packer.sv:66 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_packer.sv:158 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:85 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:111 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:217 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:243 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:349 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:375 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:481 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:507 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:146 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:158 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:162 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:172 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:247 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:253 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2.sv:257 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:115 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:120 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:125 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:129 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:133 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:137 Name 'v' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:142 Name 'w' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:143 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:168 Name 'w' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:169 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:192 Name 'w' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sha2_pkg.sv:193 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:25 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:29 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:21 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:24 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:14 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:19 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_adapter_sram.sv:378 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_adapter_sram.sv:454 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_sram_byte.sv:191 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_socket_1n.sv:45 Name 'N' is shorter than minimum length 2 New
I CONST_OUTPUT: prim_intr_hw.sv:80 Output 'hw2reg_intr_state_de_o' is driven by constant one in module 'prim_intr_hw' (IntrT="Status") New
I CONST_OUTPUT: prim_packer.sv:99 Output 'err_o' is driven by constant zero New
I CONST_OUTPUT: prim_fifo_sync.sv:41 Output 'depth_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6c,Depth=32'h0) New
I CONST_OUTPUT: prim_fifo_sync.sv:56 Output 'err_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6c,Depth=32'h0) New
I CONST_OUTPUT: prim_fifo_sync.sv:98 Output 'err_o' is driven by constant zero by port 'gen_normal_fifo.u_fifo_cnt.err_o' in module 'prim_fifo_sync' (Width=32'h24,Depth=32'h20) New
I CONST_OUTPUT: prim_fifo_sync_cnt.sv:136 Output 'err_o' is driven by constant zero in module 'prim_fifo_sync_cnt' (Depth=32'h20) New
I CONST_OUTPUT: tlul_adapter_reg.sv:91 Output 'addr_o[1:0]' is driven by constant zeros in module 'tlul_adapter_reg' (RegAw=13) New
I CONST_OUTPUT: tlul_adapter_reg.sv:195 Output 'intg_error_o' is driven by constant zero in module 'tlul_adapter_reg' (RegAw=13) New
I CONST_OUTPUT: tlul_adapter_sram.sv:163 Output 'rmw_in_progress_o' is driven by constant zero by port 'u_sram_byte.rmw_in_progress_o' in module 'tlul_adapter_sram' (SramAw=9,ErrOnRead=1) New
I CONST_OUTPUT: tlul_sram_byte.sv:326 Output 'rmw_in_progress_o' is driven by constant zero New