HMAC Lint Results
Saturday June 08 2024 00:41:57 UTC
Branch: os_regression
Tool: VERILATOR
| Build Mode |
Flow Infos |
Flow Warnings |
Flow Errors |
Lint Infos |
Lint Warnings |
Lint Errors |
| default |
0 |
0 |
2 |
0 |
5 |
0 |
Messages for Build Mode 'default'
Flow Errors
ERROR: %Warning-WIDTH: ../src/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv:296:24: Operator ASSIGNDLY expects 4 bits on the Assign RHS, but Assign RHS's CONST '3'h0' generates 3 bits.
ERROR: Failed to build lowrisc:ip:hmac:0.1 : '['make', 'Vhmac.mk']' exited with an error: 2
Lint Warnings
%Warning-WIDTH: ../src/lowrisc_ip_hmac_0.1/rtl/hmac_core.sv:298:24: Operator ASSIGNDLY expects 4 bits on the Assign RHS, but Assign RHS's CONST '3'h0' generates 3 bits.
%Warning-WIDTH: ../src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:548:57: Operator SHIFTR expects 32 or 7 bits on the LHS, but LHS's VARREF 'hmac_fifo_wdata_sel' generates 4 bits.
%Warning-UNUSED: ../src/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv:267:19: Signal is not used: 'sramreqaddrfifo_wdata'
%Warning-UNUSED: ../src/lowrisc_tlul_adapter_sram_0.1/rtl/tlul_adapter_sram.sv:267:42: Signal is not driven, nor used: 'sramreqaddrfifo_rdata'
%Warning-LATCH: ../src/lowrisc_ip_hmac_0.1/rtl/hmac.sv:536:3: Latch inferred for signal 'hmac.index' (not all control paths of combinational always assign a value)
Past Results