Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

3964

1

T1

14

T2

22

T15

6

auto[1]

2014

1

T2

2

T15

2

T41

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	154	1			T15	2		T18	2		T43	2
auto[134217728:268435455]	216	1			T2	2		T15	2		T18	2
auto[268435456:402653183]	210	1			T42	2		T43	2		T54	4
auto[402653184:536870911]	184	1			T1	2		T101	2		T54	6
auto[536870912:671088639]	190	1			T1	2		T2	2		T41	2
auto[671088640:805306367]	204	1			T15	2		T52	2		T160	2
auto[805306368:939524095]	146	1			T54	2		T26	2		T52	2
auto[939524096:1073741823]	184	1			T2	4		T42	2		T196	2
auto[1073741824:1207959551]	190	1			T101	2		T54	4		T269	2
auto[1207959552:1342177279]	204	1			T1	2		T41	2		T196	2
auto[1342177280:1476395007]	214	1			T1	6		T134	2		T54	6
auto[1476395008:1610612735]	164	1			T25	2		T54	2		T137	2
auto[1610612736:1744830463]	182	1			T41	2		T43	2		T54	2
auto[1744830464:1879048191]	188	1			T2	2		T101	2		T54	2
auto[1879048192:2013265919]	156	1			T43	2		T54	2		T136	2
auto[2013265920:2147483647]	192	1			T54	4		T102	2		T136	2
auto[2147483648:2281701375]	204	1			T18	4		T42	2		T120	2
auto[2281701376:2415919103]	218	1			T1	2		T54	6		T102	2
auto[2415919104:2550136831]	156	1			T2	2		T54	6		T55	2
auto[2550136832:2684354559]	186	1			T120	2		T170	2		T27	2
auto[2684354560:2818572287]	188	1			T41	2		T101	2		T7	2
auto[2818572288:2952790015]	194	1			T2	2		T41	2		T54	2
auto[2952790016:3087007743]	198	1			T15	2		T43	2		T47	2
auto[3087007744:3221225471]	168	1			T101	2		T48	2		T44	2
auto[3221225472:3355443199]	188	1			T54	2		T237	2		T5	2
auto[3355443200:3489660927]	166	1			T196	2		T54	2		T102	2
auto[3489660928:3623878655]	166	1			T41	2		T134	2		T269	2
auto[3623878656:3758096383]	192	1			T2	2		T54	10		T5	2
auto[3758096384:3892314111]	178	1			T2	2		T43	2		T7	2
auto[3892314112:4026531839]	176	1			T2	2		T46	2		T7	2
auto[4026531840:4160749567]	224	1			T2	2		T54	4		T159	2
auto[4160749568:4294967295]	198	1			T2	2		T43	2		T54	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	104	1			T15	2		T18	2		T170	2
auto[0:134217727]	auto[1]	50	1			T43	2		T137	2		T284	2
auto[134217728:268435455]	auto[0]	132	1			T2	2		T15	2		T18	2
auto[134217728:268435455]	auto[1]	84	1			T42	2		T140	2		T54	4
auto[268435456:402653183]	auto[0]	144	1			T42	2		T237	2		T60	2
auto[268435456:402653183]	auto[1]	66	1			T43	2		T54	4		T6	2
auto[402653184:536870911]	auto[0]	130	1			T1	2		T101	2		T54	6
auto[402653184:536870911]	auto[1]	54	1			T237	2		T65	2		T91	2
auto[536870912:671088639]	auto[0]	114	1			T1	2		T2	2		T41	2
auto[536870912:671088639]	auto[1]	76	1			T54	4		T61	2		T87	2
auto[671088640:805306367]	auto[0]	130	1			T160	2		T6	2		T57	2
auto[671088640:805306367]	auto[1]	74	1			T15	2		T52	2		T6	2
auto[805306368:939524095]	auto[0]	116	1			T54	2		T26	2		T52	2
auto[805306368:939524095]	auto[1]	30	1			T245	2		T251	2		T64	2
auto[939524096:1073741823]	auto[0]	128	1			T2	2		T196	2		T52	2
auto[939524096:1073741823]	auto[1]	56	1			T2	2		T42	2		T54	2
auto[1073741824:1207959551]	auto[0]	140	1			T54	4		T52	2		T60	2
auto[1073741824:1207959551]	auto[1]	50	1			T101	2		T269	2		T137	2
auto[1207959552:1342177279]	auto[0]	134	1			T1	2		T41	2		T196	2
auto[1207959552:1342177279]	auto[1]	70	1			T120	2		T140	2		T54	2
auto[1342177280:1476395007]	auto[0]	142	1			T1	6		T54	6		T5	2
auto[1342177280:1476395007]	auto[1]	72	1			T134	2		T159	2		T145	2
auto[1476395008:1610612735]	auto[0]	102	1			T25	2		T54	2		T137	2
auto[1476395008:1610612735]	auto[1]	62	1			T159	2		T103	4		T61	2
auto[1610612736:1744830463]	auto[0]	128	1			T43	2		T54	2		T6	4
auto[1610612736:1744830463]	auto[1]	54	1			T41	2		T19	2		T102	2
auto[1744830464:1879048191]	auto[0]	136	1			T2	2		T101	2		T54	2
auto[1744830464:1879048191]	auto[1]	52	1			T214	2		T241	2		T213	2
auto[1879048192:2013265919]	auto[0]	108	1			T43	2		T54	2		T136	2
auto[1879048192:2013265919]	auto[1]	48	1			T5	2		T392	2		T199	2
auto[2013265920:2147483647]	auto[0]	122	1			T54	2		T136	2		T159	2
auto[2013265920:2147483647]	auto[1]	70	1			T54	2		T102	2		T61	2
auto[2147483648:2281701375]	auto[0]	128	1			T18	4		T42	2		T120	2
auto[2147483648:2281701375]	auto[1]	76	1			T47	2		T44	4		T61	4
auto[2281701376:2415919103]	auto[0]	128	1			T1	2		T54	4		T55	2
auto[2281701376:2415919103]	auto[1]	90	1			T54	2		T102	2		T137	2
auto[2415919104:2550136831]	auto[0]	100	1			T2	2		T54	4		T211	2
auto[2415919104:2550136831]	auto[1]	56	1			T54	2		T55	2		T93	2
auto[2550136832:2684354559]	auto[0]	112	1			T120	2		T170	2		T27	2
auto[2550136832:2684354559]	auto[1]	74	1			T33	2		T70	6		T86	4
auto[2684354560:2818572287]	auto[0]	122	1			T41	2		T237	2		T102	2
auto[2684354560:2818572287]	auto[1]	66	1			T101	2		T7	2		T8	2
auto[2818572288:2952790015]	auto[0]	132	1			T2	2		T54	2		T269	2
auto[2818572288:2952790015]	auto[1]	62	1			T41	2		T127	2		T160	2
auto[2952790016:3087007743]	auto[0]	146	1			T15	2		T43	2		T47	2
auto[2952790016:3087007743]	auto[1]	52	1			T68	2		T93	2		T271	2
auto[3087007744:3221225471]	auto[0]	112	1			T44	2		T147	2		T33	2
auto[3087007744:3221225471]	auto[1]	56	1			T101	2		T48	2		T28	2
auto[3221225472:3355443199]	auto[0]	112	1			T5	2		T61	4		T97	2
auto[3221225472:3355443199]	auto[1]	76	1			T54	2		T237	2		T6	2
auto[3355443200:3489660927]	auto[0]	108	1			T54	2		T102	2		T45	2
auto[3355443200:3489660927]	auto[1]	58	1			T196	2		T145	2		T30	2
auto[3489660928:3623878655]	auto[0]	100	1			T41	2		T134	2		T52	2
auto[3489660928:3623878655]	auto[1]	66	1			T269	2		T44	2		T159	2
auto[3623878656:3758096383]	auto[0]	132	1			T2	2		T54	6		T5	2
auto[3623878656:3758096383]	auto[1]	60	1			T54	4		T6	2		T28	2
auto[3758096384:3892314111]	auto[0]	114	1			T2	2		T43	2		T7	2
auto[3758096384:3892314111]	auto[1]	64	1			T54	2		T26	2		T44	2
auto[3892314112:4026531839]	auto[0]	130	1			T2	2		T7	2		T159	2
auto[3892314112:4026531839]	auto[1]	46	1			T46	2		T8	2		T102	2
auto[4026531840:4160749567]	auto[0]	156	1			T2	2		T54	2		T159	2
auto[4026531840:4160749567]	auto[1]	68	1			T54	2		T5	2		T67	2
auto[4160749568:4294967295]	auto[0]	122	1			T2	2		T43	2		T6	6
auto[4160749568:4294967295]	auto[1]	76	1			T54	2		T6	2		T61	2