Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4247

1

T1

2

T3

10

T4

4

auto[1]

1936

1

T3

12

T4

4

T14

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	188	1			T3	2		T17	2		T5	4
auto[134217728:268435455]	190	1			T17	4		T41	2		T5	4
auto[268435456:402653183]	208	1			T41	2		T214	4		T6	2
auto[402653184:536870911]	164	1			T41	2		T5	2		T6	2
auto[536870912:671088639]	202	1			T34	2		T5	2		T138	4
auto[671088640:805306367]	196	1			T4	2		T5	8		T116	2
auto[805306368:939524095]	160	1			T17	2		T5	4		T83	2
auto[939524096:1073741823]	186	1			T5	2		T47	2		T7	8
auto[1073741824:1207959551]	190	1			T3	2		T5	6		T82	2
auto[1207959552:1342177279]	218	1			T3	4		T5	2		T27	2
auto[1342177280:1476395007]	154	1			T5	6		T27	2		T42	2
auto[1476395008:1610612735]	178	1			T3	2		T14	2		T5	2
auto[1610612736:1744830463]	198	1			T5	6		T6	4		T149	2
auto[1744830464:1879048191]	186	1			T4	2		T14	2		T5	2
auto[1879048192:2013265919]	188	1			T5	8		T63	2		T213	2
auto[2013265920:2147483647]	194	1			T3	2		T17	2		T5	2
auto[2147483648:2281701375]	184	1			T34	2		T5	4		T48	2
auto[2281701376:2415919103]	176	1			T5	6		T138	2		T35	2
auto[2415919104:2550136831]	198	1			T5	6		T83	2		T133	2
auto[2550136832:2684354559]	202	1			T41	2		T5	2		T83	2
auto[2684354560:2818572287]	220	1			T3	2		T5	6		T51	2
auto[2818572288:2952790015]	192	1			T3	2		T41	2		T63	2
auto[2952790016:3087007743]	195	1			T5	4		T214	2		T48	2
auto[3087007744:3221225471]	236	1			T3	2		T4	2		T5	2
auto[3221225472:3355443199]	216	1			T5	2		T63	4		T48	2
auto[3355443200:3489660927]	174	1			T3	4		T36	2		T42	2
auto[3489660928:3623878655]	200	1			T17	2		T34	2		T5	2
auto[3623878656:3758096383]	208	1			T4	2		T5	4		T138	4
auto[3758096384:3892314111]	172	1			T5	6		T27	2		T47	2
auto[3892314112:4026531839]	198	1			T1	2		T82	2		T27	2
auto[4026531840:4160749567]	230	1			T5	8		T214	2		T6	4
auto[4160749568:4294967295]	182	1			T14	2		T5	2		T82	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	132	1			T17	2		T5	2		T214	2
auto[0:134217727]	auto[1]	56	1			T3	2		T5	2		T133	2
auto[134217728:268435455]	auto[0]	134	1			T17	4		T5	4		T116	2
auto[134217728:268435455]	auto[1]	56	1			T41	2		T6	4		T7	2
auto[268435456:402653183]	auto[0]	126	1			T41	2		T214	4		T6	2
auto[268435456:402653183]	auto[1]	82	1			T196	2		T139	2		T7	2
auto[402653184:536870911]	auto[0]	118	1			T41	2		T7	2		T61	4
auto[402653184:536870911]	auto[1]	46	1			T5	2		T6	2		T89	2
auto[536870912:671088639]	auto[0]	154	1			T34	2		T5	2		T138	4
auto[536870912:671088639]	auto[1]	48	1			T213	2		T25	2		T7	2
auto[671088640:805306367]	auto[0]	130	1			T4	2		T5	8		T116	2
auto[671088640:805306367]	auto[1]	66	1			T25	2		T6	2		T7	2
auto[805306368:939524095]	auto[0]	98	1			T5	4		T61	2		T425	2
auto[805306368:939524095]	auto[1]	62	1			T17	2		T83	2		T27	2
auto[939524096:1073741823]	auto[0]	116	1			T5	2		T47	2		T7	2
auto[939524096:1073741823]	auto[1]	70	1			T7	6		T43	2		T86	4
auto[1073741824:1207959551]	auto[0]	124	1			T3	2		T5	4		T82	2
auto[1073741824:1207959551]	auto[1]	66	1			T5	2		T138	2		T37	2
auto[1207959552:1342177279]	auto[0]	172	1			T3	2		T27	2		T42	2
auto[1207959552:1342177279]	auto[1]	46	1			T3	2		T5	2		T199	2
auto[1342177280:1476395007]	auto[0]	100	1			T5	6		T27	2		T6	2
auto[1342177280:1476395007]	auto[1]	54	1			T42	2		T7	2		T375	2
auto[1476395008:1610612735]	auto[0]	136	1			T14	2		T5	2		T133	2
auto[1476395008:1610612735]	auto[1]	42	1			T3	2		T6	2		T7	4
auto[1610612736:1744830463]	auto[0]	128	1			T5	2		T149	2		T7	2
auto[1610612736:1744830463]	auto[1]	70	1			T5	4		T6	4		T392	2
auto[1744830464:1879048191]	auto[0]	138	1			T14	2		T5	2		T42	2
auto[1744830464:1879048191]	auto[1]	48	1			T4	2		T51	2		T392	2
auto[1879048192:2013265919]	auto[0]	128	1			T5	6		T149	2		T156	4
auto[1879048192:2013265919]	auto[1]	60	1			T5	2		T63	2		T213	2
auto[2013265920:2147483647]	auto[0]	134	1			T17	2		T127	4		T6	4
auto[2013265920:2147483647]	auto[1]	60	1			T3	2		T5	2		T54	2
auto[2147483648:2281701375]	auto[0]	116	1			T5	4		T6	2		T50	2
auto[2147483648:2281701375]	auto[1]	68	1			T34	2		T48	2		T6	2
auto[2281701376:2415919103]	auto[0]	108	1			T5	4		T138	2		T35	2
auto[2281701376:2415919103]	auto[1]	68	1			T5	2		T149	2		T61	2
auto[2415919104:2550136831]	auto[0]	138	1			T5	4		T64	2		T139	2
auto[2415919104:2550136831]	auto[1]	60	1			T5	2		T83	2		T133	2
auto[2550136832:2684354559]	auto[0]	132	1			T41	2		T5	2		T63	2
auto[2550136832:2684354559]	auto[1]	70	1			T83	2		T9	2		T54	2
auto[2684354560:2818572287]	auto[0]	150	1			T5	4		T6	4		T7	2
auto[2684354560:2818572287]	auto[1]	70	1			T3	2		T5	2		T51	2
auto[2818572288:2952790015]	auto[0]	130	1			T3	2		T41	2		T116	2
auto[2818572288:2952790015]	auto[1]	62	1			T63	2		T42	2		T28	2
auto[2952790016:3087007743]	auto[0]	125	1			T5	2		T214	2		T48	2
auto[2952790016:3087007743]	auto[1]	70	1			T5	2		T85	2		T54	4
auto[3087007744:3221225471]	auto[0]	176	1			T48	2		T47	2		T6	4
auto[3087007744:3221225471]	auto[1]	60	1			T3	2		T4	2		T5	2
auto[3221225472:3355443199]	auto[0]	150	1			T5	2		T63	4		T48	2
auto[3221225472:3355443199]	auto[1]	66	1			T7	2		T29	2		T58	4
auto[3355443200:3489660927]	auto[0]	118	1			T3	4		T36	2		T42	2
auto[3355443200:3489660927]	auto[1]	56	1			T196	2		T7	2		T156	2
auto[3489660928:3623878655]	auto[0]	140	1			T17	2		T7	2		T61	6
auto[3489660928:3623878655]	auto[1]	60	1			T34	2		T5	2		T6	2
auto[3623878656:3758096383]	auto[0]	142	1			T4	2		T5	2		T138	4
auto[3623878656:3758096383]	auto[1]	66	1			T5	2		T25	2		T196	2
auto[3758096384:3892314111]	auto[0]	124	1			T5	6		T27	2		T47	2
auto[3758096384:3892314111]	auto[1]	48	1			T6	2		T50	2		T86	2
auto[3892314112:4026531839]	auto[0]	134	1			T1	2		T82	2		T27	2
auto[3892314112:4026531839]	auto[1]	64	1			T214	2		T7	2		T62	2
auto[4026531840:4160749567]	auto[0]	172	1			T5	6		T6	4		T7	2
auto[4026531840:4160749567]	auto[1]	58	1			T5	2		T214	2		T149	2
auto[4160749568:4294967295]	auto[0]	124	1			T213	2		T42	2		T6	2
auto[4160749568:4294967295]	auto[1]	58	1			T14	2		T5	2		T82	2