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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4396 1 T3 20 T10 4 T15 8
auto[1] 2016 1 T14 2 T7 2 T75 2


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 194 1 T10 2 T46 2 T131 2
auto[134217728:268435455] 214 1 T31 2 T45 2 T51 2
auto[268435456:402653183] 198 1 T15 2 T200 2 T38 4
auto[402653184:536870911] 220 1 T3 2 T46 2 T129 2
auto[536870912:671088639] 212 1 T75 4 T44 4 T59 2
auto[671088640:805306367] 218 1 T71 2 T48 2 T311 2
auto[805306368:939524095] 200 1 T3 2 T14 2 T32 2
auto[939524096:1073741823] 200 1 T75 2 T44 2 T32 2
auto[1073741824:1207959551] 176 1 T3 2 T7 2 T8 2
auto[1207959552:1342177279] 224 1 T48 2 T19 2 T198 2
auto[1342177280:1476395007] 210 1 T44 2 T32 2 T191 2
auto[1476395008:1610612735] 196 1 T75 2 T48 2 T19 2
auto[1610612736:1744830463] 234 1 T131 2 T44 4 T32 2
auto[1744830464:1879048191] 194 1 T15 2 T75 4 T70 2
auto[1879048192:2013265919] 214 1 T48 2 T200 4 T59 2
auto[2013265920:2147483647] 166 1 T31 2 T44 2 T104 2
auto[2147483648:2281701375] 228 1 T71 2 T48 2 T45 2
auto[2281701376:2415919103] 222 1 T104 2 T19 4 T198 2
auto[2415919104:2550136831] 176 1 T38 2 T132 2 T181 2
auto[2550136832:2684354559] 144 1 T3 4 T104 2 T19 2
auto[2684354560:2818572287] 170 1 T3 2 T46 4 T44 2
auto[2818572288:2952790015] 212 1 T15 2 T45 4 T19 2
auto[2952790016:3087007743] 210 1 T3 2 T32 2 T45 2
auto[3087007744:3221225471] 206 1 T3 2 T48 2 T200 2
auto[3221225472:3355443199] 168 1 T191 2 T45 2 T204 2
auto[3355443200:3489660927] 222 1 T44 4 T22 2 T32 2
auto[3489660928:3623878655] 200 1 T3 4 T10 2 T15 2
auto[3623878656:3758096383] 178 1 T44 2 T200 4 T20 2
auto[3758096384:3892314111] 194 1 T129 2 T130 2 T31 4
auto[3892314112:4026531839] 208 1 T38 2 T118 2 T78 2
auto[4026531840:4160749567] 206 1 T46 2 T130 2 T31 2
auto[4160749568:4294967295] 198 1 T75 2 T22 2 T25 2


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 140 1 T10 2 T46 2 T131 2
auto[0:134217727] auto[1] 54 1 T191 2 T200 2 T92 2
auto[134217728:268435455] auto[0] 152 1 T31 2 T45 2 T51 2
auto[134217728:268435455] auto[1] 62 1 T20 2 T194 2 T374 2
auto[268435456:402653183] auto[0] 134 1 T15 2 T38 2 T82 2
auto[268435456:402653183] auto[1] 64 1 T200 2 T38 2 T230 2
auto[402653184:536870911] auto[0] 152 1 T3 2 T46 2 T44 2
auto[402653184:536870911] auto[1] 68 1 T129 2 T31 2 T71 2
auto[536870912:671088639] auto[0] 128 1 T75 4 T44 2 T59 2
auto[536870912:671088639] auto[1] 84 1 T44 2 T25 2 T38 2
auto[671088640:805306367] auto[0] 156 1 T48 2 T311 2 T90 2
auto[671088640:805306367] auto[1] 62 1 T71 2 T229 2 T401 2
auto[805306368:939524095] auto[0] 134 1 T3 2 T32 2 T104 2
auto[805306368:939524095] auto[1] 66 1 T14 2 T45 2 T38 2
auto[939524096:1073741823] auto[0] 142 1 T44 2 T32 2 T51 2
auto[939524096:1073741823] auto[1] 58 1 T75 2 T116 2 T108 2
auto[1073741824:1207959551] auto[0] 104 1 T3 2 T45 2 T266 2
auto[1073741824:1207959551] auto[1] 72 1 T7 2 T8 2 T204 2
auto[1207959552:1342177279] auto[0] 150 1 T19 2 T198 2 T38 2
auto[1207959552:1342177279] auto[1] 74 1 T48 2 T194 2 T84 2
auto[1342177280:1476395007] auto[0] 148 1 T44 2 T32 2 T38 8
auto[1342177280:1476395007] auto[1] 62 1 T191 2 T51 2 T90 2
auto[1476395008:1610612735] auto[0] 122 1 T75 2 T48 2 T19 2
auto[1476395008:1610612735] auto[1] 74 1 T26 2 T39 2 T344 4
auto[1610612736:1744830463] auto[0] 156 1 T131 2 T44 4 T32 2
auto[1610612736:1744830463] auto[1] 78 1 T38 2 T119 2 T49 4
auto[1744830464:1879048191] auto[0] 138 1 T15 2 T75 4 T70 2
auto[1744830464:1879048191] auto[1] 56 1 T26 4 T278 2 T344 2
auto[1879048192:2013265919] auto[0] 164 1 T48 2 T200 4 T59 2
auto[1879048192:2013265919] auto[1] 50 1 T38 2 T230 2 T90 2
auto[2013265920:2147483647] auto[0] 108 1 T31 2 T44 2 T104 2
auto[2013265920:2147483647] auto[1] 58 1 T116 2 T56 2 T82 2
auto[2147483648:2281701375] auto[0] 156 1 T48 2 T45 2 T59 2
auto[2147483648:2281701375] auto[1] 72 1 T71 2 T179 2 T57 2
auto[2281701376:2415919103] auto[0] 148 1 T104 2 T19 4 T198 2
auto[2281701376:2415919103] auto[1] 74 1 T85 2 T39 2 T325 2
auto[2415919104:2550136831] auto[0] 126 1 T38 2 T181 2 T49 4
auto[2415919104:2550136831] auto[1] 50 1 T132 2 T183 2 T402 2
auto[2550136832:2684354559] auto[0] 94 1 T3 4 T104 2 T19 2
auto[2550136832:2684354559] auto[1] 50 1 T23 2 T230 2 T49 2
auto[2684354560:2818572287] auto[0] 128 1 T3 2 T46 4 T38 2
auto[2684354560:2818572287] auto[1] 42 1 T44 2 T25 2 T170 2
auto[2818572288:2952790015] auto[0] 146 1 T15 2 T45 2 T19 2
auto[2818572288:2952790015] auto[1] 66 1 T45 2 T25 2 T38 2
auto[2952790016:3087007743] auto[0] 132 1 T3 2 T32 2 T45 2
auto[2952790016:3087007743] auto[1] 78 1 T193 2 T56 2 T120 2
auto[3087007744:3221225471] auto[0] 152 1 T3 2 T48 2 T200 2
auto[3087007744:3221225471] auto[1] 54 1 T59 2 T50 2 T49 2
auto[3221225472:3355443199] auto[0] 116 1 T45 2 T38 4 T52 2
auto[3221225472:3355443199] auto[1] 52 1 T191 2 T204 2 T281 2
auto[3355443200:3489660927] auto[0] 152 1 T44 2 T22 2 T32 2
auto[3355443200:3489660927] auto[1] 70 1 T44 2 T194 2 T116 2
auto[3489660928:3623878655] auto[0] 132 1 T3 4 T10 2 T15 2
auto[3489660928:3623878655] auto[1] 68 1 T59 2 T194 2 T311 2
auto[3623878656:3758096383] auto[0] 134 1 T44 2 T200 4 T20 2
auto[3623878656:3758096383] auto[1] 44 1 T208 2 T118 2 T78 2
auto[3758096384:3892314111] auto[0] 142 1 T129 2 T130 2 T31 4
auto[3758096384:3892314111] auto[1] 52 1 T38 2 T82 2 T90 2
auto[3892314112:4026531839] auto[0] 136 1 T38 2 T118 2 T78 2
auto[3892314112:4026531839] auto[1] 72 1 T90 2 T49 6 T330 2
auto[4026531840:4160749567] auto[0] 142 1 T46 2 T31 2 T38 2
auto[4026531840:4160749567] auto[1] 64 1 T130 2 T26 2 T39 2
auto[4160749568:4294967295] auto[0] 132 1 T75 2 T38 4 T96 2
auto[4160749568:4294967295] auto[1] 66 1 T22 2 T25 2 T52 2

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