Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4346

1

T3

18

T10

2

T15

8

auto[1]

2068

1

T3

2

T10

2

T14

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	144	1			T3	2		T31	2		T32	2
auto[134217728:268435455]	160	1			T15	2		T200	2		T38	2
auto[268435456:402653183]	220	1			T46	2		T129	2		T130	2
auto[402653184:536870911]	176	1			T46	2		T70	2		T48	2
auto[536870912:671088639]	212	1			T3	2		T31	2		T44	2
auto[671088640:805306367]	216	1			T48	2		T104	2		T59	2
auto[805306368:939524095]	186	1			T75	2		T32	2		T191	4
auto[939524096:1073741823]	248	1			T46	4		T104	2		T45	2
auto[1073741824:1207959551]	180	1			T19	2		T38	2		T108	2
auto[1207959552:1342177279]	202	1			T44	2		T22	2		T204	2
auto[1342177280:1476395007]	184	1			T3	2		T45	2		T19	2
auto[1476395008:1610612735]	194	1			T3	2		T10	2		T15	2
auto[1610612736:1744830463]	210	1			T131	2		T32	2		T230	2
auto[1744830464:1879048191]	204	1			T3	4		T7	2		T200	2
auto[1879048192:2013265919]	220	1			T75	2		T198	2		T25	2
auto[2013265920:2147483647]	212	1			T71	2		T200	2		T25	2
auto[2147483648:2281701375]	224	1			T3	2		T32	4		T38	4
auto[2281701376:2415919103]	228	1			T46	2		T31	2		T8	2
auto[2415919104:2550136831]	202	1			T15	2		T44	4		T45	2
auto[2550136832:2684354559]	186	1			T75	2		T44	2		T48	2
auto[2684354560:2818572287]	206	1			T75	2		T31	2		T71	2
auto[2818572288:2952790015]	186	1			T32	2		T45	2		T38	4
auto[2952790016:3087007743]	192	1			T44	6		T45	4		T204	2
auto[3087007744:3221225471]	162	1			T3	2		T10	2		T191	2
auto[3221225472:3355443199]	192	1			T3	2		T31	2		T200	2
auto[3355443200:3489660927]	214	1			T44	2		T70	2		T32	2
auto[3489660928:3623878655]	180	1			T131	2		T71	2		T20	6
auto[3623878656:3758096383]	202	1			T44	2		T198	2		T20	2
auto[3758096384:3892314111]	224	1			T15	2		T31	2		T22	2
auto[3892314112:4026531839]	230	1			T3	2		T14	2		T75	2
auto[4026531840:4160749567]	230	1			T75	2		T129	2		T170	2
auto[4160749568:4294967295]	188	1			T48	2		T104	2		T198	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	102	1			T3	2		T32	2		T200	2
auto[0:134217727]	auto[1]	42	1			T31	2		T48	2		T51	2
auto[134217728:268435455]	auto[0]	112	1			T15	2		T200	2		T50	2
auto[134217728:268435455]	auto[1]	48	1			T38	2		T90	2		T181	2
auto[268435456:402653183]	auto[0]	150	1			T129	2		T130	2		T70	2
auto[268435456:402653183]	auto[1]	70	1			T46	2		T38	2		T90	2
auto[402653184:536870911]	auto[0]	120	1			T70	2		T48	2		T38	2
auto[402653184:536870911]	auto[1]	56	1			T46	2		T183	2		T40	2
auto[536870912:671088639]	auto[0]	158	1			T44	2		T32	2		T45	2
auto[536870912:671088639]	auto[1]	54	1			T3	2		T31	2		T266	2
auto[671088640:805306367]	auto[0]	140	1			T48	2		T104	2		T25	2
auto[671088640:805306367]	auto[1]	76	1			T59	2		T38	2		T56	2
auto[805306368:939524095]	auto[0]	116	1			T75	2		T32	2		T19	4
auto[805306368:939524095]	auto[1]	70	1			T191	4		T38	2		T90	2
auto[939524096:1073741823]	auto[0]	162	1			T104	2		T45	2		T19	2
auto[939524096:1073741823]	auto[1]	86	1			T46	4		T118	2		T82	2
auto[1073741824:1207959551]	auto[0]	126	1			T19	2		T38	2		T178	2
auto[1073741824:1207959551]	auto[1]	54	1			T108	2		T49	2		T110	2
auto[1207959552:1342177279]	auto[0]	126	1			T44	2		T22	2		T198	2
auto[1207959552:1342177279]	auto[1]	76	1			T204	2		T19	2		T170	2
auto[1342177280:1476395007]	auto[0]	124	1			T3	2		T45	2		T117	2
auto[1342177280:1476395007]	auto[1]	60	1			T19	2		T194	2		T82	2
auto[1476395008:1610612735]	auto[0]	124	1			T3	2		T10	2		T15	2
auto[1476395008:1610612735]	auto[1]	70	1			T75	2		T198	2		T23	2
auto[1610612736:1744830463]	auto[0]	142	1			T32	2		T230	2		T50	2
auto[1610612736:1744830463]	auto[1]	68	1			T131	2		T347	2		T64	2
auto[1744830464:1879048191]	auto[0]	134	1			T3	4		T200	2		T59	2
auto[1744830464:1879048191]	auto[1]	70	1			T7	2		T59	2		T38	4
auto[1879048192:2013265919]	auto[0]	158	1			T75	2		T198	2		T38	4
auto[1879048192:2013265919]	auto[1]	62	1			T25	2		T311	2		T96	2
auto[2013265920:2147483647]	auto[0]	150	1			T200	2		T38	2		T281	2
auto[2013265920:2147483647]	auto[1]	62	1			T71	2		T25	2		T38	2
auto[2147483648:2281701375]	auto[0]	152	1			T3	2		T32	4		T38	4
auto[2147483648:2281701375]	auto[1]	72	1			T49	4		T110	2		T229	2
auto[2281701376:2415919103]	auto[0]	174	1			T31	2		T8	2		T48	2
auto[2281701376:2415919103]	auto[1]	54	1			T46	2		T117	2		T49	2
auto[2415919104:2550136831]	auto[0]	134	1			T15	2		T45	2		T38	2
auto[2415919104:2550136831]	auto[1]	68	1			T44	4		T59	2		T38	2
auto[2550136832:2684354559]	auto[0]	112	1			T75	2		T48	2		T25	2
auto[2550136832:2684354559]	auto[1]	74	1			T44	2		T38	4		T49	2
auto[2684354560:2818572287]	auto[0]	130	1			T75	2		T31	2		T71	2
auto[2684354560:2818572287]	auto[1]	76	1			T204	2		T116	2		T230	2
auto[2818572288:2952790015]	auto[0]	126	1			T45	2		T38	4		T81	2
auto[2818572288:2952790015]	auto[1]	60	1			T32	2		T170	2		T24	2
auto[2952790016:3087007743]	auto[0]	124	1			T45	2		T204	2		T200	2
auto[2952790016:3087007743]	auto[1]	68	1			T44	6		T45	2		T200	2
auto[3087007744:3221225471]	auto[0]	108	1			T3	2		T19	2		T59	2
auto[3087007744:3221225471]	auto[1]	54	1			T10	2		T191	2		T116	2
auto[3221225472:3355443199]	auto[0]	128	1			T3	2		T200	2		T38	4
auto[3221225472:3355443199]	auto[1]	64	1			T31	2		T266	2		T375	2
auto[3355443200:3489660927]	auto[0]	158	1			T44	2		T70	2		T32	2
auto[3355443200:3489660927]	auto[1]	56	1			T51	2		T38	2		T49	2
auto[3489660928:3623878655]	auto[0]	126	1			T131	2		T71	2		T20	6
auto[3489660928:3623878655]	auto[1]	54	1			T132	2		T108	2		T229	4
auto[3623878656:3758096383]	auto[0]	138	1			T198	2		T20	2		T84	2
auto[3623878656:3758096383]	auto[1]	64	1			T44	2		T38	2		T119	2
auto[3758096384:3892314111]	auto[0]	156	1			T15	2		T22	2		T198	2
auto[3758096384:3892314111]	auto[1]	68	1			T31	2		T38	2		T132	2
auto[3892314112:4026531839]	auto[0]	142	1			T3	2		T75	2		T44	2
auto[3892314112:4026531839]	auto[1]	88	1			T14	2		T130	2		T44	2
auto[4026531840:4160749567]	auto[0]	170	1			T75	2		T49	2		T28	2
auto[4026531840:4160749567]	auto[1]	60	1			T129	2		T170	2		T92	2
auto[4160749568:4294967295]	auto[0]	124	1			T48	2		T198	2		T38	2
auto[4160749568:4294967295]	auto[1]	64	1			T104	2		T49	4		T244	2