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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6847 1 T1 18 T2 6 T3 9
auto[1] 304 1 T13 4 T120 15 T77 5



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 2843 1 T1 6 T2 1 T3 2
auto[134217728:268435455] 164 1 T1 2 T3 1 T13 1
auto[268435456:402653183] 161 1 T82 1 T41 1 T24 1
auto[402653184:536870911] 166 1 T1 1 T2 1 T15 1
auto[536870912:671088639] 179 1 T2 1 T15 1 T23 1
auto[671088640:805306367] 173 1 T2 1 T12 1 T13 1
auto[805306368:939524095] 151 1 T1 2 T42 2 T55 1
auto[939524096:1073741823] 135 1 T41 1 T35 2 T42 5
auto[1073741824:1207959551] 132 1 T3 1 T42 2 T189 1
auto[1207959552:1342177279] 142 1 T1 1 T81 1 T35 1
auto[1342177280:1476395007] 141 1 T3 1 T12 2 T82 1
auto[1476395008:1610612735] 142 1 T41 1 T36 1 T42 1
auto[1610612736:1744830463] 111 1 T13 2 T23 1 T34 2
auto[1744830464:1879048191] 112 1 T12 1 T68 1 T34 1
auto[1879048192:2013265919] 122 1 T12 1 T23 1 T41 1
auto[2013265920:2147483647] 126 1 T1 1 T2 1 T42 1
auto[2147483648:2281701375] 136 1 T2 1 T3 1 T12 1
auto[2281701376:2415919103] 133 1 T1 1 T12 1 T13 1
auto[2415919104:2550136831] 125 1 T12 1 T82 1 T128 1
auto[2550136832:2684354559] 147 1 T13 1 T36 1 T42 3
auto[2684354560:2818572287] 125 1 T24 1 T42 1 T189 1
auto[2818572288:2952790015] 121 1 T15 1 T42 1 T189 1
auto[2952790016:3087007743] 147 1 T15 1 T24 1 T35 1
auto[3087007744:3221225471] 141 1 T12 1 T23 1 T36 1
auto[3221225472:3355443199] 131 1 T3 1 T12 3 T17 1
auto[3355443200:3489660927] 123 1 T12 2 T23 1 T34 1
auto[3489660928:3623878655] 137 1 T1 2 T23 1 T41 2
auto[3623878656:3758096383] 132 1 T1 1 T14 1 T36 1
auto[3758096384:3892314111] 130 1 T1 1 T13 1 T24 1
auto[3892314112:4026531839] 139 1 T34 1 T26 1 T42 2
auto[4026531840:4160749567] 132 1 T12 1 T13 1 T68 1
auto[4160749568:4294967295] 152 1 T3 2 T82 1 T41 1



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 2835 1 T1 6 T2 1 T3 2
auto[0:134217727] auto[1] 8 1 T120 1 T258 1 T225 1
auto[134217728:268435455] auto[0] 158 1 T1 2 T3 1 T35 1
auto[134217728:268435455] auto[1] 6 1 T13 1 T139 1 T225 1
auto[268435456:402653183] auto[0] 153 1 T82 1 T41 1 T24 1
auto[268435456:402653183] auto[1] 8 1 T77 1 T231 1 T245 1
auto[402653184:536870911] auto[0] 156 1 T1 1 T2 1 T15 1
auto[402653184:536870911] auto[1] 10 1 T77 1 T231 1 T258 1
auto[536870912:671088639] auto[0] 164 1 T2 1 T15 1 T23 1
auto[536870912:671088639] auto[1] 15 1 T120 1 T139 2 T225 2
auto[671088640:805306367] auto[0] 162 1 T2 1 T12 1 T23 1
auto[671088640:805306367] auto[1] 11 1 T13 1 T138 2 T139 1
auto[805306368:939524095] auto[0] 139 1 T1 2 T42 2 T55 1
auto[805306368:939524095] auto[1] 12 1 T77 1 T258 1 T139 1
auto[939524096:1073741823] auto[0] 125 1 T41 1 T35 2 T42 5
auto[939524096:1073741823] auto[1] 10 1 T137 1 T349 1 T276 1
auto[1073741824:1207959551] auto[0] 115 1 T3 1 T42 2 T189 1
auto[1073741824:1207959551] auto[1] 17 1 T120 1 T137 1 T361 2
auto[1207959552:1342177279] auto[0] 131 1 T1 1 T81 1 T35 1
auto[1207959552:1342177279] auto[1] 11 1 T77 1 T259 1 T245 1
auto[1342177280:1476395007] auto[0] 129 1 T3 1 T12 2 T82 1
auto[1342177280:1476395007] auto[1] 12 1 T120 2 T259 1 T225 2
auto[1476395008:1610612735] auto[0] 134 1 T41 1 T36 1 T42 1
auto[1476395008:1610612735] auto[1] 8 1 T120 1 T315 1 T250 1
auto[1610612736:1744830463] auto[0] 103 1 T13 2 T23 1 T34 2
auto[1610612736:1744830463] auto[1] 8 1 T361 1 T358 1 T394 2
auto[1744830464:1879048191] auto[0] 98 1 T12 1 T68 1 T34 1
auto[1744830464:1879048191] auto[1] 14 1 T258 1 T139 1 T361 1
auto[1879048192:2013265919] auto[0] 118 1 T12 1 T23 1 T41 1
auto[1879048192:2013265919] auto[1] 4 1 T258 1 T225 1 T287 1
auto[2013265920:2147483647] auto[0] 118 1 T1 1 T2 1 T42 1
auto[2013265920:2147483647] auto[1] 8 1 T382 1 T400 1 T396 1
auto[2147483648:2281701375] auto[0] 125 1 T2 1 T3 1 T12 1
auto[2147483648:2281701375] auto[1] 11 1 T120 2 T229 1 T258 2
auto[2281701376:2415919103] auto[0] 129 1 T1 1 T12 1 T42 2
auto[2281701376:2415919103] auto[1] 4 1 T13 1 T120 1 T358 1
auto[2415919104:2550136831] auto[0] 120 1 T12 1 T82 1 T128 1
auto[2415919104:2550136831] auto[1] 5 1 T229 1 T139 1 T349 1
auto[2550136832:2684354559] auto[0] 146 1 T13 1 T36 1 T42 3
auto[2550136832:2684354559] auto[1] 1 1 T251 1 - - - -
auto[2684354560:2818572287] auto[0] 115 1 T24 1 T42 1 T189 1
auto[2684354560:2818572287] auto[1] 10 1 T138 1 T400 1 T250 1
auto[2818572288:2952790015] auto[0] 119 1 T15 1 T42 1 T189 1
auto[2818572288:2952790015] auto[1] 2 1 T401 1 T402 1 - -
auto[2952790016:3087007743] auto[0] 141 1 T15 1 T24 1 T35 1
auto[2952790016:3087007743] auto[1] 6 1 T120 1 T259 1 T400 1
auto[3087007744:3221225471] auto[0] 133 1 T12 1 T23 1 T36 1
auto[3087007744:3221225471] auto[1] 8 1 T120 1 T358 1 T396 1
auto[3221225472:3355443199] auto[0] 121 1 T3 1 T12 3 T17 1
auto[3221225472:3355443199] auto[1] 10 1 T231 1 T258 2 T139 1
auto[3355443200:3489660927] auto[0] 113 1 T12 2 T23 1 T34 1
auto[3355443200:3489660927] auto[1] 10 1 T120 1 T231 1 T258 1
auto[3489660928:3623878655] auto[0] 123 1 T1 2 T23 1 T41 2
auto[3489660928:3623878655] auto[1] 14 1 T137 1 T258 1 T225 1
auto[3623878656:3758096383] auto[0] 123 1 T1 1 T14 1 T36 1
auto[3623878656:3758096383] auto[1] 9 1 T231 2 T139 1 T401 1
auto[3758096384:3892314111] auto[0] 117 1 T1 1 T24 1 T42 1
auto[3758096384:3892314111] auto[1] 13 1 T13 1 T258 1 T396 1
auto[3892314112:4026531839] auto[0] 119 1 T34 1 T26 1 T42 2
auto[3892314112:4026531839] auto[1] 20 1 T120 1 T258 1 T138 1
auto[4026531840:4160749567] auto[0] 124 1 T12 1 T13 1 T68 1
auto[4026531840:4160749567] auto[1] 8 1 T120 1 T229 1 T258 1
auto[4160749568:4294967295] auto[0] 141 1 T3 2 T82 1 T41 1
auto[4160749568:4294967295] auto[1] 11 1 T120 1 T77 1 T259 1

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