Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4578

1

T4

2

T15

20

T16

14

auto[1]

2242

1

T4

6

T28

2

T42

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	226	1			T15	4		T28	2		T108	2
auto[134217728:268435455]	194	1			T44	2		T53	2		T226	2
auto[268435456:402653183]	226	1			T4	2		T38	2		T41	2
auto[402653184:536870911]	202	1			T24	2		T141	2		T27	2
auto[536870912:671088639]	216	1			T28	2		T24	2		T45	2
auto[671088640:805306367]	210	1			T4	2		T15	2		T230	2
auto[805306368:939524095]	232	1			T15	2		T107	2		T108	2
auto[939524096:1073741823]	202	1			T108	2		T12	4		T210	2
auto[1073741824:1207959551]	240	1			T42	2		T101	2		T71	2
auto[1207959552:1342177279]	200	1			T16	2		T28	2		T44	2
auto[1342177280:1476395007]	184	1			T4	2		T15	2		T42	2
auto[1476395008:1610612735]	186	1			T26	2		T46	2		T12	2
auto[1610612736:1744830463]	200	1			T16	2		T42	2		T38	2
auto[1744830464:1879048191]	198	1			T15	2		T42	2		T38	2
auto[1879048192:2013265919]	176	1			T29	4		T52	2		T7	2
auto[2013265920:2147483647]	198	1			T15	2		T29	2		T45	4
auto[2147483648:2281701375]	224	1			T16	2		T28	2		T93	2
auto[2281701376:2415919103]	206	1			T15	2		T42	2		T29	2
auto[2415919104:2550136831]	218	1			T25	2		T30	2		T45	2
auto[2550136832:2684354559]	212	1			T24	2		T107	2		T45	2
auto[2684354560:2818572287]	230	1			T24	2		T29	2		T230	2
auto[2818572288:2952790015]	244	1			T93	4		T53	2		T45	2
auto[2952790016:3087007743]	234	1			T15	2		T52	2		T229	2
auto[3087007744:3221225471]	220	1			T15	2		T41	2		T100	2
auto[3221225472:3355443199]	200	1			T41	2		T71	2		T100	2
auto[3355443200:3489660927]	236	1			T4	2		T140	2		T29	4
auto[3489660928:3623878655]	220	1			T41	2		T71	2		T210	2
auto[3623878656:3758096383]	250	1			T38	2		T41	2		T25	2
auto[3758096384:3892314111]	218	1			T16	2		T44	2		T30	2
auto[3892314112:4026531839]	212	1			T16	4		T77	2		T101	4
auto[4026531840:4160749567]	198	1			T16	2		T25	2		T107	2
auto[4160749568:4294967295]	208	1			T38	2		T29	2		T44	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	142	1			T15	4		T28	2		T108	2
auto[0:134217727]	auto[1]	84	1			T86	2		T272	2		T92	2
auto[134217728:268435455]	auto[0]	140	1			T44	2		T53	2		T27	2
auto[134217728:268435455]	auto[1]	54	1			T226	2		T45	2		T64	2
auto[268435456:402653183]	auto[0]	150	1			T4	2		T38	2		T41	2
auto[268435456:402653183]	auto[1]	76	1			T44	2		T52	2		T21	2
auto[402653184:536870911]	auto[0]	128	1			T141	2		T27	2		T57	2
auto[402653184:536870911]	auto[1]	74	1			T24	2		T361	2		T216	2
auto[536870912:671088639]	auto[0]	138	1			T28	2		T236	2		T87	2
auto[536870912:671088639]	auto[1]	78	1			T24	2		T45	2		T48	2
auto[671088640:805306367]	auto[0]	146	1			T15	2		T230	2		T101	2
auto[671088640:805306367]	auto[1]	64	1			T4	2		T58	2		T92	2
auto[805306368:939524095]	auto[0]	152	1			T15	2		T107	2		T108	2
auto[805306368:939524095]	auto[1]	80	1			T101	2		T226	2		T39	2
auto[939524096:1073741823]	auto[0]	140	1			T12	2		T210	2		T73	2
auto[939524096:1073741823]	auto[1]	62	1			T108	2		T12	2		T55	2
auto[1073741824:1207959551]	auto[0]	182	1			T71	2		T141	2		T143	2
auto[1073741824:1207959551]	auto[1]	58	1			T42	2		T101	2		T58	2
auto[1207959552:1342177279]	auto[0]	150	1			T16	2		T44	2		T229	2
auto[1207959552:1342177279]	auto[1]	50	1			T28	2		T124	2		T68	2
auto[1342177280:1476395007]	auto[0]	118	1			T15	2		T53	4		T226	2
auto[1342177280:1476395007]	auto[1]	66	1			T4	2		T42	2		T101	2
auto[1476395008:1610612735]	auto[0]	134	1			T26	2		T46	2		T210	2
auto[1476395008:1610612735]	auto[1]	52	1			T12	2		T327	2		T94	2
auto[1610612736:1744830463]	auto[0]	138	1			T16	2		T38	2		T93	2
auto[1610612736:1744830463]	auto[1]	62	1			T42	2		T12	2		T21	2
auto[1744830464:1879048191]	auto[0]	130	1			T15	2		T42	2		T38	2
auto[1744830464:1879048191]	auto[1]	68	1			T52	2		T53	2		T27	2
auto[1879048192:2013265919]	auto[0]	132	1			T29	2		T7	2		T233	2
auto[1879048192:2013265919]	auto[1]	44	1			T29	2		T52	2		T235	2
auto[2013265920:2147483647]	auto[0]	140	1			T15	2		T29	2		T45	2
auto[2013265920:2147483647]	auto[1]	58	1			T45	2		T434	2		T124	4
auto[2147483648:2281701375]	auto[0]	144	1			T16	2		T28	2		T93	2
auto[2147483648:2281701375]	auto[1]	80	1			T100	2		T214	2		T297	2
auto[2281701376:2415919103]	auto[0]	150	1			T15	2		T42	2		T29	2
auto[2281701376:2415919103]	auto[1]	56	1			T52	2		T12	2		T122	2
auto[2415919104:2550136831]	auto[0]	152	1			T100	2		T12	2		T235	2
auto[2415919104:2550136831]	auto[1]	66	1			T25	2		T30	2		T45	2
auto[2550136832:2684354559]	auto[0]	134	1			T46	2		T207	2		T7	2
auto[2550136832:2684354559]	auto[1]	78	1			T24	2		T107	2		T45	2
auto[2684354560:2818572287]	auto[0]	168	1			T24	2		T29	2		T101	2
auto[2684354560:2818572287]	auto[1]	62	1			T230	2		T76	2		T12	2
auto[2818572288:2952790015]	auto[0]	154	1			T93	4		T53	2		T45	2
auto[2818572288:2952790015]	auto[1]	90	1			T12	2		T7	2		T127	2
auto[2952790016:3087007743]	auto[0]	156	1			T15	2		T52	2		T229	2
auto[2952790016:3087007743]	auto[1]	78	1			T45	2		T20	2		T7	2
auto[3087007744:3221225471]	auto[0]	144	1			T15	2		T41	2		T85	2
auto[3087007744:3221225471]	auto[1]	76	1			T100	2		T7	2		T216	2
auto[3221225472:3355443199]	auto[0]	140	1			T41	2		T71	2		T100	2
auto[3221225472:3355443199]	auto[1]	60	1			T201	2		T56	2		T245	2
auto[3355443200:3489660927]	auto[0]	158	1			T29	4		T108	2		T101	2
auto[3355443200:3489660927]	auto[1]	78	1			T4	2		T140	2		T39	2
auto[3489660928:3623878655]	auto[0]	146	1			T41	2		T71	2		T210	2
auto[3489660928:3623878655]	auto[1]	74	1			T55	2		T92	2		T262	2
auto[3623878656:3758096383]	auto[0]	162	1			T38	2		T47	4		T45	2
auto[3623878656:3758096383]	auto[1]	88	1			T41	2		T25	2		T100	2
auto[3758096384:3892314111]	auto[0]	140	1			T16	2		T30	2		T101	2
auto[3758096384:3892314111]	auto[1]	78	1			T44	2		T12	2		T361	2
auto[3892314112:4026531839]	auto[0]	138	1			T16	4		T77	2		T101	2
auto[3892314112:4026531839]	auto[1]	74	1			T101	2		T45	2		T31	2
auto[4026531840:4160749567]	auto[0]	122	1			T16	2		T45	2		T122	2
auto[4026531840:4160749567]	auto[1]	76	1			T25	2		T107	2		T142	2
auto[4160749568:4294967295]	auto[0]	110	1			T29	2		T44	2		T101	2
auto[4160749568:4294967295]	auto[1]	98	1			T38	2		T46	2		T22	2