Unified Coverage Report :: Group :: keymgr_env_pkg::keymgr_env_cov::reseed_interval_cg

Group : keymgr_env_pkg::keymgr_env_cov::reseed_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_keymgr_env_0.1/keymgr_env_cov.sv

---

Summary for Group keymgr_env_pkg::keymgr_env_cov::reseed_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	37	0	37	100.00

Variables for Group keymgr_env_pkg::keymgr_env_cov::reseed_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
reseed_interval_cp	37	0	37	100.00	100	1	1	0

Summary for Variable reseed_interval_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	37	0	37	100.00

User Defined Bins for reseed_interval_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
large_values[0]	1799	1			T1	1		T2	1		T3	1
large_values[1]	18	1			T80	1		T390	1		T391	1
large_values[2]	20	1			T59	1		T41	1		T265	1
large_values[3]	8	1			T95	1		T333	1		T392	1
large_values[4]	17	1			T58	1		T62	1		T393	1
large_values[5]	17	1			T60	1		T41	1		T121	1
large_values[6]	16	1			T16	1		T44	1		T367	1
large_values[7]	10	1			T197	1		T203	1		T394	1
large_values[8]	16	1			T130	1		T395	1		T178	1
large_values[9]	12	1			T62	1		T396	1		T199	1
large_values[10]	14	1			T41	1		T8	1		T397	1
large_values[11]	16	1			T61	1		T232	1		T398	1
large_values[12]	13	1			T6	1		T72	1		T191	1
large_values[13]	20	1			T26	1		T42	1		T61	2
large_values[14]	24	1			T47	1		T89	1		T71	1
large_values[15]	19	1			T54	1		T6	1		T72	1
large_values[16]	11	1			T119	1		T88	1		T399	1
large_values[17]	19	1			T40	1		T22	1		T247	1
large_values[18]	13	1			T61	1		T198	1		T282	1
large_values[19]	11	1			T73	1		T240	1		T400	1
large_values[20]	15	1			T42	1		T130	1		T401	1
large_values[21]	17	1			T41	1		T230	1		T342	1
large_values[22]	17	1			T46	1		T58	1		T213	1
large_values[23]	18	1			T23	1		T186	1		T72	1
large_values[24]	12	1			T46	1		T183	1		T232	1
large_values[25]	16	1			T244	1		T72	1		T44	1
large_values[26]	15	1			T68	1		T402	1		T157	1
large_values[27]	9	1			T46	1		T403	1		T404	1
large_values[28]	20	1			T46	1		T54	1		T6	1
large_values[29]	5	1			T3	1		T405	1		T206	1
large_values[30]	6	1			T44	1		T406	1		T407	1
large_values[31]	6	1			T46	1		T231	1		T236	1
small_values[0]	84	1			T14	1		T15	1		T39	1
small_values[1]	80	1			T1	1		T126	1		T86	1
small_values[2]	78	1			T2	1		T4	1		T46	1
small_values[3]	84	1			T17	1		T27	1		T46	1
small_values[4]	101	1			T37	1		T83	1		T54	1