Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4622

1

T4

4

T15

2

T16

2

auto[1]

2232

1

T2

6

T4

4

T14

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	172	1			T24	2		T101	2		T42	8
auto[134217728:268435455]	214	1			T4	2		T17	2		T45	2
auto[268435456:402653183]	232	1			T22	4		T59	2		T60	2
auto[402653184:536870911]	210	1			T186	2		T41	4		T101	4
auto[536870912:671088639]	224	1			T2	2		T26	2		T39	2
auto[671088640:805306367]	216	1			T55	2		T46	4		T54	4
auto[805306368:939524095]	220	1			T2	2		T4	2		T183	2
auto[939524096:1073741823]	230	1			T52	2		T53	2		T46	2
auto[1073741824:1207959551]	182	1			T39	2		T54	2		T41	6
auto[1207959552:1342177279]	190	1			T55	2		T25	2		T88	2
auto[1342177280:1476395007]	210	1			T55	2		T183	2		T186	2
auto[1476395008:1610612735]	208	1			T22	2		T18	2		T127	2
auto[1610612736:1744830463]	236	1			T27	2		T41	2		T89	2
auto[1744830464:1879048191]	224	1			T15	2		T22	2		T68	2
auto[1879048192:2013265919]	202	1			T18	2		T68	2		T46	6
auto[2013265920:2147483647]	232	1			T22	2		T46	2		T60	2
auto[2147483648:2281701375]	202	1			T41	8		T25	2		T101	2
auto[2281701376:2415919103]	238	1			T68	2		T23	2		T47	2
auto[2415919104:2550136831]	226	1			T26	2		T68	2		T46	2
auto[2550136832:2684354559]	170	1			T186	2		T89	2		T192	2
auto[2684354560:2818572287]	244	1			T2	2		T55	2		T190	2
auto[2818572288:2952790015]	224	1			T190	2		T41	4		T226	2
auto[2952790016:3087007743]	248	1			T4	2		T39	2		T126	2
auto[3087007744:3221225471]	194	1			T14	2		T52	2		T183	2
auto[3221225472:3355443199]	200	1			T46	4		T23	2		T41	2
auto[3355443200:3489660927]	228	1			T55	2		T126	2		T46	2
auto[3489660928:3623878655]	216	1			T4	2		T15	2		T126	2
auto[3623878656:3758096383]	228	1			T52	2		T46	2		T41	2
auto[3758096384:3892314111]	200	1			T16	2		T22	2		T67	2
auto[3892314112:4026531839]	204	1			T14	2		T22	2		T53	2
auto[4026531840:4160749567]	202	1			T26	2		T55	2		T80	2
auto[4160749568:4294967295]	228	1			T22	2		T53	2		T47	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	114	1			T24	2		T101	2		T42	6
auto[0:134217727]	auto[1]	58	1			T42	2		T275	2		T114	2
auto[134217728:268435455]	auto[0]	138	1			T17	2		T127	2		T41	4
auto[134217728:268435455]	auto[1]	76	1			T4	2		T45	2		T18	2
auto[268435456:402653183]	auto[0]	186	1			T22	4		T60	2		T41	2
auto[268435456:402653183]	auto[1]	46	1			T59	2		T24	2		T206	2
auto[402653184:536870911]	auto[0]	126	1			T186	2		T101	4		T100	2
auto[402653184:536870911]	auto[1]	84	1			T41	4		T62	2		T116	2
auto[536870912:671088639]	auto[0]	158	1			T26	2		T39	2		T54	2
auto[536870912:671088639]	auto[1]	66	1			T2	2		T6	2		T265	2
auto[671088640:805306367]	auto[0]	142	1			T46	2		T54	2		T41	6
auto[671088640:805306367]	auto[1]	74	1			T55	2		T46	2		T54	2
auto[805306368:939524095]	auto[0]	144	1			T4	2		T183	2		T41	6
auto[805306368:939524095]	auto[1]	76	1			T2	2		T123	2		T244	2
auto[939524096:1073741823]	auto[0]	152	1			T52	2		T46	2		T67	2
auto[939524096:1073741823]	auto[1]	78	1			T53	2		T41	2		T7	2
auto[1073741824:1207959551]	auto[0]	142	1			T39	2		T54	2		T41	2
auto[1073741824:1207959551]	auto[1]	40	1			T41	4		T72	2		T9	2
auto[1207959552:1342177279]	auto[0]	134	1			T55	2		T189	2		T72	2
auto[1207959552:1342177279]	auto[1]	56	1			T25	2		T88	2		T62	2
auto[1342177280:1476395007]	auto[0]	144	1			T55	2		T183	2		T186	2
auto[1342177280:1476395007]	auto[1]	66	1			T25	2		T226	2		T104	2
auto[1476395008:1610612735]	auto[0]	132	1			T22	2		T127	2		T46	2
auto[1476395008:1610612735]	auto[1]	76	1			T18	2		T68	2		T190	2
auto[1610612736:1744830463]	auto[0]	138	1			T41	2		T101	4		T88	2
auto[1610612736:1744830463]	auto[1]	98	1			T27	2		T89	2		T58	4
auto[1744830464:1879048191]	auto[0]	158	1			T15	2		T22	2		T68	2
auto[1744830464:1879048191]	auto[1]	66	1			T25	2		T58	2		T72	2
auto[1879048192:2013265919]	auto[0]	132	1			T46	6		T41	2		T24	2
auto[1879048192:2013265919]	auto[1]	70	1			T18	2		T68	2		T41	2
auto[2013265920:2147483647]	auto[0]	128	1			T22	2		T46	2		T128	2
auto[2013265920:2147483647]	auto[1]	104	1			T60	2		T226	2		T101	2
auto[2147483648:2281701375]	auto[0]	130	1			T41	4		T42	2		T413	2
auto[2147483648:2281701375]	auto[1]	72	1			T41	4		T25	2		T101	2
auto[2281701376:2415919103]	auto[0]	166	1			T47	2		T41	2		T71	2
auto[2281701376:2415919103]	auto[1]	72	1			T68	2		T23	2		T101	2
auto[2415919104:2550136831]	auto[0]	168	1			T46	2		T80	2		T186	2
auto[2415919104:2550136831]	auto[1]	58	1			T26	2		T68	2		T183	2
auto[2550136832:2684354559]	auto[0]	104	1			T89	2		T61	2		T72	2
auto[2550136832:2684354559]	auto[1]	66	1			T186	2		T192	2		T389	2
auto[2684354560:2818572287]	auto[0]	174	1			T55	2		T190	2		T47	2
auto[2684354560:2818572287]	auto[1]	70	1			T2	2		T71	2		T101	2
auto[2818572288:2952790015]	auto[0]	144	1			T190	2		T41	2		T226	2
auto[2818572288:2952790015]	auto[1]	80	1			T41	2		T104	2		T413	2
auto[2952790016:3087007743]	auto[0]	166	1			T39	2		T183	2		T186	4
auto[2952790016:3087007743]	auto[1]	82	1			T4	2		T126	2		T68	2
auto[3087007744:3221225471]	auto[0]	134	1			T52	2		T183	2		T41	4
auto[3087007744:3221225471]	auto[1]	60	1			T14	2		T101	2		T34	2
auto[3221225472:3355443199]	auto[0]	146	1			T46	4		T123	2		T6	2
auto[3221225472:3355443199]	auto[1]	54	1			T23	2		T41	2		T61	2
auto[3355443200:3489660927]	auto[0]	148	1			T55	2		T46	2		T41	2
auto[3355443200:3489660927]	auto[1]	80	1			T126	2		T41	2		T258	2
auto[3489660928:3623878655]	auto[0]	146	1			T4	2		T80	2		T41	2
auto[3489660928:3623878655]	auto[1]	70	1			T15	2		T126	2		T53	2
auto[3623878656:3758096383]	auto[0]	172	1			T52	2		T41	2		T71	2
auto[3623878656:3758096383]	auto[1]	56	1			T46	2		T101	2		T7	2
auto[3758096384:3892314111]	auto[0]	130	1			T16	2		T22	2		T67	2
auto[3758096384:3892314111]	auto[1]	70	1			T41	2		T226	2		T100	2
auto[3892314112:4026531839]	auto[0]	138	1			T22	2		T46	2		T186	2
auto[3892314112:4026531839]	auto[1]	66	1			T14	2		T53	2		T41	2
auto[4026531840:4160749567]	auto[0]	126	1			T54	2		T41	2		T226	2
auto[4026531840:4160749567]	auto[1]	76	1			T26	2		T55	2		T80	2
auto[4160749568:4294967295]	auto[0]	162	1			T22	2		T53	2		T80	2
auto[4160749568:4294967295]	auto[1]	66	1			T47	2		T67	2		T81	2