Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4802

1

T1

8

T2

4

T22

14

auto[1]

2400

1

T1

2

T2

4

T22

8

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	234	1			T22	2		T102	2		T41	2
auto[134217728:268435455]	204	1			T1	2		T48	4		T6	2
auto[268435456:402653183]	208	1			T54	2		T133	2		T202	2
auto[402653184:536870911]	256	1			T19	2		T101	2		T6	6
auto[536870912:671088639]	196	1			T2	2		T102	2		T19	2
auto[671088640:805306367]	224	1			T22	2		T41	2		T65	2
auto[805306368:939524095]	250	1			T42	2		T6	2		T193	2
auto[939524096:1073741823]	248	1			T22	2		T65	2		T132	2
auto[1073741824:1207959551]	222	1			T1	2		T22	4		T197	2
auto[1207959552:1342177279]	218	1			T40	2		T47	2		T48	2
auto[1342177280:1476395007]	222	1			T48	2		T6	2		T194	2
auto[1476395008:1610612735]	258	1			T102	2		T23	2		T198	2
auto[1610612736:1744830463]	174	1			T41	2		T24	2		T6	4
auto[1744830464:1879048191]	200	1			T110	2		T21	2		T6	2
auto[1879048192:2013265919]	206	1			T2	2		T54	2		T39	2
auto[2013265920:2147483647]	240	1			T197	2		T48	2		T6	10
auto[2147483648:2281701375]	236	1			T19	2		T31	2		T65	4
auto[2281701376:2415919103]	240	1			T2	2		T102	2		T110	2
auto[2415919104:2550136831]	200	1			T22	2		T24	4		T198	2
auto[2550136832:2684354559]	264	1			T41	2		T42	2		T101	2
auto[2684354560:2818572287]	262	1			T41	2		T132	2		T6	8
auto[2818572288:2952790015]	220	1			T1	2		T48	2		T6	2
auto[2952790016:3087007743]	214	1			T2	2		T40	2		T42	2
auto[3087007744:3221225471]	228	1			T22	2		T40	2		T198	2
auto[3221225472:3355443199]	226	1			T22	2		T42	2		T6	2
auto[3355443200:3489660927]	186	1			T1	2		T22	2		T42	2
auto[3489660928:3623878655]	264	1			T1	2		T22	2		T47	4
auto[3623878656:3758096383]	200	1			T22	2		T42	4		T101	2
auto[3758096384:3892314111]	212	1			T132	2		T193	2		T194	2
auto[3892314112:4026531839]	220	1			T42	2		T23	2		T6	6
auto[4026531840:4160749567]	220	1			T48	2		T6	6		T193	2
auto[4160749568:4294967295]	250	1			T65	2		T101	2		T110	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	152	1			T102	2		T24	2		T6	2
auto[0:134217727]	auto[1]	82	1			T22	2		T41	2		T198	2
auto[134217728:268435455]	auto[0]	136	1			T1	2		T48	2		T58	2
auto[134217728:268435455]	auto[1]	68	1			T48	2		T6	2		T53	2
auto[268435456:402653183]	auto[0]	128	1			T133	2		T202	2		T53	2
auto[268435456:402653183]	auto[1]	80	1			T54	2		T51	2		T301	2
auto[402653184:536870911]	auto[0]	168	1			T19	2		T101	2		T6	4
auto[402653184:536870911]	auto[1]	88	1			T6	2		T59	2		T44	2
auto[536870912:671088639]	auto[0]	132	1			T2	2		T102	2		T47	2
auto[536870912:671088639]	auto[1]	64	1			T19	2		T20	2		T43	2
auto[671088640:805306367]	auto[0]	160	1			T41	2		T65	2		T6	6
auto[671088640:805306367]	auto[1]	64	1			T22	2		T198	2		T21	2
auto[805306368:939524095]	auto[0]	164	1			T42	2		T6	2		T193	2
auto[805306368:939524095]	auto[1]	86	1			T202	2		T265	2		T121	2
auto[939524096:1073741823]	auto[0]	166	1			T65	2		T132	2		T20	2
auto[939524096:1073741823]	auto[1]	82	1			T22	2		T44	2		T252	2
auto[1073741824:1207959551]	auto[0]	160	1			T22	4		T197	2		T6	2
auto[1073741824:1207959551]	auto[1]	62	1			T1	2		T6	2		T52	2
auto[1207959552:1342177279]	auto[0]	156	1			T40	2		T47	2		T48	2
auto[1207959552:1342177279]	auto[1]	62	1			T44	2		T62	2		T199	4
auto[1342177280:1476395007]	auto[0]	146	1			T48	2		T6	2		T52	2
auto[1342177280:1476395007]	auto[1]	76	1			T194	2		T61	2		T62	6
auto[1476395008:1610612735]	auto[0]	176	1			T102	2		T23	2		T6	4
auto[1476395008:1610612735]	auto[1]	82	1			T198	2		T59	2		T61	2
auto[1610612736:1744830463]	auto[0]	120	1			T41	2		T24	2		T6	4
auto[1610612736:1744830463]	auto[1]	54	1			T62	2		T211	2		T214	2
auto[1744830464:1879048191]	auto[0]	140	1			T110	2		T21	2		T59	4
auto[1744830464:1879048191]	auto[1]	60	1			T6	2		T61	2		T134	2
auto[1879048192:2013265919]	auto[0]	138	1			T45	2		T53	2		T134	2
auto[1879048192:2013265919]	auto[1]	68	1			T2	2		T54	2		T39	2
auto[2013265920:2147483647]	auto[0]	158	1			T48	2		T6	8		T59	2
auto[2013265920:2147483647]	auto[1]	82	1			T197	2		T6	2		T43	2
auto[2147483648:2281701375]	auto[0]	164	1			T6	8		T59	2		T53	4
auto[2147483648:2281701375]	auto[1]	72	1			T19	2		T31	2		T65	4
auto[2281701376:2415919103]	auto[0]	170	1			T2	2		T102	2		T110	2
auto[2281701376:2415919103]	auto[1]	70	1			T6	2		T25	2		T62	4
auto[2415919104:2550136831]	auto[0]	142	1			T22	2		T24	4		T198	2
auto[2415919104:2550136831]	auto[1]	58	1			T61	2		T122	4		T298	2
auto[2550136832:2684354559]	auto[0]	174	1			T41	2		T42	2		T101	2
auto[2550136832:2684354559]	auto[1]	90	1			T6	2		T288	2		T53	2
auto[2684354560:2818572287]	auto[0]	168	1			T41	2		T132	2		T6	2
auto[2684354560:2818572287]	auto[1]	94	1			T6	6		T59	2		T44	2
auto[2818572288:2952790015]	auto[0]	142	1			T1	2		T59	4		T61	4
auto[2818572288:2952790015]	auto[1]	78	1			T48	2		T6	2		T59	4
auto[2952790016:3087007743]	auto[0]	144	1			T40	2		T42	2		T6	2
auto[2952790016:3087007743]	auto[1]	70	1			T2	2		T6	2		T53	2
auto[3087007744:3221225471]	auto[0]	146	1			T22	2		T40	2		T6	2
auto[3087007744:3221225471]	auto[1]	82	1			T198	2		T6	2		T265	2
auto[3221225472:3355443199]	auto[0]	136	1			T22	2		T42	2		T193	2
auto[3221225472:3355443199]	auto[1]	90	1			T6	2		T133	2		T52	2
auto[3355443200:3489660927]	auto[0]	124	1			T1	2		T22	2		T42	2
auto[3355443200:3489660927]	auto[1]	62	1			T61	2		T237	2		T268	2
auto[3489660928:3623878655]	auto[0]	184	1			T1	2		T47	4		T48	2
auto[3489660928:3623878655]	auto[1]	80	1			T22	2		T58	2		T53	2
auto[3623878656:3758096383]	auto[0]	124	1			T22	2		T42	4		T101	2
auto[3623878656:3758096383]	auto[1]	76	1			T24	2		T6	2		T59	2
auto[3758096384:3892314111]	auto[0]	140	1			T132	2		T193	2		T194	2
auto[3758096384:3892314111]	auto[1]	72	1			T375	2		T201	2		T83	2
auto[3892314112:4026531839]	auto[0]	150	1			T23	2		T6	6		T44	2
auto[3892314112:4026531839]	auto[1]	70	1			T42	2		T141	2		T7	2
auto[4026531840:4160749567]	auto[0]	132	1			T6	4		T193	2		T52	2
auto[4026531840:4160749567]	auto[1]	88	1			T48	2		T6	2		T269	2
auto[4160749568:4294967295]	auto[0]	162	1			T65	2		T101	2		T110	2
auto[4160749568:4294967295]	auto[1]	88	1			T58	2		T59	2		T53	4