Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4712

1

T2

8

T15

6

T25

2

auto[1]

2102

1

T15

8

T25

2

T47

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	228	1			T148	2		T129	4		T49	2
auto[134217728:268435455]	234	1			T15	2		T114	2		T43	4
auto[268435456:402653183]	198	1			T2	2		T43	2		T44	2
auto[402653184:536870911]	236	1			T47	2		T114	2		T43	2
auto[536870912:671088639]	206	1			T22	2		T27	2		T149	2
auto[671088640:805306367]	208	1			T15	2		T209	2		T43	2
auto[805306368:939524095]	204	1			T43	4		T100	2		T126	2
auto[939524096:1073741823]	236	1			T43	4		T100	6		T125	2
auto[1073741824:1207959551]	206	1			T21	2		T205	2		T7	2
auto[1207959552:1342177279]	224	1			T43	2		T100	2		T53	2
auto[1342177280:1476395007]	226	1			T118	2		T114	2		T100	2
auto[1476395008:1610612735]	192	1			T100	2		T7	2		T49	2
auto[1610612736:1744830463]	182	1			T43	2		T49	2		T54	2
auto[1744830464:1879048191]	198	1			T43	4		T53	2		T36	2
auto[1879048192:2013265919]	194	1			T2	2		T118	2		T212	2
auto[2013265920:2147483647]	228	1			T2	2		T15	2		T21	2
auto[2147483648:2281701375]	216	1			T15	2		T118	2		T209	2
auto[2281701376:2415919103]	196	1			T43	2		T7	2		T53	2
auto[2415919104:2550136831]	220	1			T15	2		T100	2		T7	2
auto[2550136832:2684354559]	224	1			T212	2		T43	2		T53	2
auto[2684354560:2818572287]	196	1			T118	2		T209	2		T43	2
auto[2818572288:2952790015]	174	1			T205	2		T212	2		T43	2
auto[2952790016:3087007743]	234	1			T118	2		T22	4		T53	2
auto[3087007744:3221225471]	244	1			T15	2		T26	2		T114	2
auto[3221225472:3355443199]	234	1			T43	2		T100	2		T7	4
auto[3355443200:3489660927]	226	1			T25	2		T22	2		T100	2
auto[3489660928:3623878655]	180	1			T205	2		T100	2		T53	2
auto[3623878656:3758096383]	226	1			T2	2		T15	2		T25	2
auto[3758096384:3892314111]	204	1			T21	2		T126	2		T53	2
auto[3892314112:4026531839]	234	1			T213	2		T43	2		T7	2
auto[4026531840:4160749567]	218	1			T43	8		T126	2		T53	2
auto[4160749568:4294967295]	188	1			T212	2		T43	2		T23	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	152	1			T148	2		T129	4		T49	2
auto[0:134217727]	auto[1]	76	1			T54	6		T246	2		T55	4
auto[134217728:268435455]	auto[0]	158	1			T114	2		T43	2		T7	2
auto[134217728:268435455]	auto[1]	76	1			T15	2		T43	2		T133	2
auto[268435456:402653183]	auto[0]	128	1			T2	2		T43	2		T44	2
auto[268435456:402653183]	auto[1]	70	1			T95	2		T8	2		T28	2
auto[402653184:536870911]	auto[0]	168	1			T114	2		T125	2		T7	2
auto[402653184:536870911]	auto[1]	68	1			T47	2		T43	2		T225	2
auto[536870912:671088639]	auto[0]	154	1			T27	2		T88	2		T108	8
auto[536870912:671088639]	auto[1]	52	1			T22	2		T149	2		T133	2
auto[671088640:805306367]	auto[0]	152	1			T15	2		T43	2		T49	2
auto[671088640:805306367]	auto[1]	56	1			T209	2		T86	2		T139	2
auto[805306368:939524095]	auto[0]	136	1			T43	4		T100	2		T126	2
auto[805306368:939524095]	auto[1]	68	1			T48	2		T54	2		T59	2
auto[939524096:1073741823]	auto[0]	186	1			T43	4		T100	4		T125	2
auto[939524096:1073741823]	auto[1]	50	1			T100	2		T54	2		T320	2
auto[1073741824:1207959551]	auto[0]	160	1			T21	2		T205	2		T7	2
auto[1073741824:1207959551]	auto[1]	46	1			T101	4		T248	2		T29	2
auto[1207959552:1342177279]	auto[0]	154	1			T53	2		T56	2		T88	2
auto[1207959552:1342177279]	auto[1]	70	1			T43	2		T100	2		T52	2
auto[1342177280:1476395007]	auto[0]	150	1			T118	2		T114	2		T100	2
auto[1342177280:1476395007]	auto[1]	76	1			T148	2		T187	2		T28	2
auto[1476395008:1610612735]	auto[0]	132	1			T7	2		T52	2		T104	2
auto[1476395008:1610612735]	auto[1]	60	1			T100	2		T49	2		T101	2
auto[1610612736:1744830463]	auto[0]	136	1			T43	2		T49	2		T54	2
auto[1610612736:1744830463]	auto[1]	46	1			T341	2		T50	2		T119	2
auto[1744830464:1879048191]	auto[0]	132	1			T43	2		T53	2		T149	2
auto[1744830464:1879048191]	auto[1]	66	1			T43	2		T36	2		T54	2
auto[1879048192:2013265919]	auto[0]	134	1			T2	2		T118	2		T212	2
auto[1879048192:2013265919]	auto[1]	60	1			T43	2		T7	2		T44	2
auto[2013265920:2147483647]	auto[0]	158	1			T2	2		T15	2		T21	2
auto[2013265920:2147483647]	auto[1]	70	1			T43	2		T130	2		T49	2
auto[2147483648:2281701375]	auto[0]	152	1			T118	2		T209	2		T43	2
auto[2147483648:2281701375]	auto[1]	64	1			T15	2		T43	2		T54	2
auto[2281701376:2415919103]	auto[0]	128	1			T43	2		T49	2		T106	2
auto[2281701376:2415919103]	auto[1]	68	1			T7	2		T53	2		T45	2
auto[2415919104:2550136831]	auto[0]	146	1			T100	2		T7	2		T126	2
auto[2415919104:2550136831]	auto[1]	74	1			T15	2		T49	2		T214	2
auto[2550136832:2684354559]	auto[0]	144	1			T43	2		T53	2		T54	6
auto[2550136832:2684354559]	auto[1]	80	1			T212	2		T101	2		T108	2
auto[2684354560:2818572287]	auto[0]	122	1			T118	2		T100	2		T148	2
auto[2684354560:2818572287]	auto[1]	74	1			T209	2		T43	2		T215	2
auto[2818572288:2952790015]	auto[0]	122	1			T205	2		T212	2		T45	2
auto[2818572288:2952790015]	auto[1]	52	1			T43	2		T7	2		T149	2
auto[2952790016:3087007743]	auto[0]	156	1			T118	2		T22	2		T56	2
auto[2952790016:3087007743]	auto[1]	78	1			T22	2		T53	2		T24	2
auto[3087007744:3221225471]	auto[0]	178	1			T15	2		T114	2		T43	2
auto[3087007744:3221225471]	auto[1]	66	1			T26	2		T125	2		T23	2
auto[3221225472:3355443199]	auto[0]	160	1			T43	2		T100	2		T7	2
auto[3221225472:3355443199]	auto[1]	74	1			T7	2		T188	2		T63	2
auto[3355443200:3489660927]	auto[0]	148	1			T100	2		T36	2		T56	4
auto[3355443200:3489660927]	auto[1]	78	1			T25	2		T22	2		T54	2
auto[3489660928:3623878655]	auto[0]	128	1			T53	2		T45	2		T95	2
auto[3489660928:3623878655]	auto[1]	52	1			T205	2		T100	2		T130	2
auto[3623878656:3758096383]	auto[0]	134	1			T2	2		T25	2		T21	4
auto[3623878656:3758096383]	auto[1]	92	1			T15	2		T49	2		T39	4
auto[3758096384:3892314111]	auto[0]	140	1			T21	2		T126	2		T53	2
auto[3758096384:3892314111]	auto[1]	64	1			T31	2		T413	2		T119	2
auto[3892314112:4026531839]	auto[0]	168	1			T43	2		T7	2		T53	2
auto[3892314112:4026531839]	auto[1]	66	1			T213	2		T108	2		T221	2
auto[4026531840:4160749567]	auto[0]	160	1			T43	8		T126	2		T53	2
auto[4026531840:4160749567]	auto[1]	58	1			T54	2		T204	2		T225	2
auto[4160749568:4294967295]	auto[0]	136	1			T212	2		T43	2		T23	2
auto[4160749568:4294967295]	auto[1]	52	1			T215	2		T106	2		T101	2