Unified Coverage Report :: Group Instance : salt_6

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

2997

1

T1

6

T2

3

T3

6

auto[1]

244

1

T41

4

T122

2

T123

10

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	92	1			T27	1		T86	1		T4	1
auto[134217728:268435455]	97	1			T2	1		T85	1		T52	1
auto[268435456:402653183]	119	1			T15	1		T41	2		T27	2
auto[402653184:536870911]	114	1			T41	1		T216	1		T4	2
auto[536870912:671088639]	109	1			T27	1		T222	1		T4	2
auto[671088640:805306367]	94	1			T3	1		T226	1		T216	2
auto[805306368:939524095]	84	1			T85	1		T103	1		T109	1
auto[939524096:1073741823]	94	1			T41	1		T84	1		T85	2
auto[1073741824:1207959551]	111	1			T2	1		T84	1		T123	1
auto[1207959552:1342177279]	95	1			T27	1		T37	1		T217	1
auto[1342177280:1476395007]	100	1			T45	1		T46	3		T150	1
auto[1476395008:1610612735]	100	1			T52	1		T123	1		T109	1
auto[1610612736:1744830463]	91	1			T102	1		T46	2		T94	1
auto[1744830464:1879048191]	103	1			T1	1		T3	1		T41	1
auto[1879048192:2013265919]	111	1			T27	3		T218	2		T52	1
auto[2013265920:2147483647]	102	1			T41	2		T37	1		T52	1
auto[2147483648:2281701375]	93	1			T226	1		T122	1		T102	3
auto[2281701376:2415919103]	110	1			T1	2		T3	1		T27	1
auto[2415919104:2550136831]	107	1			T3	1		T85	2		T53	1
auto[2550136832:2684354559]	92	1			T37	1		T4	2		T46	3
auto[2684354560:2818572287]	106	1			T3	1		T27	1		T86	1
auto[2818572288:2952790015]	110	1			T1	1		T226	1		T4	1
auto[2952790016:3087007743]	115	1			T13	1		T41	1		T45	1
auto[3087007744:3221225471]	98	1			T27	4		T85	1		T226	1
auto[3221225472:3355443199]	77	1			T51	1		T103	1		T102	1
auto[3355443200:3489660927]	96	1			T1	1		T41	1		T27	1
auto[3489660928:3623878655]	99	1			T15	1		T27	1		T4	1
auto[3623878656:3758096383]	99	1			T3	1		T27	1		T84	1
auto[3758096384:3892314111]	100	1			T27	2		T23	2		T123	1
auto[3892314112:4026531839]	100	1			T29	1		T4	1		T109	1
auto[4026531840:4160749567]	121	1			T1	1		T15	1		T217	2
auto[4160749568:4294967295]	102	1			T2	1		T45	1		T123	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	87	1			T27	1		T86	1		T4	1
auto[0:134217727]	auto[1]	5	1			T389	1		T391	1		T407	1
auto[134217728:268435455]	auto[0]	88	1			T2	1		T85	1		T52	1
auto[134217728:268435455]	auto[1]	9	1			T123	1		T265	1		T411	1
auto[268435456:402653183]	auto[0]	115	1			T15	1		T41	1		T27	2
auto[268435456:402653183]	auto[1]	4	1			T41	1		T123	1		T389	1
auto[402653184:536870911]	auto[0]	109	1			T41	1		T216	1		T4	2
auto[402653184:536870911]	auto[1]	5	1			T409	1		T407	1		T417	1
auto[536870912:671088639]	auto[0]	98	1			T27	1		T222	1		T4	2
auto[536870912:671088639]	auto[1]	11	1			T265	2		T324	1		T246	1
auto[671088640:805306367]	auto[0]	87	1			T3	1		T226	1		T216	2
auto[671088640:805306367]	auto[1]	7	1			T123	1		T420	1		T419	1
auto[805306368:939524095]	auto[0]	75	1			T85	1		T103	1		T94	1
auto[805306368:939524095]	auto[1]	9	1			T109	1		T409	1		T389	1
auto[939524096:1073741823]	auto[0]	86	1			T41	1		T84	1		T85	2
auto[939524096:1073741823]	auto[1]	8	1			T140	1		T399	1		T314	2
auto[1073741824:1207959551]	auto[0]	105	1			T2	1		T84	1		T102	2
auto[1073741824:1207959551]	auto[1]	6	1			T123	1		T150	1		T407	1
auto[1207959552:1342177279]	auto[0]	88	1			T27	1		T37	1		T217	1
auto[1207959552:1342177279]	auto[1]	7	1			T391	1		T324	1		T310	1
auto[1342177280:1476395007]	auto[0]	91	1			T45	1		T46	3		T6	1
auto[1342177280:1476395007]	auto[1]	9	1			T150	1		T283	1		T408	2
auto[1476395008:1610612735]	auto[0]	88	1			T52	1		T46	2		T65	2
auto[1476395008:1610612735]	auto[1]	12	1			T123	1		T109	1		T324	1
auto[1610612736:1744830463]	auto[0]	85	1			T102	1		T46	2		T94	1
auto[1610612736:1744830463]	auto[1]	6	1			T151	1		T287	1		T421	1
auto[1744830464:1879048191]	auto[0]	99	1			T1	1		T3	1		T37	1
auto[1744830464:1879048191]	auto[1]	4	1			T41	1		T314	1		T425	1
auto[1879048192:2013265919]	auto[0]	103	1			T27	3		T218	2		T52	1
auto[1879048192:2013265919]	auto[1]	8	1			T419	1		T414	1		T247	3
auto[2013265920:2147483647]	auto[0]	90	1			T41	1		T37	1		T52	1
auto[2013265920:2147483647]	auto[1]	12	1			T41	1		T122	1		T249	1
auto[2147483648:2281701375]	auto[0]	85	1			T226	1		T102	3		T109	1
auto[2147483648:2281701375]	auto[1]	8	1			T122	1		T390	1		T324	1
auto[2281701376:2415919103]	auto[0]	104	1			T1	2		T3	1		T27	1
auto[2281701376:2415919103]	auto[1]	6	1			T150	1		T407	2		T247	2
auto[2415919104:2550136831]	auto[0]	95	1			T3	1		T85	2		T53	1
auto[2415919104:2550136831]	auto[1]	12	1			T109	2		T390	1		T324	1
auto[2550136832:2684354559]	auto[0]	87	1			T37	1		T4	2		T46	3
auto[2550136832:2684354559]	auto[1]	5	1			T151	1		T324	1		T408	1
auto[2684354560:2818572287]	auto[0]	96	1			T3	1		T27	1		T86	1
auto[2684354560:2818572287]	auto[1]	10	1			T123	1		T150	1		T283	2
auto[2818572288:2952790015]	auto[0]	107	1			T1	1		T226	1		T4	1
auto[2818572288:2952790015]	auto[1]	3	1			T283	1		T398	1		T427	1
auto[2952790016:3087007743]	auto[0]	105	1			T13	1		T41	1		T45	1
auto[2952790016:3087007743]	auto[1]	10	1			T123	1		T391	1		T399	1
auto[3087007744:3221225471]	auto[0]	94	1			T27	4		T85	1		T226	1
auto[3087007744:3221225471]	auto[1]	4	1			T123	1		T389	1		T285	1
auto[3221225472:3355443199]	auto[0]	73	1			T51	1		T103	1		T102	1
auto[3221225472:3355443199]	auto[1]	4	1			T265	2		T324	1		T285	1
auto[3355443200:3489660927]	auto[0]	85	1			T1	1		T27	1		T19	1
auto[3355443200:3489660927]	auto[1]	11	1			T41	1		T109	1		T389	1
auto[3489660928:3623878655]	auto[0]	92	1			T15	1		T27	1		T4	1
auto[3489660928:3623878655]	auto[1]	7	1			T140	1		T417	1		T410	2
auto[3623878656:3758096383]	auto[0]	92	1			T3	1		T27	1		T84	1
auto[3623878656:3758096383]	auto[1]	7	1			T123	1		T150	1		T390	1
auto[3758096384:3892314111]	auto[0]	95	1			T27	2		T23	2		T123	1
auto[3758096384:3892314111]	auto[1]	5	1			T398	1		T407	1		T420	1
auto[3892314112:4026531839]	auto[0]	85	1			T29	1		T4	1		T65	1
auto[3892314112:4026531839]	auto[1]	15	1			T109	1		T140	1		T398	1
auto[4026531840:4160749567]	auto[0]	113	1			T1	1		T15	1		T217	2
auto[4026531840:4160749567]	auto[1]	8	1			T324	1		T407	1		T285	1
auto[4160749568:4294967295]	auto[0]	95	1			T2	1		T45	1		T46	1
auto[4160749568:4294967295]	auto[1]	7	1			T123	1		T409	1		T391	1