Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4194

1

T1

8

T3

10

T4

4

auto[1]

2034

1

T3

2

T4

4

T16

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	178	1			T1	2		T3	2		T14	2
auto[134217728:268435455]	214	1			T232	2		T242	2		T89	2
auto[268435456:402653183]	180	1			T232	2		T30	2		T47	2
auto[402653184:536870911]	184	1			T38	4		T49	8		T72	2
auto[536870912:671088639]	188	1			T21	2		T30	4		T38	4
auto[671088640:805306367]	174	1			T49	2		T230	2		T69	2
auto[805306368:939524095]	158	1			T4	2		T88	2		T43	2
auto[939524096:1073741823]	208	1			T3	2		T88	2		T21	2
auto[1073741824:1207959551]	168	1			T88	2		T160	2		T105	4
auto[1207959552:1342177279]	218	1			T34	2		T88	2		T242	2
auto[1342177280:1476395007]	216	1			T3	2		T16	2		T34	2
auto[1476395008:1610612735]	184	1			T3	2		T14	2		T34	4
auto[1610612736:1744830463]	200	1			T35	2		T43	2		T47	2
auto[1744830464:1879048191]	190	1			T232	2		T160	2		T6	2
auto[1879048192:2013265919]	158	1			T89	2		T130	2		T38	2
auto[2013265920:2147483647]	156	1			T4	2		T35	2		T242	2
auto[2147483648:2281701375]	242	1			T1	2		T89	2		T105	2
auto[2281701376:2415919103]	206	1			T3	2		T34	2		T38	4
auto[2415919104:2550136831]	196	1			T30	2		T89	2		T43	2
auto[2550136832:2684354559]	210	1			T49	4		T95	2		T67	4
auto[2684354560:2818572287]	182	1			T38	2		T49	2		T95	2
auto[2818572288:2952790015]	200	1			T16	2		T160	2		T38	4
auto[2952790016:3087007743]	204	1			T1	2		T34	2		T232	2
auto[3087007744:3221225471]	194	1			T21	2		T232	2		T35	2
auto[3221225472:3355443199]	228	1			T16	2		T105	2		T38	6
auto[3355443200:3489660927]	204	1			T14	2		T88	2		T21	2
auto[3489660928:3623878655]	192	1			T4	2		T21	6		T30	2
auto[3623878656:3758096383]	216	1			T34	2		T30	2		T47	2
auto[3758096384:3892314111]	202	1			T3	2		T34	2		T6	2
auto[3892314112:4026531839]	164	1			T4	2		T38	10		T49	2
auto[4026531840:4160749567]	206	1			T13	2		T17	2		T34	4
auto[4160749568:4294967295]	208	1			T1	2		T21	2		T49	4

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	110	1			T1	2		T3	2		T14	2
auto[0:134217727]	auto[1]	68	1			T95	2		T59	2		T310	2
auto[134217728:268435455]	auto[0]	150	1			T242	2		T105	4		T6	2
auto[134217728:268435455]	auto[1]	64	1			T232	2		T89	2		T40	4
auto[268435456:402653183]	auto[0]	116	1			T30	2		T38	2		T49	2
auto[268435456:402653183]	auto[1]	64	1			T232	2		T47	2		T31	2
auto[402653184:536870911]	auto[0]	126	1			T38	4		T49	6		T72	2
auto[402653184:536870911]	auto[1]	58	1			T49	2		T7	2		T59	4
auto[536870912:671088639]	auto[0]	118	1			T21	2		T30	2		T39	2
auto[536870912:671088639]	auto[1]	70	1			T30	2		T38	4		T95	2
auto[671088640:805306367]	auto[0]	116	1			T49	2		T230	2		T240	2
auto[671088640:805306367]	auto[1]	58	1			T69	2		T151	2		T307	2
auto[805306368:939524095]	auto[0]	100	1			T4	2		T88	2		T38	2
auto[805306368:939524095]	auto[1]	58	1			T43	2		T230	2		T324	2
auto[939524096:1073741823]	auto[0]	142	1			T3	2		T88	2		T21	2
auto[939524096:1073741823]	auto[1]	66	1			T47	2		T41	4		T250	2
auto[1073741824:1207959551]	auto[0]	114	1			T88	2		T160	2		T105	2
auto[1073741824:1207959551]	auto[1]	54	1			T105	2		T409	2		T63	2
auto[1207959552:1342177279]	auto[0]	156	1			T34	2		T242	2		T247	2
auto[1207959552:1342177279]	auto[1]	62	1			T88	2		T105	2		T130	2
auto[1342177280:1476395007]	auto[0]	154	1			T3	2		T34	2		T38	6
auto[1342177280:1476395007]	auto[1]	62	1			T16	2		T49	2		T31	2
auto[1476395008:1610612735]	auto[0]	116	1			T3	2		T14	2		T89	2
auto[1476395008:1610612735]	auto[1]	68	1			T34	4		T88	2		T72	2
auto[1610612736:1744830463]	auto[0]	136	1			T43	2		T38	2		T49	2
auto[1610612736:1744830463]	auto[1]	64	1			T35	2		T47	2		T137	2
auto[1744830464:1879048191]	auto[0]	124	1			T160	2		T6	2		T38	2
auto[1744830464:1879048191]	auto[1]	66	1			T232	2		T49	2		T274	2
auto[1879048192:2013265919]	auto[0]	100	1			T89	2		T130	2		T38	2
auto[1879048192:2013265919]	auto[1]	58	1			T60	2		T315	2		T363	2
auto[2013265920:2147483647]	auto[0]	102	1			T4	2		T242	2		T38	2
auto[2013265920:2147483647]	auto[1]	54	1			T35	2		T38	2		T151	2
auto[2147483648:2281701375]	auto[0]	154	1			T1	2		T89	2		T105	2
auto[2147483648:2281701375]	auto[1]	88	1			T38	2		T31	2		T68	2
auto[2281701376:2415919103]	auto[0]	132	1			T34	2		T38	2		T31	2
auto[2281701376:2415919103]	auto[1]	74	1			T3	2		T38	2		T49	2
auto[2415919104:2550136831]	auto[0]	136	1			T30	2		T89	2		T38	4
auto[2415919104:2550136831]	auto[1]	60	1			T43	2		T49	4		T96	2
auto[2550136832:2684354559]	auto[0]	154	1			T49	4		T95	2		T67	4
auto[2550136832:2684354559]	auto[1]	56	1			T239	2		T324	2		T396	2
auto[2684354560:2818572287]	auto[0]	120	1			T38	2		T150	2		T54	2
auto[2684354560:2818572287]	auto[1]	62	1			T49	2		T95	2		T63	2
auto[2818572288:2952790015]	auto[0]	142	1			T160	2		T38	2		T49	4
auto[2818572288:2952790015]	auto[1]	58	1			T16	2		T38	2		T92	2
auto[2952790016:3087007743]	auto[0]	146	1			T1	2		T34	2		T42	2
auto[2952790016:3087007743]	auto[1]	58	1			T232	2		T240	2		T90	2
auto[3087007744:3221225471]	auto[0]	120	1			T21	2		T35	2		T39	2
auto[3087007744:3221225471]	auto[1]	74	1			T232	2		T44	2		T115	2
auto[3221225472:3355443199]	auto[0]	152	1			T38	6		T49	2		T39	2
auto[3221225472:3355443199]	auto[1]	76	1			T16	2		T105	2		T307	2
auto[3355443200:3489660927]	auto[0]	138	1			T14	2		T88	2		T21	2
auto[3355443200:3489660927]	auto[1]	66	1			T38	2		T227	2		T41	2
auto[3489660928:3623878655]	auto[0]	132	1			T21	6		T38	2		T49	2
auto[3489660928:3623878655]	auto[1]	60	1			T4	2		T30	2		T240	2
auto[3623878656:3758096383]	auto[0]	140	1			T30	2		T47	2		T38	4
auto[3623878656:3758096383]	auto[1]	76	1			T34	2		T38	4		T71	2
auto[3758096384:3892314111]	auto[0]	152	1			T3	2		T34	2		T6	2
auto[3758096384:3892314111]	auto[1]	50	1			T38	2		T48	2		T58	2
auto[3892314112:4026531839]	auto[0]	112	1			T38	8		T49	2		T230	2
auto[3892314112:4026531839]	auto[1]	52	1			T4	2		T38	2		T94	2
auto[4026531840:4160749567]	auto[0]	128	1			T13	2		T17	2		T34	4
auto[4026531840:4160749567]	auto[1]	78	1			T88	2		T35	2		T68	2
auto[4160749568:4294967295]	auto[0]	156	1			T1	2		T21	2		T49	4
auto[4160749568:4294967295]	auto[1]	52	1			T274	2		T226	2		T59	2