Unified Coverage Report :: Group Instance : salt_1

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

2720

1

T1

4

T3

6

T4

4

auto[1]

298

1

T14

12

T115

10

T150

17

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	113	1			T38	3		T115	1		T95	1
auto[134217728:268435455]	73	1			T34	1		T105	1		T38	2
auto[268435456:402653183]	119	1			T34	2		T35	1		T160	1
auto[402653184:536870911]	91	1			T38	2		T49	1		T115	2
auto[536870912:671088639]	105	1			T3	2		T14	1		T88	2
auto[671088640:805306367]	91	1			T14	1		T34	1		T30	1
auto[805306368:939524095]	84	1			T4	1		T14	1		T38	1
auto[939524096:1073741823]	90	1			T34	2		T242	1		T105	1
auto[1073741824:1207959551]	96	1			T14	1		T232	1		T38	3
auto[1207959552:1342177279]	102	1			T1	1		T105	1		T49	1
auto[1342177280:1476395007]	72	1			T3	1		T89	1		T105	1
auto[1476395008:1610612735]	100	1			T3	1		T14	1		T232	1
auto[1610612736:1744830463]	109	1			T88	1		T21	1		T160	1
auto[1744830464:1879048191]	105	1			T1	1		T88	1		T232	1
auto[1879048192:2013265919]	107	1			T34	2		T88	3		T38	2
auto[2013265920:2147483647]	93	1			T14	2		T30	1		T38	2
auto[2147483648:2281701375]	80	1			T4	1		T34	1		T43	1
auto[2281701376:2415919103]	108	1			T21	1		T44	1		T30	1
auto[2415919104:2550136831]	93	1			T4	1		T38	1		T49	2
auto[2550136832:2684354559]	84	1			T34	1		T89	1		T38	2
auto[2684354560:2818572287]	87	1			T1	1		T14	1		T21	1
auto[2818572288:2952790015]	83	1			T1	1		T14	1		T160	1
auto[2952790016:3087007743]	93	1			T3	1		T17	1		T232	1
auto[3087007744:3221225471]	88	1			T3	1		T35	1		T30	1
auto[3221225472:3355443199]	97	1			T4	1		T14	1		T21	2
auto[3355443200:3489660927]	84	1			T13	1		T14	1		T21	1
auto[3489660928:3623878655]	105	1			T14	1		T16	1		T35	1
auto[3623878656:3758096383]	89	1			T14	1		T30	1		T43	2
auto[3758096384:3892314111]	102	1			T16	1		T34	1		T35	1
auto[3892314112:4026531839]	92	1			T47	1		T38	4		T49	1
auto[4026531840:4160749567]	90	1			T14	1		T16	1		T89	2
auto[4160749568:4294967295]	93	1			T14	1		T21	2		T242	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	99	1			T38	3		T95	1		T239	1
auto[0:134217727]	auto[1]	14	1			T115	1		T143	1		T306	1
auto[134217728:268435455]	auto[0]	68	1			T34	1		T105	1		T38	2
auto[134217728:268435455]	auto[1]	5	1			T150	1		T151	1		T433	1
auto[268435456:402653183]	auto[0]	110	1			T34	2		T35	1		T160	1
auto[268435456:402653183]	auto[1]	9	1			T150	1		T144	1		T408	1
auto[402653184:536870911]	auto[0]	85	1			T38	2		T49	1		T115	1
auto[402653184:536870911]	auto[1]	6	1			T115	1		T394	1		T432	1
auto[536870912:671088639]	auto[0]	94	1			T3	2		T88	2		T247	1
auto[536870912:671088639]	auto[1]	11	1			T14	1		T115	1		T150	1
auto[671088640:805306367]	auto[0]	78	1			T34	1		T30	1		T105	1
auto[671088640:805306367]	auto[1]	13	1			T14	1		T115	1		T150	2
auto[805306368:939524095]	auto[0]	75	1			T4	1		T38	1		T49	2
auto[805306368:939524095]	auto[1]	9	1			T14	1		T115	1		T143	1
auto[939524096:1073741823]	auto[0]	82	1			T34	2		T242	1		T105	1
auto[939524096:1073741823]	auto[1]	8	1			T394	1		T143	1		T144	1
auto[1073741824:1207959551]	auto[0]	87	1			T232	1		T38	3		T49	3
auto[1073741824:1207959551]	auto[1]	9	1			T14	1		T115	1		T308	2
auto[1207959552:1342177279]	auto[0]	95	1			T1	1		T105	1		T49	1
auto[1207959552:1342177279]	auto[1]	7	1			T394	1		T144	1		T404	1
auto[1342177280:1476395007]	auto[0]	67	1			T3	1		T89	1		T105	1
auto[1342177280:1476395007]	auto[1]	5	1			T150	1		T379	1		T422	1
auto[1476395008:1610612735]	auto[0]	89	1			T3	1		T232	1		T242	1
auto[1476395008:1610612735]	auto[1]	11	1			T14	1		T150	1		T151	1
auto[1610612736:1744830463]	auto[0]	102	1			T88	1		T21	1		T160	1
auto[1610612736:1744830463]	auto[1]	7	1			T151	1		T424	1		T196	1
auto[1744830464:1879048191]	auto[0]	93	1			T1	1		T88	1		T232	1
auto[1744830464:1879048191]	auto[1]	12	1			T143	1		T144	2		T357	1
auto[1879048192:2013265919]	auto[0]	98	1			T34	2		T88	3		T38	2
auto[1879048192:2013265919]	auto[1]	9	1			T379	1		T357	1		T360	1
auto[2013265920:2147483647]	auto[0]	80	1			T14	1		T30	1		T38	2
auto[2013265920:2147483647]	auto[1]	13	1			T14	1		T115	1		T150	1
auto[2147483648:2281701375]	auto[0]	77	1			T4	1		T34	1		T43	1
auto[2147483648:2281701375]	auto[1]	3	1			T150	1		T384	1		T426	1
auto[2281701376:2415919103]	auto[0]	96	1			T21	1		T44	1		T30	1
auto[2281701376:2415919103]	auto[1]	12	1			T306	1		T144	2		T379	1
auto[2415919104:2550136831]	auto[0]	83	1			T4	1		T38	1		T49	2
auto[2415919104:2550136831]	auto[1]	10	1			T142	1		T143	1		T306	1
auto[2550136832:2684354559]	auto[0]	74	1			T34	1		T89	1		T38	2
auto[2550136832:2684354559]	auto[1]	10	1			T115	1		T394	1		T141	2
auto[2684354560:2818572287]	auto[0]	78	1			T1	1		T21	1		T30	2
auto[2684354560:2818572287]	auto[1]	9	1			T14	1		T115	1		T150	1
auto[2818572288:2952790015]	auto[0]	74	1			T1	1		T14	1		T160	1
auto[2818572288:2952790015]	auto[1]	9	1			T150	1		T139	1		T405	1
auto[2952790016:3087007743]	auto[0]	85	1			T3	1		T17	1		T232	1
auto[2952790016:3087007743]	auto[1]	8	1			T150	1		T143	1		T306	1
auto[3087007744:3221225471]	auto[0]	74	1			T3	1		T35	1		T30	1
auto[3087007744:3221225471]	auto[1]	14	1			T141	1		T144	1		T379	1
auto[3221225472:3355443199]	auto[0]	90	1			T4	1		T21	2		T49	2
auto[3221225472:3355443199]	auto[1]	7	1			T14	1		T141	1		T142	2
auto[3355443200:3489660927]	auto[0]	70	1			T13	1		T21	1		T232	1
auto[3355443200:3489660927]	auto[1]	14	1			T14	1		T141	2		T143	1
auto[3489660928:3623878655]	auto[0]	94	1			T16	1		T35	1		T38	1
auto[3489660928:3623878655]	auto[1]	11	1			T14	1		T150	2		T141	1
auto[3623878656:3758096383]	auto[0]	79	1			T30	1		T43	2		T49	1
auto[3623878656:3758096383]	auto[1]	10	1			T14	1		T150	1		T306	1
auto[3758096384:3892314111]	auto[0]	97	1			T16	1		T34	1		T35	1
auto[3758096384:3892314111]	auto[1]	5	1			T150	1		T394	1		T141	1
auto[3892314112:4026531839]	auto[0]	84	1			T47	1		T38	4		T49	1
auto[3892314112:4026531839]	auto[1]	8	1			T150	1		T404	1		T357	1
auto[4026531840:4160749567]	auto[0]	82	1			T16	1		T89	2		T38	1
auto[4026531840:4160749567]	auto[1]	8	1			T14	1		T141	1		T368	1
auto[4160749568:4294967295]	auto[0]	81	1			T14	1		T21	2		T242	1
auto[4160749568:4294967295]	auto[1]	12	1			T115	1		T151	1		T141	2