Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6504

1

T1

12

T3

15

T4

8

auto[1]

280

1

T14

7

T115

8

T150

9

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2739	1			T1	5		T3	8		T4	2
auto[134217728:268435455]	145	1			T1	1		T16	1		T34	1
auto[268435456:402653183]	134	1			T4	1		T160	1		T105	1
auto[402653184:536870911]	168	1			T3	1		T14	1		T34	1
auto[536870912:671088639]	142	1			T4	1		T34	1		T44	1
auto[671088640:805306367]	149	1			T1	1		T34	1		T242	1
auto[805306368:939524095]	140	1			T3	1		T21	1		T232	1
auto[939524096:1073741823]	123	1			T21	1		T30	2		T105	1
auto[1073741824:1207959551]	132	1			T14	1		T30	1		T38	1
auto[1207959552:1342177279]	150	1			T3	1		T4	1		T34	1
auto[1342177280:1476395007]	131	1			T1	1		T21	1		T35	1
auto[1476395008:1610612735]	132	1			T14	1		T89	1		T38	2
auto[1610612736:1744830463]	139	1			T1	1		T3	1		T21	1
auto[1744830464:1879048191]	120	1			T17	1		T21	1		T160	1
auto[1879048192:2013265919]	120	1			T1	1		T14	1		T34	1
auto[2013265920:2147483647]	117	1			T4	1		T88	1		T21	2
auto[2147483648:2281701375]	121	1			T4	1		T89	1		T105	1
auto[2281701376:2415919103]	130	1			T14	1		T16	1		T88	2
auto[2415919104:2550136831]	129	1			T3	2		T232	1		T38	1
auto[2550136832:2684354559]	133	1			T34	1		T88	1		T21	1
auto[2684354560:2818572287]	124	1			T4	1		T13	1		T35	1
auto[2818572288:2952790015]	120	1			T38	1		T49	1		T71	1
auto[2952790016:3087007743]	120	1			T1	1		T14	1		T34	2
auto[3087007744:3221225471]	140	1			T14	1		T16	1		T35	1
auto[3221225472:3355443199]	117	1			T89	1		T38	2		T49	3
auto[3355443200:3489660927]	124	1			T242	1		T38	2		T49	1
auto[3489660928:3623878655]	120	1			T3	1		T30	1		T130	1
auto[3623878656:3758096383]	129	1			T14	1		T105	1		T38	2
auto[3758096384:3892314111]	131	1			T232	1		T242	1		T105	1
auto[3892314112:4026531839]	137	1			T1	1		T14	1		T88	1
auto[4026531840:4160749567]	100	1			T14	1		T16	1		T34	3
auto[4160749568:4294967295]	128	1			T34	1		T21	1		T232	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2734	1			T1	5		T3	8		T4	2
auto[0:134217727]	auto[1]	5	1			T141	1		T144	1		T424	1
auto[134217728:268435455]	auto[0]	139	1			T1	1		T16	1		T34	1
auto[134217728:268435455]	auto[1]	6	1			T144	2		T379	1		T357	1
auto[268435456:402653183]	auto[0]	127	1			T4	1		T160	1		T105	1
auto[268435456:402653183]	auto[1]	7	1			T141	2		T145	1		T379	1
auto[402653184:536870911]	auto[0]	158	1			T3	1		T34	1		T88	1
auto[402653184:536870911]	auto[1]	10	1			T14	1		T394	2		T144	1
auto[536870912:671088639]	auto[0]	134	1			T4	1		T34	1		T44	1
auto[536870912:671088639]	auto[1]	8	1			T141	1		T143	1		T306	1
auto[671088640:805306367]	auto[0]	145	1			T1	1		T34	1		T242	1
auto[671088640:805306367]	auto[1]	4	1			T394	2		T319	1		T425	1
auto[805306368:939524095]	auto[0]	131	1			T3	1		T21	1		T232	1
auto[805306368:939524095]	auto[1]	9	1			T141	2		T424	1		T196	1
auto[939524096:1073741823]	auto[0]	117	1			T21	1		T30	2		T105	1
auto[939524096:1073741823]	auto[1]	6	1			T115	1		T150	1		T306	1
auto[1073741824:1207959551]	auto[0]	121	1			T30	1		T38	1		T230	1
auto[1073741824:1207959551]	auto[1]	11	1			T14	1		T115	1		T151	1
auto[1207959552:1342177279]	auto[0]	140	1			T3	1		T4	1		T34	1
auto[1207959552:1342177279]	auto[1]	10	1			T139	1		T141	1		T308	1
auto[1342177280:1476395007]	auto[0]	122	1			T1	1		T21	1		T35	1
auto[1342177280:1476395007]	auto[1]	9	1			T115	1		T139	1		T394	2
auto[1476395008:1610612735]	auto[0]	124	1			T89	1		T38	2		T137	1
auto[1476395008:1610612735]	auto[1]	8	1			T14	1		T394	1		T308	1
auto[1610612736:1744830463]	auto[0]	127	1			T1	1		T3	1		T21	1
auto[1610612736:1744830463]	auto[1]	12	1			T139	1		T144	1		T357	1
auto[1744830464:1879048191]	auto[0]	113	1			T17	1		T21	1		T160	1
auto[1744830464:1879048191]	auto[1]	7	1			T141	1		T144	1		T308	2
auto[1879048192:2013265919]	auto[0]	114	1			T1	1		T14	1		T34	1
auto[1879048192:2013265919]	auto[1]	6	1			T150	3		T422	1		T319	1
auto[2013265920:2147483647]	auto[0]	107	1			T4	1		T88	1		T21	2
auto[2013265920:2147483647]	auto[1]	10	1			T115	1		T150	1		T306	1
auto[2147483648:2281701375]	auto[0]	111	1			T4	1		T89	1		T105	1
auto[2147483648:2281701375]	auto[1]	10	1			T394	1		T379	1		T357	1
auto[2281701376:2415919103]	auto[0]	124	1			T14	1		T16	1		T88	2
auto[2281701376:2415919103]	auto[1]	6	1			T404	1		T196	1		T426	1
auto[2415919104:2550136831]	auto[0]	119	1			T3	2		T232	1		T38	1
auto[2415919104:2550136831]	auto[1]	10	1			T139	1		T141	1		T144	2
auto[2550136832:2684354559]	auto[0]	126	1			T34	1		T88	1		T21	1
auto[2550136832:2684354559]	auto[1]	7	1			T139	1		T407	1		T424	1
auto[2684354560:2818572287]	auto[0]	115	1			T4	1		T13	1		T35	1
auto[2684354560:2818572287]	auto[1]	9	1			T150	1		T144	1		T379	1
auto[2818572288:2952790015]	auto[0]	115	1			T38	1		T49	1		T71	1
auto[2818572288:2952790015]	auto[1]	5	1			T115	1		T150	1		T394	1
auto[2952790016:3087007743]	auto[0]	110	1			T1	1		T14	1		T34	2
auto[2952790016:3087007743]	auto[1]	10	1			T394	1		T142	1		T306	1
auto[3087007744:3221225471]	auto[0]	130	1			T16	1		T35	1		T105	1
auto[3087007744:3221225471]	auto[1]	10	1			T14	1		T115	1		T141	2
auto[3221225472:3355443199]	auto[0]	110	1			T89	1		T38	2		T49	3
auto[3221225472:3355443199]	auto[1]	7	1			T306	1		T368	1		T427	1
auto[3355443200:3489660927]	auto[0]	117	1			T242	1		T38	2		T49	1
auto[3355443200:3489660927]	auto[1]	7	1			T115	1		T150	1		T427	1
auto[3489660928:3623878655]	auto[0]	109	1			T3	1		T30	1		T130	1
auto[3489660928:3623878655]	auto[1]	11	1			T141	2		T143	1		T144	1
auto[3623878656:3758096383]	auto[0]	116	1			T105	1		T38	2		T49	2
auto[3623878656:3758096383]	auto[1]	13	1			T14	1		T308	1		T404	1
auto[3758096384:3892314111]	auto[0]	120	1			T232	1		T242	1		T105	1
auto[3758096384:3892314111]	auto[1]	11	1			T394	1		T142	1		T424	1
auto[3892314112:4026531839]	auto[0]	120	1			T1	1		T88	1		T38	5
auto[3892314112:4026531839]	auto[1]	17	1			T14	1		T394	1		T141	1
auto[4026531840:4160749567]	auto[0]	90	1			T16	1		T34	3		T232	1
auto[4026531840:4160749567]	auto[1]	10	1			T14	1		T150	1		T139	1
auto[4160749568:4294967295]	auto[0]	119	1			T34	1		T21	1		T232	2
auto[4160749568:4294967295]	auto[1]	9	1			T115	1		T408	1		T308	1