Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4244

1

T1

6

T3

12

T4

4

auto[1]

1984

1

T1

2

T4

4

T16

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	188	1			T3	2		T47	2		T38	4
auto[134217728:268435455]	140	1			T14	2		T16	2		T21	2
auto[268435456:402653183]	192	1			T3	2		T16	2		T34	2
auto[402653184:536870911]	212	1			T13	2		T160	2		T105	2
auto[536870912:671088639]	198	1			T34	2		T47	2		T38	4
auto[671088640:805306367]	226	1			T1	2		T21	4		T38	4
auto[805306368:939524095]	196	1			T160	2		T42	2		T89	2
auto[939524096:1073741823]	184	1			T1	2		T130	2		T6	2
auto[1073741824:1207959551]	208	1			T3	2		T4	2		T30	2
auto[1207959552:1342177279]	188	1			T88	4		T43	2		T38	2
auto[1342177280:1476395007]	164	1			T232	2		T44	2		T30	2
auto[1476395008:1610612735]	208	1			T4	4		T34	4		T35	2
auto[1610612736:1744830463]	174	1			T232	2		T38	4		T49	2
auto[1744830464:1879048191]	212	1			T3	2		T14	2		T21	2
auto[1879048192:2013265919]	204	1			T35	2		T247	2		T30	2
auto[2013265920:2147483647]	214	1			T34	2		T21	2		T242	2
auto[2147483648:2281701375]	216	1			T38	8		T49	4		T115	2
auto[2281701376:2415919103]	222	1			T88	2		T105	4		T38	2
auto[2415919104:2550136831]	196	1			T3	2		T4	2		T105	2
auto[2550136832:2684354559]	214	1			T17	2		T34	2		T38	8
auto[2684354560:2818572287]	178	1			T34	2		T48	2		T52	2
auto[2818572288:2952790015]	212	1			T34	4		T21	2		T30	2
auto[2952790016:3087007743]	196	1			T88	4		T21	2		T89	2
auto[3087007744:3221225471]	186	1			T88	2		T232	2		T89	2
auto[3221225472:3355443199]	214	1			T232	2		T6	2		T38	2
auto[3355443200:3489660927]	200	1			T14	2		T16	2		T232	2
auto[3489660928:3623878655]	208	1			T34	2		T30	2		T130	2
auto[3623878656:3758096383]	178	1			T1	2		T6	2		T38	2
auto[3758096384:3892314111]	170	1			T35	2		T105	4		T6	2
auto[3892314112:4026531839]	186	1			T3	2		T242	2		T105	2
auto[4026531840:4160749567]	186	1			T1	2		T34	2		T88	2
auto[4160749568:4294967295]	158	1			T160	2		T105	2		T38	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	126	1			T3	2		T47	2		T38	4
auto[0:134217727]	auto[1]	62	1			T49	2		T137	2		T69	2
auto[134217728:268435455]	auto[0]	102	1			T14	2		T21	2		T42	2
auto[134217728:268435455]	auto[1]	38	1			T16	2		T248	2		T40	2
auto[268435456:402653183]	auto[0]	116	1			T3	2		T16	2		T49	6
auto[268435456:402653183]	auto[1]	76	1			T34	2		T21	2		T38	2
auto[402653184:536870911]	auto[0]	158	1			T13	2		T160	2		T38	2
auto[402653184:536870911]	auto[1]	54	1			T105	2		T67	2		T274	2
auto[536870912:671088639]	auto[0]	146	1			T47	2		T49	2		T101	2
auto[536870912:671088639]	auto[1]	52	1			T34	2		T38	4		T97	2
auto[671088640:805306367]	auto[0]	156	1			T1	2		T21	2		T38	4
auto[671088640:805306367]	auto[1]	70	1			T21	2		T92	2		T273	2
auto[805306368:939524095]	auto[0]	118	1			T42	2		T49	2		T39	2
auto[805306368:939524095]	auto[1]	78	1			T160	2		T89	2		T38	2
auto[939524096:1073741823]	auto[0]	118	1			T1	2		T130	2		T38	2
auto[939524096:1073741823]	auto[1]	66	1			T6	2		T49	2		T115	2
auto[1073741824:1207959551]	auto[0]	138	1			T3	2		T4	2		T30	2
auto[1073741824:1207959551]	auto[1]	70	1			T38	2		T150	2		T41	2
auto[1207959552:1342177279]	auto[0]	114	1			T88	4		T43	2		T38	2
auto[1207959552:1342177279]	auto[1]	74	1			T137	2		T69	2		T90	4
auto[1342177280:1476395007]	auto[0]	106	1			T232	2		T30	2		T38	6
auto[1342177280:1476395007]	auto[1]	58	1			T44	2		T292	2		T102	2
auto[1476395008:1610612735]	auto[0]	160	1			T4	2		T34	2		T35	2
auto[1476395008:1610612735]	auto[1]	48	1			T4	2		T34	2		T89	2
auto[1610612736:1744830463]	auto[0]	132	1			T232	2		T38	2		T49	2
auto[1610612736:1744830463]	auto[1]	42	1			T38	2		T41	2		T73	2
auto[1744830464:1879048191]	auto[0]	146	1			T3	2		T14	2		T21	2
auto[1744830464:1879048191]	auto[1]	66	1			T72	2		T282	2		T250	2
auto[1879048192:2013265919]	auto[0]	144	1			T35	2		T30	2		T49	6
auto[1879048192:2013265919]	auto[1]	60	1			T247	2		T38	2		T31	2
auto[2013265920:2147483647]	auto[0]	142	1			T34	2		T242	2		T30	2
auto[2013265920:2147483647]	auto[1]	72	1			T21	2		T294	2		T63	4
auto[2147483648:2281701375]	auto[0]	130	1			T38	8		T49	2		T54	2
auto[2147483648:2281701375]	auto[1]	86	1			T49	2		T115	2		T54	2
auto[2281701376:2415919103]	auto[0]	138	1			T88	2		T105	2		T230	2
auto[2281701376:2415919103]	auto[1]	84	1			T105	2		T38	2		T274	2
auto[2415919104:2550136831]	auto[0]	144	1			T3	2		T105	2		T38	6
auto[2415919104:2550136831]	auto[1]	52	1			T4	2		T43	2		T69	2
auto[2550136832:2684354559]	auto[0]	122	1			T17	2		T38	6		T49	2
auto[2550136832:2684354559]	auto[1]	92	1			T34	2		T38	2		T49	2
auto[2684354560:2818572287]	auto[0]	128	1			T34	2		T41	4		T59	2
auto[2684354560:2818572287]	auto[1]	50	1			T48	2		T52	2		T226	2
auto[2818572288:2952790015]	auto[0]	140	1			T34	4		T21	2		T30	2
auto[2818572288:2952790015]	auto[1]	72	1			T31	2		T313	2		T41	4
auto[2952790016:3087007743]	auto[0]	146	1			T88	4		T21	2		T89	2
auto[2952790016:3087007743]	auto[1]	50	1			T38	2		T69	2		T240	2
auto[3087007744:3221225471]	auto[0]	128	1			T88	2		T89	2		T43	2
auto[3087007744:3221225471]	auto[1]	58	1			T232	2		T105	2		T69	4
auto[3221225472:3355443199]	auto[0]	142	1			T232	2		T49	4		T31	2
auto[3221225472:3355443199]	auto[1]	72	1			T6	2		T38	2		T137	2
auto[3355443200:3489660927]	auto[0]	140	1			T14	2		T16	2		T232	2
auto[3355443200:3489660927]	auto[1]	60	1			T39	2		T68	2		T276	2
auto[3489660928:3623878655]	auto[0]	148	1			T34	2		T30	2		T6	2
auto[3489660928:3623878655]	auto[1]	60	1			T130	2		T38	2		T150	2
auto[3623878656:3758096383]	auto[0]	128	1			T1	2		T6	2		T38	2
auto[3623878656:3758096383]	auto[1]	50	1			T49	2		T226	2		T63	2
auto[3758096384:3892314111]	auto[0]	122	1			T35	2		T105	4		T6	2
auto[3758096384:3892314111]	auto[1]	48	1			T47	2		T292	2		T41	4
auto[3892314112:4026531839]	auto[0]	132	1			T3	2		T105	2		T38	2
auto[3892314112:4026531839]	auto[1]	54	1			T242	2		T130	2		T226	2
auto[4026531840:4160749567]	auto[0]	124	1			T88	2		T49	2		T228	2
auto[4026531840:4160749567]	auto[1]	62	1			T1	2		T34	2		T38	2
auto[4160749568:4294967295]	auto[0]	110	1			T105	2		T49	2		T40	2
auto[4160749568:4294967295]	auto[1]	48	1			T160	2		T38	2		T49	2