Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4404

1

T1

10

T3

10

T16

10

auto[1]

2125

1

T3

2

T14

8

T16

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	208	1			T26	2		T224	4		T221	2
auto[134217728:268435455]	186	1			T18	2		T228	2		T222	2
auto[268435456:402653183]	192	1			T16	2		T23	2		T44	2
auto[402653184:536870911]	212	1			T27	2		T44	2		T228	4
auto[536870912:671088639]	176	1			T1	2		T27	2		T4	2
auto[671088640:805306367]	224	1			T18	2		T222	2		T45	2
auto[805306368:939524095]	174	1			T222	2		T4	2		T35	2
auto[939524096:1073741823]	216	1			T14	2		T44	2		T255	4
auto[1073741824:1207959551]	230	1			T3	4		T14	2		T23	2
auto[1207959552:1342177279]	206	1			T16	2		T125	2		T26	2
auto[1342177280:1476395007]	184	1			T1	2		T45	2		T4	4
auto[1476395008:1610612735]	212	1			T224	2		T4	2		T24	2
auto[1610612736:1744830463]	182	1			T1	2		T34	2		T23	2
auto[1744830464:1879048191]	182	1			T14	2		T16	2		T47	2
auto[1879048192:2013265919]	242	1			T47	2		T45	2		T154	2
auto[2013265920:2147483647]	212	1			T1	2		T18	2		T34	2
auto[2147483648:2281701375]	226	1			T4	4		T35	2		T24	2
auto[2281701376:2415919103]	186	1			T255	2		T4	8		T156	2
auto[2415919104:2550136831]	210	1			T31	2		T223	4		T4	6
auto[2550136832:2684354559]	204	1			T16	2		T43	2		T23	2
auto[2684354560:2818572287]	224	1			T16	2		T123	2		T224	4
auto[2818572288:2952790015]	226	1			T27	2		T4	6		T49	2
auto[2952790016:3087007743]	188	1			T123	2		T131	2		T154	2
auto[3087007744:3221225471]	170	1			T47	2		T131	2		T154	2
auto[3221225472:3355443199]	218	1			T3	2		T16	2		T44	2
auto[3355443200:3489660927]	216	1			T1	2		T3	4		T43	2
auto[3489660928:3623878655]	204	1			T26	4		T27	2		T47	2
auto[3623878656:3758096383]	206	1			T16	2		T26	2		T154	2
auto[3758096384:3892314111]	224	1			T18	2		T43	2		T228	2
auto[3892314112:4026531839]	181	1			T3	2		T228	4		T31	2
auto[4026531840:4160749567]	194	1			T26	2		T4	4		T36	2
auto[4160749568:4294967295]	214	1			T14	2		T26	2		T45	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	130	1			T26	2		T225	2		T58	2
auto[0:134217727]	auto[1]	78	1			T224	4		T221	2		T83	2
auto[134217728:268435455]	auto[0]	140	1			T18	2		T223	2		T35	2
auto[134217728:268435455]	auto[1]	46	1			T228	2		T222	2		T386	2
auto[268435456:402653183]	auto[0]	120	1			T16	2		T23	2		T221	2
auto[268435456:402653183]	auto[1]	72	1			T44	2		T154	2		T35	2
auto[402653184:536870911]	auto[0]	144	1			T27	2		T44	2		T228	4
auto[402653184:536870911]	auto[1]	68	1			T225	2		T117	2		T62	2
auto[536870912:671088639]	auto[0]	110	1			T1	2		T4	2		T213	2
auto[536870912:671088639]	auto[1]	66	1			T27	2		T328	2		T66	2
auto[671088640:805306367]	auto[0]	160	1			T18	2		T222	2		T4	8
auto[671088640:805306367]	auto[1]	64	1			T45	2		T54	4		T5	2
auto[805306368:939524095]	auto[0]	124	1			T4	2		T35	2		T67	2
auto[805306368:939524095]	auto[1]	50	1			T222	2		T241	2		T345	2
auto[939524096:1073741823]	auto[0]	146	1			T44	2		T255	4		T4	2
auto[939524096:1073741823]	auto[1]	70	1			T14	2		T99	2		T71	2
auto[1073741824:1207959551]	auto[0]	154	1			T3	4		T23	2		T228	2
auto[1073741824:1207959551]	auto[1]	76	1			T14	2		T54	2		T4	2
auto[1207959552:1342177279]	auto[0]	134	1			T16	2		T26	2		T222	2
auto[1207959552:1342177279]	auto[1]	72	1			T125	2		T27	2		T45	2
auto[1342177280:1476395007]	auto[0]	112	1			T1	2		T45	2		T4	2
auto[1342177280:1476395007]	auto[1]	72	1			T4	2		T7	2		T88	2
auto[1476395008:1610612735]	auto[0]	152	1			T224	2		T24	2		T113	4
auto[1476395008:1610612735]	auto[1]	60	1			T4	2		T25	2		T73	6
auto[1610612736:1744830463]	auto[0]	122	1			T1	2		T34	2		T47	2
auto[1610612736:1744830463]	auto[1]	60	1			T23	2		T51	2		T37	2
auto[1744830464:1879048191]	auto[0]	116	1			T16	2		T47	2		T114	2
auto[1744830464:1879048191]	auto[1]	66	1			T14	2		T255	2		T213	2
auto[1879048192:2013265919]	auto[0]	158	1			T47	2		T45	2		T255	4
auto[1879048192:2013265919]	auto[1]	84	1			T154	2		T54	2		T4	2
auto[2013265920:2147483647]	auto[0]	132	1			T1	2		T18	2		T34	2
auto[2013265920:2147483647]	auto[1]	80	1			T4	2		T5	2		T156	4
auto[2147483648:2281701375]	auto[0]	174	1			T4	4		T35	2		T51	2
auto[2147483648:2281701375]	auto[1]	52	1			T24	2		T155	2		T149	2
auto[2281701376:2415919103]	auto[0]	146	1			T255	2		T4	8		T149	2
auto[2281701376:2415919103]	auto[1]	40	1			T156	2		T127	4		T61	2
auto[2415919104:2550136831]	auto[0]	136	1			T31	2		T223	4		T4	2
auto[2415919104:2550136831]	auto[1]	74	1			T4	4		T35	2		T219	2
auto[2550136832:2684354559]	auto[0]	128	1			T16	2		T43	2		T23	2
auto[2550136832:2684354559]	auto[1]	76	1			T230	2		T36	2		T73	2
auto[2684354560:2818572287]	auto[0]	138	1			T123	2		T224	2		T44	2
auto[2684354560:2818572287]	auto[1]	86	1			T16	2		T224	2		T228	2
auto[2818572288:2952790015]	auto[0]	150	1			T27	2		T4	6		T49	2
auto[2818572288:2952790015]	auto[1]	76	1			T28	2		T120	2		T208	2
auto[2952790016:3087007743]	auto[0]	126	1			T123	2		T131	2		T154	2
auto[2952790016:3087007743]	auto[1]	62	1			T35	2		T115	2		T237	2
auto[3087007744:3221225471]	auto[0]	110	1			T47	2		T4	2		T19	2
auto[3087007744:3221225471]	auto[1]	60	1			T131	2		T154	2		T235	2
auto[3221225472:3355443199]	auto[0]	144	1			T3	2		T44	2		T31	2
auto[3221225472:3355443199]	auto[1]	74	1			T16	2		T36	2		T226	2
auto[3355443200:3489660927]	auto[0]	152	1			T1	2		T3	2		T43	2
auto[3355443200:3489660927]	auto[1]	64	1			T3	2		T27	2		T4	2
auto[3489660928:3623878655]	auto[0]	132	1			T26	2		T27	2		T31	2
auto[3489660928:3623878655]	auto[1]	72	1			T26	2		T47	2		T54	2
auto[3623878656:3758096383]	auto[0]	146	1			T16	2		T51	2		T36	2
auto[3623878656:3758096383]	auto[1]	60	1			T26	2		T154	2		T85	2
auto[3758096384:3892314111]	auto[0]	144	1			T18	2		T228	2		T4	4
auto[3758096384:3892314111]	auto[1]	80	1			T43	2		T53	2		T155	2
auto[3892314112:4026531839]	auto[0]	130	1			T3	2		T228	4		T31	2
auto[3892314112:4026531839]	auto[1]	51	1			T156	2		T88	2		T62	2
auto[4026531840:4160749567]	auto[0]	130	1			T26	2		T4	4		T48	2
auto[4026531840:4160749567]	auto[1]	64	1			T36	2		T115	2		T83	2
auto[4160749568:4294967295]	auto[0]	164	1			T26	2		T45	2		T113	4
auto[4160749568:4294967295]	auto[1]	50	1			T14	2		T230	2		T89	2