Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4554

1

T1

10

T3

10

T14

8

auto[1]

1974

1

T3

2

T16

2

T18

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	206	1			T224	2		T27	2		T154	2
auto[134217728:268435455]	190	1			T16	2		T47	2		T44	2
auto[268435456:402653183]	188	1			T23	2		T45	2		T4	4
auto[402653184:536870911]	214	1			T3	2		T34	2		T23	2
auto[536870912:671088639]	220	1			T1	2		T26	2		T47	4
auto[671088640:805306367]	234	1			T26	2		T224	2		T44	2
auto[805306368:939524095]	204	1			T1	2		T14	2		T23	2
auto[939524096:1073741823]	210	1			T123	2		T26	2		T255	2
auto[1073741824:1207959551]	194	1			T16	2		T26	2		T4	4
auto[1207959552:1342177279]	202	1			T47	2		T228	2		T45	2
auto[1342177280:1476395007]	210	1			T34	2		T26	2		T222	2
auto[1476395008:1610612735]	208	1			T18	2		T123	2		T44	2
auto[1610612736:1744830463]	220	1			T3	2		T224	2		T228	2
auto[1744830464:1879048191]	218	1			T224	2		T221	2		T154	2
auto[1879048192:2013265919]	200	1			T1	2		T224	2		T54	4
auto[2013265920:2147483647]	206	1			T1	2		T3	2		T255	2
auto[2147483648:2281701375]	188	1			T14	2		T16	2		T26	2
auto[2281701376:2415919103]	208	1			T43	2		T27	2		T4	4
auto[2415919104:2550136831]	192	1			T26	2		T44	2		T228	2
auto[2550136832:2684354559]	220	1			T222	2		T223	4		T4	6
auto[2684354560:2818572287]	220	1			T3	2		T16	2		T18	2
auto[2818572288:2952790015]	150	1			T43	2		T31	2		T154	2
auto[2952790016:3087007743]	196	1			T14	2		T18	2		T228	2
auto[3087007744:3221225471]	192	1			T3	2		T16	2		T255	2
auto[3221225472:3355443199]	184	1			T18	2		T228	2		T31	2
auto[3355443200:3489660927]	210	1			T125	2		T23	2		T221	2
auto[3489660928:3623878655]	200	1			T1	2		T16	4		T44	2
auto[3623878656:3758096383]	222	1			T3	2		T14	2		T27	2
auto[3758096384:3892314111]	190	1			T47	2		T228	2		T222	2
auto[3892314112:4026531839]	248	1			T223	2		T4	8		T35	2
auto[4026531840:4160749567]	180	1			T4	6		T24	4		T36	2
auto[4160749568:4294967295]	204	1			T27	2		T154	2		T4	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	148	1			T27	2		T154	2		T24	2
auto[0:134217727]	auto[1]	58	1			T224	2		T155	2		T62	2
auto[134217728:268435455]	auto[0]	118	1			T16	2		T47	2		T44	2
auto[134217728:268435455]	auto[1]	72	1			T4	2		T48	2		T66	2
auto[268435456:402653183]	auto[0]	138	1			T23	2		T45	2		T4	4
auto[268435456:402653183]	auto[1]	50	1			T5	2		T88	2		T89	2
auto[402653184:536870911]	auto[0]	148	1			T3	2		T26	2		T45	4
auto[402653184:536870911]	auto[1]	66	1			T34	2		T23	2		T5	2
auto[536870912:671088639]	auto[0]	138	1			T1	2		T26	2		T47	4
auto[536870912:671088639]	auto[1]	82	1			T228	2		T67	2		T237	2
auto[671088640:805306367]	auto[0]	166	1			T26	2		T224	2		T44	2
auto[671088640:805306367]	auto[1]	68	1			T31	2		T230	4		T4	4
auto[805306368:939524095]	auto[0]	144	1			T1	2		T14	2		T154	2
auto[805306368:939524095]	auto[1]	60	1			T23	2		T225	4		T48	2
auto[939524096:1073741823]	auto[0]	148	1			T26	2		T4	4		T35	2
auto[939524096:1073741823]	auto[1]	62	1			T123	2		T255	2		T54	2
auto[1073741824:1207959551]	auto[0]	140	1			T16	2		T4	2		T52	2
auto[1073741824:1207959551]	auto[1]	54	1			T26	2		T4	2		T113	2
auto[1207959552:1342177279]	auto[0]	142	1			T47	2		T228	2		T45	2
auto[1207959552:1342177279]	auto[1]	60	1			T113	4		T58	2		T157	2
auto[1342177280:1476395007]	auto[0]	158	1			T26	2		T222	2		T255	2
auto[1342177280:1476395007]	auto[1]	52	1			T34	2		T4	2		T48	2
auto[1476395008:1610612735]	auto[0]	122	1			T44	2		T222	2		T4	2
auto[1476395008:1610612735]	auto[1]	86	1			T18	2		T123	2		T67	2
auto[1610612736:1744830463]	auto[0]	148	1			T3	2		T4	2		T24	2
auto[1610612736:1744830463]	auto[1]	72	1			T224	2		T228	2		T221	2
auto[1744830464:1879048191]	auto[0]	150	1			T224	2		T221	2		T154	2
auto[1744830464:1879048191]	auto[1]	68	1			T4	2		T52	4		T117	2
auto[1879048192:2013265919]	auto[0]	122	1			T1	2		T224	2		T54	4
auto[1879048192:2013265919]	auto[1]	78	1			T35	2		T36	2		T155	2
auto[2013265920:2147483647]	auto[0]	150	1			T1	2		T3	2		T255	2
auto[2013265920:2147483647]	auto[1]	56	1			T230	2		T24	2		T113	2
auto[2147483648:2281701375]	auto[0]	132	1			T14	2		T26	2		T154	2
auto[2147483648:2281701375]	auto[1]	56	1			T16	2		T83	2		T84	2
auto[2281701376:2415919103]	auto[0]	140	1			T27	2		T35	2		T24	2
auto[2281701376:2415919103]	auto[1]	68	1			T43	2		T4	4		T67	2
auto[2415919104:2550136831]	auto[0]	142	1			T26	2		T44	2		T228	2
auto[2415919104:2550136831]	auto[1]	50	1			T4	4		T328	2		T127	2
auto[2550136832:2684354559]	auto[0]	152	1			T222	2		T223	4		T4	2
auto[2550136832:2684354559]	auto[1]	68	1			T4	4		T122	2		T158	2
auto[2684354560:2818572287]	auto[0]	164	1			T3	2		T16	2		T18	2
auto[2684354560:2818572287]	auto[1]	56	1			T43	2		T27	2		T31	2
auto[2818572288:2952790015]	auto[0]	96	1			T154	2		T4	2		T24	2
auto[2818572288:2952790015]	auto[1]	54	1			T43	2		T31	2		T113	2
auto[2952790016:3087007743]	auto[0]	132	1			T14	2		T223	2		T4	2
auto[2952790016:3087007743]	auto[1]	64	1			T18	2		T228	2		T117	4
auto[3087007744:3221225471]	auto[0]	128	1			T16	2		T255	2		T4	4
auto[3087007744:3221225471]	auto[1]	64	1			T3	2		T113	4		T122	2
auto[3221225472:3355443199]	auto[0]	118	1			T222	2		T45	2		T4	4
auto[3221225472:3355443199]	auto[1]	66	1			T18	2		T228	2		T31	2
auto[3355443200:3489660927]	auto[0]	134	1			T23	2		T221	2		T4	2
auto[3355443200:3489660927]	auto[1]	76	1			T125	2		T230	2		T53	2
auto[3489660928:3623878655]	auto[0]	154	1			T1	2		T16	4		T228	2
auto[3489660928:3623878655]	auto[1]	46	1			T44	2		T89	2		T127	2
auto[3623878656:3758096383]	auto[0]	148	1			T3	2		T14	2		T27	2
auto[3623878656:3758096383]	auto[1]	74	1			T4	2		T36	2		T88	2
auto[3758096384:3892314111]	auto[0]	148	1			T47	2		T228	2		T222	2
auto[3758096384:3892314111]	auto[1]	42	1			T67	2		T72	2		T73	2
auto[3892314112:4026531839]	auto[0]	176	1			T223	2		T4	4		T35	2
auto[3892314112:4026531839]	auto[1]	72	1			T4	4		T113	2		T85	2
auto[4026531840:4160749567]	auto[0]	140	1			T4	4		T24	4		T36	2
auto[4026531840:4160749567]	auto[1]	40	1			T4	2		T122	2		T66	2
auto[4160749568:4294967295]	auto[0]	170	1			T27	2		T154	2		T4	2
auto[4160749568:4294967295]	auto[1]	34	1			T35	2		T67	2		T113	2