Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7064

1

T2

18

T3

7

T4

9

auto[1]

291

1

T13

13

T96

1

T117

20

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2944	1			T2	8		T3	3		T4	4
auto[134217728:268435455]	191	1			T16	1		T32	1		T225	1
auto[268435456:402653183]	169	1			T2	1		T13	2		T26	2
auto[402653184:536870911]	147	1			T4	1		T38	1		T109	1
auto[536870912:671088639]	129	1			T2	1		T13	1		T17	1
auto[671088640:805306367]	164	1			T23	1		T24	1		T39	3
auto[805306368:939524095]	141	1			T13	1		T17	1		T26	1
auto[939524096:1073741823]	130	1			T2	2		T26	4		T39	1
auto[1073741824:1207959551]	154	1			T17	1		T26	1		T23	1
auto[1207959552:1342177279]	126	1			T17	1		T24	1		T39	2
auto[1342177280:1476395007]	141	1			T26	1		T34	1		T74	2
auto[1476395008:1610612735]	132	1			T2	1		T13	1		T96	2
auto[1610612736:1744830463]	136	1			T13	1		T38	1		T26	1
auto[1744830464:1879048191]	126	1			T13	1		T26	1		T23	1
auto[1879048192:2013265919]	131	1			T2	1		T14	1		T38	1
auto[2013265920:2147483647]	137	1			T13	1		T26	3		T23	2
auto[2147483648:2281701375]	144	1			T13	1		T26	6		T109	1
auto[2281701376:2415919103]	128	1			T16	1		T17	1		T38	1
auto[2415919104:2550136831]	142	1			T3	2		T4	1		T26	4
auto[2550136832:2684354559]	138	1			T2	1		T4	1		T26	2
auto[2684354560:2818572287]	126	1			T2	1		T3	1		T13	1
auto[2818572288:2952790015]	134	1			T26	2		T96	1		T39	3
auto[2952790016:3087007743]	140	1			T3	1		T14	2		T26	1
auto[3087007744:3221225471]	119	1			T13	2		T26	2		T96	1
auto[3221225472:3355443199]	136	1			T4	1		T13	2		T26	1
auto[3355443200:3489660927]	162	1			T2	1		T38	1		T26	2
auto[3489660928:3623878655]	145	1			T2	1		T26	2		T23	1
auto[3623878656:3758096383]	147	1			T13	2		T14	1		T26	1
auto[3758096384:3892314111]	137	1			T16	1		T43	1		T39	5
auto[3892314112:4026531839]	140	1			T13	1		T26	2		T23	1
auto[4026531840:4160749567]	167	1			T4	1		T39	2		T47	1
auto[4160749568:4294967295]	152	1			T17	1		T38	1		T26	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2940	1			T2	8		T3	3		T4	4
auto[0:134217727]	auto[1]	4	1			T315	1		T363	2		T345	1
auto[134217728:268435455]	auto[0]	181	1			T16	1		T32	1		T225	1
auto[134217728:268435455]	auto[1]	10	1			T313	1		T418	1		T342	1
auto[268435456:402653183]	auto[0]	158	1			T2	1		T26	2		T23	2
auto[268435456:402653183]	auto[1]	11	1			T13	2		T117	1		T142	1
auto[402653184:536870911]	auto[0]	141	1			T4	1		T38	1		T109	1
auto[402653184:536870911]	auto[1]	6	1			T117	1		T144	1		T318	1
auto[536870912:671088639]	auto[0]	122	1			T2	1		T17	1		T109	1
auto[536870912:671088639]	auto[1]	7	1			T13	1		T260	1		T419	1
auto[671088640:805306367]	auto[0]	155	1			T23	1		T24	1		T39	3
auto[671088640:805306367]	auto[1]	9	1			T142	1		T318	1		T335	1
auto[805306368:939524095]	auto[0]	130	1			T17	1		T26	1		T23	1
auto[805306368:939524095]	auto[1]	11	1			T13	1		T142	1		T260	1
auto[939524096:1073741823]	auto[0]	116	1			T2	2		T26	4		T39	1
auto[939524096:1073741823]	auto[1]	14	1			T117	1		T144	1		T318	1
auto[1073741824:1207959551]	auto[0]	144	1			T17	1		T26	1		T23	1
auto[1073741824:1207959551]	auto[1]	10	1			T260	1		T411	2		T346	1
auto[1207959552:1342177279]	auto[0]	121	1			T17	1		T24	1		T39	2
auto[1207959552:1342177279]	auto[1]	5	1			T272	1		T335	1		T363	1
auto[1342177280:1476395007]	auto[0]	133	1			T26	1		T34	1		T74	2
auto[1342177280:1476395007]	auto[1]	8	1			T117	1		T260	1		T146	2
auto[1476395008:1610612735]	auto[0]	118	1			T2	1		T96	2		T43	1
auto[1476395008:1610612735]	auto[1]	14	1			T13	1		T117	3		T212	2
auto[1610612736:1744830463]	auto[0]	125	1			T13	1		T38	1		T26	1
auto[1610612736:1744830463]	auto[1]	11	1			T117	1		T260	1		T144	1
auto[1744830464:1879048191]	auto[0]	116	1			T13	1		T26	1		T23	1
auto[1744830464:1879048191]	auto[1]	10	1			T146	2		T335	1		T346	1
auto[1879048192:2013265919]	auto[0]	126	1			T2	1		T14	1		T38	1
auto[1879048192:2013265919]	auto[1]	5	1			T96	1		T276	1		T146	1
auto[2013265920:2147483647]	auto[0]	125	1			T26	3		T23	2		T39	2
auto[2013265920:2147483647]	auto[1]	12	1			T13	1		T228	3		T313	1
auto[2147483648:2281701375]	auto[0]	137	1			T26	6		T109	1		T39	3
auto[2147483648:2281701375]	auto[1]	7	1			T13	1		T117	1		T142	1
auto[2281701376:2415919103]	auto[0]	122	1			T16	1		T17	1		T38	1
auto[2281701376:2415919103]	auto[1]	6	1			T117	1		T318	1		T418	1
auto[2415919104:2550136831]	auto[0]	133	1			T3	2		T4	1		T26	4
auto[2415919104:2550136831]	auto[1]	9	1			T117	1		T260	1		T412	1
auto[2550136832:2684354559]	auto[0]	129	1			T2	1		T4	1		T26	2
auto[2550136832:2684354559]	auto[1]	9	1			T117	1		T318	1		T315	1
auto[2684354560:2818572287]	auto[0]	117	1			T2	1		T3	1		T26	1
auto[2684354560:2818572287]	auto[1]	9	1			T13	1		T117	1		T412	1
auto[2818572288:2952790015]	auto[0]	123	1			T26	2		T96	1		T39	3
auto[2818572288:2952790015]	auto[1]	11	1			T117	2		T145	1		T388	1
auto[2952790016:3087007743]	auto[0]	131	1			T3	1		T14	2		T26	1
auto[2952790016:3087007743]	auto[1]	9	1			T260	2		T276	1		T212	2
auto[3087007744:3221225471]	auto[0]	114	1			T26	2		T96	1		T43	1
auto[3087007744:3221225471]	auto[1]	5	1			T13	2		T279	1		T363	1
auto[3221225472:3355443199]	auto[0]	129	1			T4	1		T13	1		T26	1
auto[3221225472:3355443199]	auto[1]	7	1			T13	1		T146	1		T314	1
auto[3355443200:3489660927]	auto[0]	152	1			T2	1		T38	1		T26	2
auto[3355443200:3489660927]	auto[1]	10	1			T142	1		T318	1		T346	1
auto[3489660928:3623878655]	auto[0]	135	1			T2	1		T26	2		T23	1
auto[3489660928:3623878655]	auto[1]	10	1			T117	3		T260	1		T107	1
auto[3623878656:3758096383]	auto[0]	136	1			T13	1		T14	1		T26	1
auto[3623878656:3758096383]	auto[1]	11	1			T13	1		T117	1		T314	1
auto[3758096384:3892314111]	auto[0]	127	1			T16	1		T43	1		T39	5
auto[3758096384:3892314111]	auto[1]	10	1			T117	1		T141	1		T228	1
auto[3892314112:4026531839]	auto[0]	129	1			T26	2		T23	1		T39	2
auto[3892314112:4026531839]	auto[1]	11	1			T13	1		T228	1		T146	1
auto[4026531840:4160749567]	auto[0]	157	1			T4	1		T39	2		T47	1
auto[4026531840:4160749567]	auto[1]	10	1			T228	1		T145	1		T146	1
auto[4160749568:4294967295]	auto[0]	142	1			T17	1		T38	1		T26	1
auto[4160749568:4294967295]	auto[1]	10	1			T142	1		T144	1		T318	1