SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 8 | 0 | 8 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
invalid_hw_input_cp | 8 | 0 | 8 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 8 | 0 | 8 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[OtpRootKeyInvalid] | 830 | 1 | T3 | 40 | T23 | 40 | T24 | 18 | ||||
auto[OtpRootKeyValidLow] | 157 | 1 | T3 | 7 | T23 | 7 | T24 | 2 | ||||
auto[LcStateInvalid] | 224 | 1 | T84 | 8 | T383 | 84 | T384 | 24 | ||||
auto[OtpDevIdInvalid] | 72 | 1 | T83 | 36 | T385 | 12 | T384 | 24 | ||||
auto[RomDigestInvalid] | 84 | 1 | T87 | 24 | T83 | 12 | T386 | 48 | ||||
auto[RomDigestValidLow] | 108 | 1 | T87 | 48 | T387 | 36 | T388 | 24 | ||||
auto[FlashCreatorSeedInvalid] | 36 | 1 | T387 | 12 | T386 | 24 | - | - | ||||
auto[FlashOwnerSeedInvalid] | 12 | 1 | T90 | 12 | - | - | - | - |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |