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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4720 1 T18 4 T25 4 T26 4
auto[1] 2252 1 T15 2 T18 2 T25 2



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 236 1 T48 2 T184 2 T98 4
auto[134217728:268435455] 222 1 T183 2 T184 2 T54 2
auto[268435456:402653183] 258 1 T25 2 T48 6 T49 6
auto[402653184:536870911] 216 1 T27 2 T35 2 T48 2
auto[536870912:671088639] 236 1 T32 2 T100 4 T55 4
auto[671088640:805306367] 188 1 T26 2 T22 2 T184 2
auto[805306368:939524095] 210 1 T49 2 T98 2 T36 2
auto[939524096:1073741823] 202 1 T48 2 T61 2 T49 2
auto[1073741824:1207959551] 226 1 T80 4 T184 2 T49 6
auto[1207959552:1342177279] 188 1 T35 2 T48 2 T23 2
auto[1342177280:1476395007] 236 1 T48 2 T49 6 T63 2
auto[1476395008:1610612735] 222 1 T52 2 T63 4 T192 2
auto[1610612736:1744830463] 244 1 T48 2 T184 2 T49 8
auto[1744830464:1879048191] 160 1 T49 2 T83 4 T185 2
auto[1879048192:2013265919] 214 1 T18 2 T26 2 T184 2
auto[2013265920:2147483647] 244 1 T26 2 T49 2 T199 2
auto[2147483648:2281701375] 212 1 T48 4 T184 2 T23 2
auto[2281701376:2415919103] 208 1 T49 2 T100 4 T24 2
auto[2415919104:2550136831] 224 1 T25 2 T48 2 T52 2
auto[2550136832:2684354559] 224 1 T15 2 T26 2 T184 2
auto[2684354560:2818572287] 220 1 T49 6 T98 2 T86 2
auto[2818572288:2952790015] 206 1 T48 4 T184 2 T49 4
auto[2952790016:3087007743] 206 1 T18 2 T27 4 T49 2
auto[3087007744:3221225471] 206 1 T25 2 T35 4 T49 6
auto[3221225472:3355443199] 228 1 T49 4 T63 2 T46 2
auto[3355443200:3489660927] 196 1 T18 2 T22 2 T49 2
auto[3489660928:3623878655] 200 1 T80 2 T184 2 T52 2
auto[3623878656:3758096383] 230 1 T48 2 T22 2 T49 2
auto[3758096384:3892314111] 200 1 T35 2 T49 4 T98 4
auto[3892314112:4026531839] 256 1 T35 2 T48 4 T183 2
auto[4026531840:4160749567] 232 1 T48 2 T22 2 T49 2
auto[4160749568:4294967295] 222 1 T80 2 T184 2 T49 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 166 1 T184 2 T98 2 T86 2
auto[0:134217727] auto[1] 70 1 T48 2 T98 2 T71 2
auto[134217728:268435455] auto[0] 142 1 T184 2 T54 2 T70 2
auto[134217728:268435455] auto[1] 80 1 T183 2 T185 2 T92 2
auto[268435456:402653183] auto[0] 172 1 T25 2 T48 6 T49 4
auto[268435456:402653183] auto[1] 86 1 T49 2 T37 2 T99 2
auto[402653184:536870911] auto[0] 142 1 T35 2 T48 2 T98 2
auto[402653184:536870911] auto[1] 74 1 T27 2 T49 4 T63 2
auto[536870912:671088639] auto[0] 164 1 T100 4 T55 4 T51 2
auto[536870912:671088639] auto[1] 72 1 T32 2 T112 2 T410 2
auto[671088640:805306367] auto[0] 114 1 T22 2 T184 2 T98 2
auto[671088640:805306367] auto[1] 74 1 T26 2 T49 2 T249 2
auto[805306368:939524095] auto[0] 138 1 T36 2 T54 2 T133 2
auto[805306368:939524095] auto[1] 72 1 T49 2 T98 2 T190 2
auto[939524096:1073741823] auto[0] 144 1 T61 2 T49 2 T63 2
auto[939524096:1073741823] auto[1] 58 1 T48 2 T98 2 T37 2
auto[1073741824:1207959551] auto[0] 128 1 T184 2 T49 6 T100 2
auto[1073741824:1207959551] auto[1] 98 1 T80 4 T52 2 T100 2
auto[1207959552:1342177279] auto[0] 136 1 T49 4 T63 2 T100 2
auto[1207959552:1342177279] auto[1] 52 1 T35 2 T48 2 T23 2
auto[1342177280:1476395007] auto[0] 158 1 T48 2 T49 4 T63 2
auto[1342177280:1476395007] auto[1] 78 1 T49 2 T190 2 T53 2
auto[1476395008:1610612735] auto[0] 138 1 T52 2 T63 4 T192 2
auto[1476395008:1610612735] auto[1] 84 1 T177 2 T50 2 T87 2
auto[1610612736:1744830463] auto[0] 182 1 T48 2 T184 2 T36 2
auto[1610612736:1744830463] auto[1] 62 1 T49 8 T98 4 T170 2
auto[1744830464:1879048191] auto[0] 106 1 T83 2 T185 2 T272 2
auto[1744830464:1879048191] auto[1] 54 1 T49 2 T83 2 T99 2
auto[1879048192:2013265919] auto[0] 148 1 T18 2 T26 2 T184 2
auto[1879048192:2013265919] auto[1] 66 1 T36 2 T190 2 T100 2
auto[2013265920:2147483647] auto[0] 178 1 T26 2 T49 2 T199 2
auto[2013265920:2147483647] auto[1] 66 1 T68 2 T115 2 T4 2
auto[2147483648:2281701375] auto[0] 144 1 T48 2 T184 2 T63 2
auto[2147483648:2281701375] auto[1] 68 1 T48 2 T23 2 T49 2
auto[2281701376:2415919103] auto[0] 142 1 T100 4 T24 2 T249 2
auto[2281701376:2415919103] auto[1] 66 1 T49 2 T199 2 T54 2
auto[2415919104:2550136831] auto[0] 146 1 T25 2 T63 2 T100 2
auto[2415919104:2550136831] auto[1] 78 1 T48 2 T52 2 T63 2
auto[2550136832:2684354559] auto[0] 146 1 T184 2 T23 2 T63 2
auto[2550136832:2684354559] auto[1] 78 1 T15 2 T26 2 T49 6
auto[2684354560:2818572287] auto[0] 126 1 T49 2 T46 2 T100 2
auto[2684354560:2818572287] auto[1] 94 1 T49 4 T98 2 T86 2
auto[2818572288:2952790015] auto[0] 138 1 T48 2 T184 2 T49 2
auto[2818572288:2952790015] auto[1] 68 1 T48 2 T49 2 T32 2
auto[2952790016:3087007743] auto[0] 140 1 T49 2 T63 2 T100 4
auto[2952790016:3087007743] auto[1] 66 1 T18 2 T27 4 T37 2
auto[3087007744:3221225471] auto[0] 130 1 T35 2 T33 2 T24 2
auto[3087007744:3221225471] auto[1] 76 1 T25 2 T35 2 T49 6
auto[3221225472:3355443199] auto[0] 166 1 T49 2 T63 2 T46 2
auto[3221225472:3355443199] auto[1] 62 1 T49 2 T56 2 T99 2
auto[3355443200:3489660927] auto[0] 150 1 T18 2 T22 2 T49 2
auto[3355443200:3489660927] auto[1] 46 1 T73 2 T30 2 T115 2
auto[3489660928:3623878655] auto[0] 142 1 T184 2 T64 2 T188 2
auto[3489660928:3623878655] auto[1] 58 1 T80 2 T52 2 T71 2
auto[3623878656:3758096383] auto[0] 170 1 T48 2 T22 2 T49 2
auto[3623878656:3758096383] auto[1] 60 1 T86 2 T46 2 T54 2
auto[3758096384:3892314111] auto[0] 116 1 T49 4 T186 2 T179 2
auto[3758096384:3892314111] auto[1] 84 1 T35 2 T98 4 T186 2
auto[3892314112:4026531839] auto[0] 184 1 T35 2 T183 2 T23 2
auto[3892314112:4026531839] auto[1] 72 1 T48 4 T49 2 T52 2
auto[4026531840:4160749567] auto[0] 162 1 T49 2 T83 2 T46 2
auto[4026531840:4160749567] auto[1] 70 1 T48 2 T22 2 T46 2
auto[4160749568:4294967295] auto[0] 162 1 T184 2 T49 2 T63 2
auto[4160749568:4294967295] auto[1] 60 1 T80 2 T98 2 T52 4

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