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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4648 1 T1 6 T4 12 T14 8
auto[1] 1994 1 T3 2 T4 2 T12 2



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 224 1 T67 2 T274 2 T62 2
auto[134217728:268435455] 184 1 T4 2 T16 4 T55 2
auto[268435456:402653183] 196 1 T16 2 T151 2 T274 2
auto[402653184:536870911] 210 1 T14 2 T56 2 T53 2
auto[536870912:671088639] 236 1 T16 2 T48 2 T50 2
auto[671088640:805306367] 230 1 T3 2 T15 2 T91 2
auto[805306368:939524095] 226 1 T1 2 T4 2 T28 2
auto[939524096:1073741823] 186 1 T55 2 T60 2 T26 2
auto[1073741824:1207959551] 202 1 T12 2 T36 2 T25 2
auto[1207959552:1342177279] 172 1 T67 2 T50 2 T62 2
auto[1342177280:1476395007] 198 1 T55 2 T50 2 T27 2
auto[1476395008:1610612735] 252 1 T14 2 T55 2 T53 2
auto[1610612736:1744830463] 184 1 T36 2 T50 2 T26 2
auto[1744830464:1879048191] 192 1 T28 2 T62 2 T27 4
auto[1879048192:2013265919] 208 1 T150 2 T274 2 T27 2
auto[2013265920:2147483647] 214 1 T4 2 T55 2 T40 2
auto[2147483648:2281701375] 198 1 T14 2 T36 2 T53 2
auto[2281701376:2415919103] 210 1 T15 2 T25 2 T60 4
auto[2415919104:2550136831] 190 1 T38 2 T28 2 T151 2
auto[2550136832:2684354559] 160 1 T215 2 T27 2 T74 2
auto[2684354560:2818572287] 212 1 T4 2 T133 2 T150 2
auto[2818572288:2952790015] 214 1 T4 2 T91 2 T274 2
auto[2952790016:3087007743] 200 1 T15 2 T151 2 T62 2
auto[3087007744:3221225471] 202 1 T1 2 T14 2 T61 2
auto[3221225472:3355443199] 204 1 T4 2 T15 4 T55 2
auto[3355443200:3489660927] 224 1 T67 2 T150 2 T62 2
auto[3489660928:3623878655] 222 1 T150 2 T151 2 T26 2
auto[3623878656:3758096383] 246 1 T15 2 T50 2 T274 2
auto[3758096384:3892314111] 204 1 T1 2 T16 2 T56 2
auto[3892314112:4026531839] 180 1 T4 2 T16 4 T91 2
auto[4026531840:4160749567] 228 1 T27 6 T110 2 T95 2
auto[4160749568:4294967295] 234 1 T48 2 T26 2 T40 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 154 1 T67 2 T274 2 T27 6
auto[0:134217727] auto[1] 70 1 T62 2 T27 4 T6 2
auto[134217728:268435455] auto[0] 140 1 T4 2 T16 4 T55 2
auto[134217728:268435455] auto[1] 44 1 T60 2 T68 2 T6 2
auto[268435456:402653183] auto[0] 144 1 T16 2 T274 2 T62 2
auto[268435456:402653183] auto[1] 52 1 T151 2 T6 2 T290 2
auto[402653184:536870911] auto[0] 154 1 T14 2 T53 2 T48 2
auto[402653184:536870911] auto[1] 56 1 T56 2 T49 2 T75 2
auto[536870912:671088639] auto[0] 156 1 T16 2 T50 2 T27 2
auto[536870912:671088639] auto[1] 80 1 T48 2 T274 2 T54 2
auto[671088640:805306367] auto[0] 164 1 T15 2 T55 2 T53 2
auto[671088640:805306367] auto[1] 66 1 T3 2 T91 2 T60 2
auto[805306368:939524095] auto[0] 146 1 T1 2 T28 2 T48 2
auto[805306368:939524095] auto[1] 80 1 T4 2 T62 2 T68 4
auto[939524096:1073741823] auto[0] 120 1 T55 2 T26 2 T27 2
auto[939524096:1073741823] auto[1] 66 1 T60 2 T6 2 T290 2
auto[1073741824:1207959551] auto[0] 158 1 T36 2 T25 2 T61 2
auto[1073741824:1207959551] auto[1] 44 1 T12 2 T68 2 T310 2
auto[1207959552:1342177279] auto[0] 124 1 T67 2 T50 2 T62 2
auto[1207959552:1342177279] auto[1] 48 1 T281 2 T380 2 T436 2
auto[1342177280:1476395007] auto[0] 130 1 T55 2 T68 8 T138 2
auto[1342177280:1476395007] auto[1] 68 1 T50 2 T27 2 T109 2
auto[1476395008:1610612735] auto[0] 182 1 T14 2 T55 2 T53 2
auto[1476395008:1610612735] auto[1] 70 1 T27 2 T22 2 T6 2
auto[1610612736:1744830463] auto[0] 130 1 T36 2 T50 2 T26 2
auto[1610612736:1744830463] auto[1] 54 1 T27 2 T59 2 T272 2
auto[1744830464:1879048191] auto[0] 130 1 T28 2 T27 4 T223 2
auto[1744830464:1879048191] auto[1] 62 1 T62 2 T109 2 T68 2
auto[1879048192:2013265919] auto[0] 122 1 T274 2 T27 2 T49 2
auto[1879048192:2013265919] auto[1] 86 1 T150 2 T68 2 T413 2
auto[2013265920:2147483647] auto[0] 156 1 T4 2 T55 2 T27 4
auto[2013265920:2147483647] auto[1] 58 1 T40 2 T74 2 T220 2
auto[2147483648:2281701375] auto[0] 142 1 T14 2 T36 2 T53 2
auto[2147483648:2281701375] auto[1] 56 1 T27 2 T265 2 T213 2
auto[2281701376:2415919103] auto[0] 146 1 T15 2 T25 2 T60 2
auto[2281701376:2415919103] auto[1] 64 1 T60 2 T150 2 T49 2
auto[2415919104:2550136831] auto[0] 142 1 T28 2 T151 2 T27 2
auto[2415919104:2550136831] auto[1] 48 1 T38 2 T215 4 T222 2
auto[2550136832:2684354559] auto[0] 122 1 T215 2 T27 2 T49 4
auto[2550136832:2684354559] auto[1] 38 1 T74 2 T49 2 T110 2
auto[2684354560:2818572287] auto[0] 152 1 T4 2 T40 2 T62 2
auto[2684354560:2818572287] auto[1] 60 1 T133 2 T150 2 T151 2
auto[2818572288:2952790015] auto[0] 156 1 T4 2 T91 2 T274 2
auto[2818572288:2952790015] auto[1] 58 1 T62 2 T216 2 T270 2
auto[2952790016:3087007743] auto[0] 134 1 T15 2 T151 2 T49 2
auto[2952790016:3087007743] auto[1] 66 1 T62 2 T6 2 T18 2
auto[3087007744:3221225471] auto[0] 138 1 T1 2 T14 2 T61 2
auto[3087007744:3221225471] auto[1] 64 1 T27 2 T49 2 T220 2
auto[3221225472:3355443199] auto[0] 138 1 T4 2 T15 4 T55 2
auto[3221225472:3355443199] auto[1] 66 1 T118 2 T68 2 T139 2
auto[3355443200:3489660927] auto[0] 156 1 T67 2 T27 2 T118 2
auto[3355443200:3489660927] auto[1] 68 1 T150 2 T62 2 T27 4
auto[3489660928:3623878655] auto[0] 140 1 T26 2 T49 2 T68 6
auto[3489660928:3623878655] auto[1] 82 1 T150 2 T151 2 T27 4
auto[3623878656:3758096383] auto[0] 174 1 T15 2 T50 2 T274 2
auto[3623878656:3758096383] auto[1] 72 1 T62 2 T49 2 T152 2
auto[3758096384:3892314111] auto[0] 148 1 T1 2 T16 2 T27 4
auto[3758096384:3892314111] auto[1] 56 1 T56 2 T60 2 T49 2
auto[3892314112:4026531839] auto[0] 120 1 T4 2 T16 4 T91 2
auto[3892314112:4026531839] auto[1] 60 1 T27 2 T118 2 T6 2
auto[4026531840:4160749567] auto[0] 166 1 T27 4 T110 2 T95 2
auto[4026531840:4160749567] auto[1] 62 1 T27 2 T77 2 T224 4
auto[4160749568:4294967295] auto[0] 164 1 T48 2 T40 2 T27 2
auto[4160749568:4294967295] auto[1] 70 1 T26 2 T62 2 T27 2

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