Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4252

1

T1

4

T4

10

T14

6

auto[1]

2390

1

T1

2

T3

2

T4

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	174	1			T14	2		T15	2		T27	4
auto[134217728:268435455]	216	1			T4	2		T15	2		T16	2
auto[268435456:402653183]	204	1			T4	4		T274	2		T26	4
auto[402653184:536870911]	238	1			T15	2		T151	2		T27	4
auto[536870912:671088639]	216	1			T215	4		T62	4		T27	2
auto[671088640:805306367]	224	1			T1	2		T14	4		T53	2
auto[805306368:939524095]	212	1			T25	2		T133	2		T55	2
auto[939524096:1073741823]	202	1			T4	2		T16	2		T53	2
auto[1073741824:1207959551]	212	1			T55	4		T61	2		T274	2
auto[1207959552:1342177279]	172	1			T60	2		T62	2		T27	2
auto[1342177280:1476395007]	214	1			T55	2		T150	2		T26	2
auto[1476395008:1610612735]	186	1			T12	2		T27	2		T49	2
auto[1610612736:1744830463]	218	1			T55	2		T150	2		T274	2
auto[1744830464:1879048191]	180	1			T274	2		T27	4		T95	2
auto[1879048192:2013265919]	236	1			T57	2		T27	8		T49	2
auto[2013265920:2147483647]	204	1			T16	4		T36	2		T53	2
auto[2147483648:2281701375]	206	1			T16	2		T67	2		T274	2
auto[2281701376:2415919103]	196	1			T55	2		T60	2		T48	2
auto[2415919104:2550136831]	228	1			T1	2		T50	2		T26	2
auto[2550136832:2684354559]	230	1			T3	2		T91	2		T150	2
auto[2684354560:2818572287]	184	1			T1	2		T15	2		T25	2
auto[2818572288:2952790015]	236	1			T16	2		T28	4		T215	2
auto[2952790016:3087007743]	218	1			T15	2		T16	2		T48	6
auto[3087007744:3221225471]	236	1			T56	2		T28	2		T151	2
auto[3221225472:3355443199]	198	1			T56	2		T53	2		T27	4
auto[3355443200:3489660927]	198	1			T14	2		T60	2		T61	2
auto[3489660928:3623878655]	198	1			T4	2		T15	2		T61	2
auto[3623878656:3758096383]	210	1			T36	2		T150	2		T40	2
auto[3758096384:3892314111]	180	1			T4	2		T36	2		T91	2
auto[3892314112:4026531839]	198	1			T38	2		T27	4		T118	2
auto[4026531840:4160749567]	208	1			T91	2		T53	2		T60	2
auto[4160749568:4294967295]	210	1			T4	2		T55	2		T60	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	96	1			T14	2		T27	4		T74	2
auto[0:134217727]	auto[1]	78	1			T15	2		T49	4		T96	2
auto[134217728:268435455]	auto[0]	142	1			T4	2		T15	2		T16	2
auto[134217728:268435455]	auto[1]	74	1			T68	2		T71	2		T292	2
auto[268435456:402653183]	auto[0]	128	1			T4	2		T274	2		T26	4
auto[268435456:402653183]	auto[1]	76	1			T4	2		T118	2		T77	2
auto[402653184:536870911]	auto[0]	138	1			T15	2		T151	2		T27	4
auto[402653184:536870911]	auto[1]	100	1			T110	2		T6	6		T24	2
auto[536870912:671088639]	auto[0]	146	1			T215	4		T72	2		T365	2
auto[536870912:671088639]	auto[1]	70	1			T62	4		T27	2		T49	2
auto[671088640:805306367]	auto[0]	142	1			T1	2		T14	4		T53	2
auto[671088640:805306367]	auto[1]	82	1			T67	2		T27	4		T68	2
auto[805306368:939524095]	auto[0]	134	1			T50	2		T49	2		T139	2
auto[805306368:939524095]	auto[1]	78	1			T25	2		T133	2		T55	2
auto[939524096:1073741823]	auto[0]	140	1			T4	2		T53	2		T50	2
auto[939524096:1073741823]	auto[1]	62	1			T16	2		T23	2		T68	2
auto[1073741824:1207959551]	auto[0]	130	1			T61	2		T274	2		T215	2
auto[1073741824:1207959551]	auto[1]	82	1			T55	4		T27	2		T109	2
auto[1207959552:1342177279]	auto[0]	124	1			T60	2		T62	2		T27	2
auto[1207959552:1342177279]	auto[1]	48	1			T216	2		T432	2		T310	2
auto[1342177280:1476395007]	auto[0]	138	1			T150	2		T26	2		T27	2
auto[1342177280:1476395007]	auto[1]	76	1			T55	2		T49	2		T68	2
auto[1476395008:1610612735]	auto[0]	110	1			T152	2		T280	2		T6	2
auto[1476395008:1610612735]	auto[1]	76	1			T12	2		T27	2		T49	2
auto[1610612736:1744830463]	auto[0]	150	1			T150	2		T274	2		T260	2
auto[1610612736:1744830463]	auto[1]	68	1			T55	2		T26	2		T62	2
auto[1744830464:1879048191]	auto[0]	124	1			T274	2		T27	4		T68	4
auto[1744830464:1879048191]	auto[1]	56	1			T95	2		T6	2		T414	2
auto[1879048192:2013265919]	auto[0]	150	1			T27	8		T49	2		T118	2
auto[1879048192:2013265919]	auto[1]	86	1			T57	2		T220	2		T75	2
auto[2013265920:2147483647]	auto[0]	138	1			T16	4		T36	2		T53	2
auto[2013265920:2147483647]	auto[1]	66	1			T49	2		T219	2		T17	2
auto[2147483648:2281701375]	auto[0]	116	1			T67	2		T27	2		T152	2
auto[2147483648:2281701375]	auto[1]	90	1			T16	2		T274	2		T62	2
auto[2281701376:2415919103]	auto[0]	122	1			T60	2		T48	2		T50	2
auto[2281701376:2415919103]	auto[1]	74	1			T55	2		T17	2		T63	2
auto[2415919104:2550136831]	auto[0]	150	1			T1	2		T50	2		T26	2
auto[2415919104:2550136831]	auto[1]	78	1			T27	2		T222	2		T415	2
auto[2550136832:2684354559]	auto[0]	142	1			T62	2		T27	6		T68	4
auto[2550136832:2684354559]	auto[1]	88	1			T3	2		T91	2		T150	2
auto[2684354560:2818572287]	auto[0]	116	1			T15	2		T68	2		T77	2
auto[2684354560:2818572287]	auto[1]	68	1			T1	2		T25	2		T151	2
auto[2818572288:2952790015]	auto[0]	152	1			T16	2		T28	4		T215	2
auto[2818572288:2952790015]	auto[1]	84	1			T27	6		T110	2		T6	2
auto[2952790016:3087007743]	auto[0]	126	1			T15	2		T16	2		T48	6
auto[2952790016:3087007743]	auto[1]	92	1			T260	2		T6	2		T106	2
auto[3087007744:3221225471]	auto[0]	154	1			T56	2		T28	2		T151	2
auto[3087007744:3221225471]	auto[1]	82	1			T49	2		T6	2		T18	2
auto[3221225472:3355443199]	auto[0]	120	1			T27	4		T49	4		T110	2
auto[3221225472:3355443199]	auto[1]	78	1			T56	2		T53	2		T68	6
auto[3355443200:3489660927]	auto[0]	130	1			T60	2		T61	2		T40	2
auto[3355443200:3489660927]	auto[1]	68	1			T14	2		T27	2		T68	2
auto[3489660928:3623878655]	auto[0]	114	1			T4	2		T15	2		T61	2
auto[3489660928:3623878655]	auto[1]	84	1			T50	2		T68	2		T76	2
auto[3623878656:3758096383]	auto[0]	144	1			T150	2		T40	2		T62	2
auto[3623878656:3758096383]	auto[1]	66	1			T36	2		T27	2		T109	2
auto[3758096384:3892314111]	auto[0]	118	1			T4	2		T36	2		T151	2
auto[3758096384:3892314111]	auto[1]	62	1			T91	2		T27	2		T256	2
auto[3892314112:4026531839]	auto[0]	120	1			T27	2		T152	2		T72	2
auto[3892314112:4026531839]	auto[1]	78	1			T38	2		T27	2		T118	2
auto[4026531840:4160749567]	auto[0]	146	1			T53	2		T67	2		T215	2
auto[4026531840:4160749567]	auto[1]	62	1			T91	2		T60	2		T50	2
auto[4160749568:4294967295]	auto[0]	152	1			T49	2		T23	2		T68	2
auto[4160749568:4294967295]	auto[1]	58	1			T4	2		T55	2		T60	2