Unified Coverage Report :: Group Instance : salt_2

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

3058

1

T2

5

T3

5

T5

5

auto[1]

322

1

T36

2

T109

6

T140

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	104	1			T3	1		T109	1		T26	1
auto[134217728:268435455]	105	1			T50	1		T26	2		T56	2
auto[268435456:402653183]	104	1			T16	1		T37	1		T26	1
auto[402653184:536870911]	125	1			T50	2		T37	1		T26	1
auto[536870912:671088639]	101	1			T5	1		T37	1		T39	1
auto[671088640:805306367]	121	1			T5	1		T16	1		T50	1
auto[805306368:939524095]	97	1			T2	1		T16	1		T36	1
auto[939524096:1073741823]	107	1			T49	1		T26	1		T124	1
auto[1073741824:1207959551]	103	1			T26	2		T124	1		T227	1
auto[1207959552:1342177279]	90	1			T15	1		T109	1		T26	2
auto[1342177280:1476395007]	98	1			T2	1		T109	1		T83	1
auto[1476395008:1610612735]	109	1			T34	1		T50	1		T26	1
auto[1610612736:1744830463]	103	1			T5	1		T36	1		T124	1
auto[1744830464:1879048191]	116	1			T5	1		T17	1		T37	1
auto[1879048192:2013265919]	108	1			T5	1		T39	1		T22	1
auto[2013265920:2147483647]	118	1			T30	1		T37	1		T123	1
auto[2147483648:2281701375]	82	1			T109	1		T123	1		T22	1
auto[2281701376:2415919103]	106	1			T50	1		T109	1		T80	1
auto[2415919104:2550136831]	112	1			T16	1		T17	1		T37	1
auto[2550136832:2684354559]	115	1			T3	1		T34	1		T109	1
auto[2684354560:2818572287]	91	1			T3	1		T16	1		T36	1
auto[2818572288:2952790015]	94	1			T15	1		T36	1		T50	2
auto[2952790016:3087007743]	117	1			T50	1		T26	2		T22	1
auto[3087007744:3221225471]	99	1			T56	1		T57	1		T189	1
auto[3221225472:3355443199]	122	1			T26	3		T56	2		T23	1
auto[3355443200:3489660927]	104	1			T15	1		T26	1		T82	1
auto[3489660928:3623878655]	105	1			T2	1		T3	1		T17	1
auto[3623878656:3758096383]	114	1			T2	1		T37	1		T56	1
auto[3758096384:3892314111]	100	1			T2	1		T39	1		T80	1
auto[3892314112:4026531839]	110	1			T123	1		T52	1		T56	3
auto[4026531840:4160749567]	102	1			T3	1		T50	1		T100	1
auto[4160749568:4294967295]	98	1			T15	1		T50	1		T109	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	92	1			T3	1		T26	1		T123	1
auto[0:134217727]	auto[1]	12	1			T109	1		T359	1		T335	1
auto[134217728:268435455]	auto[0]	101	1			T50	1		T26	2		T56	2
auto[134217728:268435455]	auto[1]	4	1			T330	1		T314	1		T245	1
auto[268435456:402653183]	auto[0]	94	1			T16	1		T37	1		T26	1
auto[268435456:402653183]	auto[1]	10	1			T131	1		T228	1		T274	1
auto[402653184:536870911]	auto[0]	112	1			T50	2		T37	1		T26	1
auto[402653184:536870911]	auto[1]	13	1			T140	1		T314	2		T373	1
auto[536870912:671088639]	auto[0]	91	1			T5	1		T37	1		T39	1
auto[536870912:671088639]	auto[1]	10	1			T314	1		T274	2		T389	1
auto[671088640:805306367]	auto[0]	113	1			T5	1		T16	1		T50	1
auto[671088640:805306367]	auto[1]	8	1			T240	1		T332	1		T329	1
auto[805306368:939524095]	auto[0]	80	1			T2	1		T16	1		T30	1
auto[805306368:939524095]	auto[1]	17	1			T36	1		T130	1		T281	1
auto[939524096:1073741823]	auto[0]	96	1			T49	1		T26	1		T124	1
auto[939524096:1073741823]	auto[1]	11	1			T274	3		T389	1		T245	1
auto[1073741824:1207959551]	auto[0]	87	1			T26	2		T124	1		T227	1
auto[1073741824:1207959551]	auto[1]	16	1			T359	1		T281	3		T337	1
auto[1207959552:1342177279]	auto[0]	76	1			T15	1		T26	2		T80	1
auto[1207959552:1342177279]	auto[1]	14	1			T109	1		T359	2		T314	1
auto[1342177280:1476395007]	auto[0]	88	1			T2	1		T83	1		T56	1
auto[1342177280:1476395007]	auto[1]	10	1			T109	1		T314	1		T371	1
auto[1476395008:1610612735]	auto[0]	97	1			T34	1		T50	1		T26	1
auto[1476395008:1610612735]	auto[1]	12	1			T140	1		T130	1		T240	1
auto[1610612736:1744830463]	auto[0]	94	1			T5	1		T124	1		T100	2
auto[1610612736:1744830463]	auto[1]	9	1			T36	1		T335	1		T314	1
auto[1744830464:1879048191]	auto[0]	106	1			T5	1		T17	1		T37	1
auto[1744830464:1879048191]	auto[1]	10	1			T388	1		T240	1		T354	1
auto[1879048192:2013265919]	auto[0]	98	1			T5	1		T39	1		T22	1
auto[1879048192:2013265919]	auto[1]	10	1			T140	1		T314	1		T240	1
auto[2013265920:2147483647]	auto[0]	111	1			T30	1		T37	1		T123	1
auto[2013265920:2147483647]	auto[1]	7	1			T140	1		T359	1		T274	1
auto[2147483648:2281701375]	auto[0]	75	1			T109	1		T123	1		T22	1
auto[2147483648:2281701375]	auto[1]	7	1			T240	1		T373	1		T337	1
auto[2281701376:2415919103]	auto[0]	95	1			T50	1		T109	1		T80	1
auto[2281701376:2415919103]	auto[1]	11	1			T314	1		T240	1		T329	1
auto[2415919104:2550136831]	auto[0]	106	1			T16	1		T17	1		T37	1
auto[2415919104:2550136831]	auto[1]	6	1			T359	1		T335	1		T332	1
auto[2550136832:2684354559]	auto[0]	104	1			T3	1		T34	1		T26	1
auto[2550136832:2684354559]	auto[1]	11	1			T109	1		T129	1		T131	1
auto[2684354560:2818572287]	auto[0]	80	1			T3	1		T16	1		T36	1
auto[2684354560:2818572287]	auto[1]	11	1			T109	1		T129	1		T359	1
auto[2818572288:2952790015]	auto[0]	89	1			T15	1		T36	1		T50	2
auto[2818572288:2952790015]	auto[1]	5	1			T330	1		T274	1		T238	1
auto[2952790016:3087007743]	auto[0]	107	1			T50	1		T26	2		T22	1
auto[2952790016:3087007743]	auto[1]	10	1			T140	1		T240	1		T371	1
auto[3087007744:3221225471]	auto[0]	92	1			T56	1		T57	1		T189	1
auto[3087007744:3221225471]	auto[1]	7	1			T388	1		T281	1		T330	1
auto[3221225472:3355443199]	auto[0]	107	1			T26	3		T56	2		T23	1
auto[3221225472:3355443199]	auto[1]	15	1			T130	1		T228	1		T314	1
auto[3355443200:3489660927]	auto[0]	97	1			T15	1		T26	1		T82	1
auto[3355443200:3489660927]	auto[1]	7	1			T332	1		T373	1		T279	1
auto[3489660928:3623878655]	auto[0]	96	1			T2	1		T3	1		T17	1
auto[3489660928:3623878655]	auto[1]	9	1			T332	1		T279	1		T245	1
auto[3623878656:3758096383]	auto[0]	102	1			T2	1		T37	1		T56	1
auto[3623878656:3758096383]	auto[1]	12	1			T354	1		T260	1		T373	1
auto[3758096384:3892314111]	auto[0]	86	1			T2	1		T39	1		T80	1
auto[3758096384:3892314111]	auto[1]	14	1			T335	1		T281	2		T314	1
auto[3892314112:4026531839]	auto[0]	101	1			T123	1		T52	1		T56	3
auto[3892314112:4026531839]	auto[1]	9	1			T354	1		T372	1		T390	1
auto[4026531840:4160749567]	auto[0]	95	1			T3	1		T50	1		T100	1
auto[4026531840:4160749567]	auto[1]	7	1			T240	1		T332	1		T395	1
auto[4160749568:4294967295]	auto[0]	90	1			T15	1		T50	1		T100	1
auto[4160749568:4294967295]	auto[1]	8	1			T109	1		T140	1		T131	1