Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4452

1

T1

4

T11

8

T13

6

auto[1]

2262

1

T1

4

T13

6

T15

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	222	1			T16	2		T51	2		T47	2
auto[134217728:268435455]	194	1			T1	2		T11	2		T196	2
auto[268435456:402653183]	218	1			T13	2		T16	2		T242	2
auto[402653184:536870911]	158	1			T196	2		T44	2		T150	2
auto[536870912:671088639]	214	1			T26	2		T36	2		T103	2
auto[671088640:805306367]	208	1			T26	2		T51	2		T123	2
auto[805306368:939524095]	196	1			T23	2		T51	2		T95	2
auto[939524096:1073741823]	226	1			T11	2		T17	2		T51	2
auto[1073741824:1207959551]	226	1			T1	2		T15	2		T196	2
auto[1207959552:1342177279]	168	1			T51	2		T44	2		T50	2
auto[1342177280:1476395007]	232	1			T36	4		T47	2		T45	2
auto[1476395008:1610612735]	240	1			T36	2		T197	2		T123	2
auto[1610612736:1744830463]	218	1			T44	2		T150	2		T55	4
auto[1744830464:1879048191]	240	1			T17	2		T36	2		T48	2
auto[1879048192:2013265919]	162	1			T55	2		T24	2		T73	2
auto[2013265920:2147483647]	220	1			T26	2		T36	2		T23	4
auto[2147483648:2281701375]	182	1			T196	2		T197	2		T44	4
auto[2281701376:2415919103]	212	1			T14	2		T36	2		T4	2
auto[2415919104:2550136831]	222	1			T11	2		T26	2		T23	2
auto[2550136832:2684354559]	256	1			T11	2		T13	4		T16	2
auto[2684354560:2818572287]	234	1			T1	2		T44	2		T150	2
auto[2818572288:2952790015]	184	1			T196	2		T36	2		T23	2
auto[2952790016:3087007743]	206	1			T13	2		T15	2		T16	4
auto[3087007744:3221225471]	222	1			T13	2		T17	2		T44	4
auto[3221225472:3355443199]	190	1			T44	2		T103	2		T204	2
auto[3355443200:3489660927]	170	1			T44	2		T47	2		T4	2
auto[3489660928:3623878655]	246	1			T16	2		T51	2		T44	2
auto[3623878656:3758096383]	212	1			T16	2		T17	2		T197	2
auto[3758096384:3892314111]	178	1			T23	2		T44	2		T55	2
auto[3892314112:4026531839]	196	1			T1	2		T48	2		T44	4
auto[4026531840:4160749567]	258	1			T13	2		T14	2		T44	2
auto[4160749568:4294967295]	204	1			T14	2		T16	2		T17	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	156	1			T19	2		T46	2		T104	2
auto[0:134217727]	auto[1]	66	1			T16	2		T51	2		T47	2
auto[134217728:268435455]	auto[0]	130	1			T1	2		T11	2		T123	2
auto[134217728:268435455]	auto[1]	64	1			T196	2		T49	2		T204	2
auto[268435456:402653183]	auto[0]	138	1			T242	2		T57	4		T84	2
auto[268435456:402653183]	auto[1]	80	1			T13	2		T16	2		T248	2
auto[402653184:536870911]	auto[0]	106	1			T196	2		T44	2		T150	2
auto[402653184:536870911]	auto[1]	52	1			T98	2		T57	2		T38	2
auto[536870912:671088639]	auto[0]	128	1			T26	2		T36	2		T153	2
auto[536870912:671088639]	auto[1]	86	1			T103	2		T141	2		T115	2
auto[671088640:805306367]	auto[0]	124	1			T51	2		T57	2		T155	2
auto[671088640:805306367]	auto[1]	84	1			T26	2		T123	2		T45	2
auto[805306368:939524095]	auto[0]	146	1			T51	2		T95	2		T242	2
auto[805306368:939524095]	auto[1]	50	1			T23	2		T72	2		T74	4
auto[939524096:1073741823]	auto[0]	128	1			T11	2		T17	2		T44	4
auto[939524096:1073741823]	auto[1]	98	1			T51	2		T44	2		T242	2
auto[1073741824:1207959551]	auto[0]	150	1			T196	2		T123	2		T199	4
auto[1073741824:1207959551]	auto[1]	76	1			T1	2		T15	2		T44	4
auto[1207959552:1342177279]	auto[0]	108	1			T50	2		T233	2		T57	2
auto[1207959552:1342177279]	auto[1]	60	1			T51	2		T44	2		T134	4
auto[1342177280:1476395007]	auto[0]	148	1			T36	4		T45	2		T57	2
auto[1342177280:1476395007]	auto[1]	84	1			T47	2		T28	2		T50	2
auto[1476395008:1610612735]	auto[0]	156	1			T36	2		T197	2		T123	2
auto[1476395008:1610612735]	auto[1]	84	1			T135	2		T98	2		T59	2
auto[1610612736:1744830463]	auto[0]	128	1			T44	2		T150	2		T199	2
auto[1610612736:1744830463]	auto[1]	90	1			T55	4		T57	2		T59	2
auto[1744830464:1879048191]	auto[0]	180	1			T17	2		T36	2		T48	2
auto[1744830464:1879048191]	auto[1]	60	1			T55	2		T90	2		T201	2
auto[1879048192:2013265919]	auto[0]	110	1			T24	2		T20	2		T57	2
auto[1879048192:2013265919]	auto[1]	52	1			T55	2		T73	2		T57	4
auto[2013265920:2147483647]	auto[0]	146	1			T23	4		T44	2		T205	2
auto[2013265920:2147483647]	auto[1]	74	1			T26	2		T36	2		T118	2
auto[2147483648:2281701375]	auto[0]	128	1			T196	2		T197	2		T44	2
auto[2147483648:2281701375]	auto[1]	54	1			T44	2		T357	2		T69	2
auto[2281701376:2415919103]	auto[0]	156	1			T14	2		T36	2		T4	2
auto[2281701376:2415919103]	auto[1]	56	1			T152	2		T57	2		T228	2
auto[2415919104:2550136831]	auto[0]	156	1			T11	2		T26	2		T44	2
auto[2415919104:2550136831]	auto[1]	66	1			T23	2		T57	2		T37	2
auto[2550136832:2684354559]	auto[0]	196	1			T11	2		T13	4		T16	2
auto[2550136832:2684354559]	auto[1]	60	1			T24	2		T202	2		T234	2
auto[2684354560:2818572287]	auto[0]	172	1			T1	2		T44	2		T150	2
auto[2684354560:2818572287]	auto[1]	62	1			T103	2		T28	2		T201	2
auto[2818572288:2952790015]	auto[0]	122	1			T196	2		T36	2		T22	2
auto[2818572288:2952790015]	auto[1]	62	1			T23	2		T44	2		T98	2
auto[2952790016:3087007743]	auto[0]	122	1			T13	2		T16	2		T44	2
auto[2952790016:3087007743]	auto[1]	84	1			T15	2		T16	2		T44	2
auto[3087007744:3221225471]	auto[0]	140	1			T17	2		T44	2		T150	2
auto[3087007744:3221225471]	auto[1]	82	1			T13	2		T44	2		T137	2
auto[3221225472:3355443199]	auto[0]	120	1			T44	2		T204	2		T90	2
auto[3221225472:3355443199]	auto[1]	70	1			T103	2		T152	2		T73	2
auto[3355443200:3489660927]	auto[0]	106	1			T44	2		T47	2		T88	2
auto[3355443200:3489660927]	auto[1]	64	1			T4	2		T103	2		T73	2
auto[3489660928:3623878655]	auto[0]	148	1			T44	2		T95	2		T201	2
auto[3489660928:3623878655]	auto[1]	98	1			T16	2		T51	2		T84	2
auto[3623878656:3758096383]	auto[0]	128	1			T16	2		T19	2		T202	2
auto[3623878656:3758096383]	auto[1]	84	1			T17	2		T197	2		T135	2
auto[3758096384:3892314111]	auto[0]	120	1			T23	2		T44	2		T24	4
auto[3758096384:3892314111]	auto[1]	58	1			T55	2		T22	2		T72	2
auto[3892314112:4026531839]	auto[0]	130	1			T44	2		T199	4		T91	2
auto[3892314112:4026531839]	auto[1]	66	1			T1	2		T48	2		T44	2
auto[4026531840:4160749567]	auto[0]	174	1			T14	2		T44	2		T45	2
auto[4026531840:4160749567]	auto[1]	84	1			T13	2		T55	2		T234	2
auto[4160749568:4294967295]	auto[0]	152	1			T14	2		T16	2		T17	2
auto[4160749568:4294967295]	auto[1]	52	1			T44	2		T47	2		T57	2