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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4666 1 T1 6 T3 6 T4 36
auto[1] 2222 1 T1 2 T2 2 T3 2


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 240 1 T16 2 T43 2 T47 4
auto[134217728:268435455] 194 1 T1 2 T2 2 T16 2
auto[268435456:402653183] 266 1 T4 2 T16 2 T32 2
auto[402653184:536870911] 262 1 T39 2 T101 2 T42 2
auto[536870912:671088639] 240 1 T16 6 T41 2 T48 2
auto[671088640:805306367] 224 1 T4 2 T47 2 T6 2
auto[805306368:939524095] 228 1 T4 4 T32 2 T100 2
auto[939524096:1073741823] 194 1 T16 4 T8 2 T101 2
auto[1073741824:1207959551] 212 1 T16 4 T39 2 T8 2
auto[1207959552:1342177279] 202 1 T3 2 T4 4 T228 2
auto[1342177280:1476395007] 194 1 T1 2 T4 4 T16 2
auto[1476395008:1610612735] 178 1 T41 2 T52 2 T34 2
auto[1610612736:1744830463] 240 1 T4 2 T16 2 T41 2
auto[1744830464:1879048191] 192 1 T4 2 T16 8 T26 2
auto[1879048192:2013265919] 208 1 T3 2 T4 6 T16 4
auto[2013265920:2147483647] 182 1 T4 2 T18 2 T228 2
auto[2147483648:2281701375] 232 1 T1 2 T4 2 T16 6
auto[2281701376:2415919103] 236 1 T4 2 T16 2 T40 2
auto[2415919104:2550136831] 228 1 T4 4 T16 4 T24 2
auto[2550136832:2684354559] 222 1 T4 2 T231 2 T27 2
auto[2684354560:2818572287] 230 1 T3 2 T16 4 T8 2
auto[2818572288:2952790015] 218 1 T4 2 T18 2 T32 4
auto[2952790016:3087007743] 204 1 T3 2 T4 4 T39 2
auto[3087007744:3221225471] 212 1 T16 4 T32 2 T6 2
auto[3221225472:3355443199] 214 1 T16 2 T40 2 T24 4
auto[3355443200:3489660927] 214 1 T16 2 T18 4 T100 2
auto[3489660928:3623878655] 214 1 T1 2 T47 2 T216 2
auto[3623878656:3758096383] 194 1 T16 4 T24 2 T48 2
auto[3758096384:3892314111] 192 1 T4 2 T16 2 T26 2
auto[3892314112:4026531839] 236 1 T4 2 T16 4 T142 2
auto[4026531840:4160749567] 196 1 T16 2 T6 6 T49 4
auto[4160749568:4294967295] 190 1 T16 2 T18 2 T228 2


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 150 1 T43 2 T47 4 T48 2
auto[0:134217727] auto[1] 90 1 T16 2 T48 4 T63 2
auto[134217728:268435455] auto[0] 130 1 T1 2 T8 2 T228 2
auto[134217728:268435455] auto[1] 64 1 T2 2 T16 2 T26 2
auto[268435456:402653183] auto[0] 158 1 T16 2 T32 2 T19 2
auto[268435456:402653183] auto[1] 108 1 T4 2 T40 2 T136 2
auto[402653184:536870911] auto[0] 186 1 T39 2 T42 2 T48 4
auto[402653184:536870911] auto[1] 76 1 T101 2 T47 2 T6 4
auto[536870912:671088639] auto[0] 168 1 T16 6 T41 2 T48 2
auto[536870912:671088639] auto[1] 72 1 T61 2 T84 2 T76 2
auto[671088640:805306367] auto[0] 166 1 T4 2 T6 2 T229 2
auto[671088640:805306367] auto[1] 58 1 T47 2 T7 4 T234 2
auto[805306368:939524095] auto[0] 152 1 T4 4 T100 2 T42 2
auto[805306368:939524095] auto[1] 76 1 T32 2 T24 2 T48 2
auto[939524096:1073741823] auto[0] 134 1 T16 4 T8 2 T101 2
auto[939524096:1073741823] auto[1] 60 1 T136 2 T55 2 T6 2
auto[1073741824:1207959551] auto[0] 144 1 T16 4 T39 2 T216 2
auto[1073741824:1207959551] auto[1] 68 1 T8 2 T101 2 T6 2
auto[1207959552:1342177279] auto[0] 126 1 T4 2 T228 2 T100 2
auto[1207959552:1342177279] auto[1] 76 1 T3 2 T4 2 T24 4
auto[1342177280:1476395007] auto[0] 138 1 T1 2 T4 2 T16 2
auto[1342177280:1476395007] auto[1] 56 1 T4 2 T100 4 T59 2
auto[1476395008:1610612735] auto[0] 116 1 T52 2 T6 2 T209 2
auto[1476395008:1610612735] auto[1] 62 1 T41 2 T34 2 T47 2
auto[1610612736:1744830463] auto[0] 154 1 T4 2 T47 2 T48 4
auto[1610612736:1744830463] auto[1] 86 1 T16 2 T41 2 T6 6
auto[1744830464:1879048191] auto[0] 136 1 T16 6 T19 2 T135 2
auto[1744830464:1879048191] auto[1] 56 1 T4 2 T16 2 T26 2
auto[1879048192:2013265919] auto[0] 134 1 T3 2 T4 6 T16 4
auto[1879048192:2013265919] auto[1] 74 1 T19 2 T27 2 T136 2
auto[2013265920:2147483647] auto[0] 128 1 T4 2 T228 2 T43 2
auto[2013265920:2147483647] auto[1] 54 1 T18 2 T101 4 T136 2
auto[2147483648:2281701375] auto[0] 148 1 T1 2 T16 4 T142 2
auto[2147483648:2281701375] auto[1] 84 1 T4 2 T16 2 T142 2
auto[2281701376:2415919103] auto[0] 182 1 T4 2 T16 2 T40 2
auto[2281701376:2415919103] auto[1] 54 1 T101 4 T24 2 T55 2
auto[2415919104:2550136831] auto[0] 170 1 T4 2 T16 4 T24 2
auto[2415919104:2550136831] auto[1] 58 1 T4 2 T198 2 T410 2
auto[2550136832:2684354559] auto[0] 132 1 T4 2 T231 2 T48 4
auto[2550136832:2684354559] auto[1] 90 1 T27 2 T101 2 T20 2
auto[2684354560:2818572287] auto[0] 180 1 T3 2 T16 4 T8 2
auto[2684354560:2818572287] auto[1] 50 1 T76 2 T127 2 T319 2
auto[2818572288:2952790015] auto[0] 138 1 T4 2 T18 2 T32 2
auto[2818572288:2952790015] auto[1] 80 1 T32 2 T26 2 T101 2
auto[2952790016:3087007743] auto[0] 154 1 T3 2 T4 4 T228 2
auto[2952790016:3087007743] auto[1] 50 1 T39 2 T43 2 T6 2
auto[3087007744:3221225471] auto[0] 146 1 T16 4 T6 2 T61 4
auto[3087007744:3221225471] auto[1] 66 1 T32 2 T209 2 T61 2
auto[3221225472:3355443199] auto[0] 150 1 T16 2 T24 4 T48 4
auto[3221225472:3355443199] auto[1] 64 1 T40 2 T48 6 T61 2
auto[3355443200:3489660927] auto[0] 138 1 T16 2 T18 2 T100 2
auto[3355443200:3489660927] auto[1] 76 1 T18 2 T216 2 T58 2
auto[3489660928:3623878655] auto[0] 152 1 T216 2 T6 4 T61 2
auto[3489660928:3623878655] auto[1] 62 1 T1 2 T47 2 T25 2
auto[3623878656:3758096383] auto[0] 118 1 T16 2 T24 2 T215 2
auto[3623878656:3758096383] auto[1] 76 1 T16 2 T48 2 T6 2
auto[3758096384:3892314111] auto[0] 120 1 T4 2 T55 2 T47 2
auto[3758096384:3892314111] auto[1] 72 1 T16 2 T26 2 T100 2
auto[3892314112:4026531839] auto[0] 160 1 T4 2 T16 2 T41 2
auto[3892314112:4026531839] auto[1] 76 1 T16 2 T142 2 T6 2
auto[4026531840:4160749567] auto[0] 138 1 T16 2 T6 4 T49 2
auto[4026531840:4160749567] auto[1] 58 1 T6 2 T49 2 T339 2
auto[4160749568:4294967295] auto[0] 120 1 T16 2 T18 2 T228 2
auto[4160749568:4294967295] auto[1] 70 1 T110 2 T300 2 T411 2

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