Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4470

1

T3

88

T4

46

T5

4

auto[1]

2046

1

T3

40

T4

14

T36

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	204	1			T3	2		T55	2		T208	2
auto[134217728:268435455]	192	1			T3	2		T4	4		T55	2
auto[268435456:402653183]	226	1			T3	4		T4	8		T127	2
auto[402653184:536870911]	196	1			T3	4		T4	2		T39	2
auto[536870912:671088639]	186	1			T3	2		T36	2		T55	6
auto[671088640:805306367]	186	1			T3	2		T16	2		T38	2
auto[805306368:939524095]	200	1			T4	4		T55	6		T56	2
auto[939524096:1073741823]	220	1			T3	6		T4	2		T55	4
auto[1073741824:1207959551]	220	1			T3	2		T25	2		T39	2
auto[1207959552:1342177279]	246	1			T3	8		T39	2		T44	2
auto[1342177280:1476395007]	218	1			T3	4		T4	2		T55	6
auto[1476395008:1610612735]	240	1			T16	2		T36	2		T25	2
auto[1610612736:1744830463]	178	1			T22	2		T44	2		T87	2
auto[1744830464:1879048191]	194	1			T3	2		T4	2		T44	4
auto[1879048192:2013265919]	198	1			T3	2		T4	6		T47	4
auto[2013265920:2147483647]	216	1			T3	2		T4	2		T47	6
auto[2147483648:2281701375]	212	1			T4	2		T55	4		T205	2
auto[2281701376:2415919103]	188	1			T3	4		T4	4		T36	2
auto[2415919104:2550136831]	198	1			T3	10		T38	2		T87	2
auto[2550136832:2684354559]	208	1			T3	10		T4	2		T16	2
auto[2684354560:2818572287]	206	1			T3	2		T16	2		T38	2
auto[2818572288:2952790015]	184	1			T3	4		T55	8		T50	2
auto[2952790016:3087007743]	218	1			T3	2		T4	2		T127	2
auto[3087007744:3221225471]	226	1			T3	4		T4	4		T5	2
auto[3221225472:3355443199]	188	1			T3	8		T55	4		T208	2
auto[3355443200:3489660927]	188	1			T3	4		T4	4		T36	2
auto[3489660928:3623878655]	194	1			T3	8		T54	2		T22	4
auto[3623878656:3758096383]	170	1			T3	6		T4	6		T87	2
auto[3758096384:3892314111]	212	1			T3	6		T4	2		T44	2
auto[3892314112:4026531839]	210	1			T3	4		T39	2		T55	2
auto[4026531840:4160749567]	172	1			T3	4		T39	2		T38	2
auto[4160749568:4294967295]	222	1			T3	10		T4	2		T5	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	134	1			T55	2		T208	2		T50	2
auto[0:134217727]	auto[1]	70	1			T3	2		T47	2		T48	2
auto[134217728:268435455]	auto[0]	138	1			T3	2		T4	4		T55	2
auto[134217728:268435455]	auto[1]	54	1			T47	2		T89	2		T240	2
auto[268435456:402653183]	auto[0]	158	1			T3	2		T4	6		T47	4
auto[268435456:402653183]	auto[1]	68	1			T3	2		T4	2		T127	2
auto[402653184:536870911]	auto[0]	120	1			T3	4		T4	2		T39	2
auto[402653184:536870911]	auto[1]	76	1			T38	2		T151	2		T300	2
auto[536870912:671088639]	auto[0]	136	1			T36	2		T55	4		T208	2
auto[536870912:671088639]	auto[1]	50	1			T3	2		T55	2		T47	4
auto[671088640:805306367]	auto[0]	140	1			T16	2		T55	2		T47	2
auto[671088640:805306367]	auto[1]	46	1			T3	2		T38	2		T47	2
auto[805306368:939524095]	auto[0]	138	1			T4	2		T55	6		T56	2
auto[805306368:939524095]	auto[1]	62	1			T4	2		T47	2		T27	2
auto[939524096:1073741823]	auto[0]	148	1			T3	6		T4	2		T55	2
auto[939524096:1073741823]	auto[1]	72	1			T55	2		T247	2		T121	2
auto[1073741824:1207959551]	auto[0]	162	1			T3	2		T39	2		T55	4
auto[1073741824:1207959551]	auto[1]	58	1			T25	2		T128	2		T64	2
auto[1207959552:1342177279]	auto[0]	174	1			T3	6		T39	2		T44	2
auto[1207959552:1342177279]	auto[1]	72	1			T3	2		T211	2		T47	2
auto[1342177280:1476395007]	auto[0]	146	1			T4	2		T55	4		T47	4
auto[1342177280:1476395007]	auto[1]	72	1			T3	4		T55	2		T47	6
auto[1476395008:1610612735]	auto[0]	160	1			T16	2		T25	2		T55	2
auto[1476395008:1610612735]	auto[1]	80	1			T36	2		T55	2		T50	2
auto[1610612736:1744830463]	auto[0]	126	1			T87	2		T208	2		T47	2
auto[1610612736:1744830463]	auto[1]	52	1			T22	2		T44	2		T205	2
auto[1744830464:1879048191]	auto[0]	144	1			T3	2		T4	2		T44	4
auto[1744830464:1879048191]	auto[1]	50	1			T55	2		T47	2		T133	2
auto[1879048192:2013265919]	auto[0]	138	1			T3	2		T4	4		T134	2
auto[1879048192:2013265919]	auto[1]	60	1			T4	2		T47	4		T131	2
auto[2013265920:2147483647]	auto[0]	158	1			T3	2		T47	4		T133	2
auto[2013265920:2147483647]	auto[1]	58	1			T4	2		T47	2		T89	4
auto[2147483648:2281701375]	auto[0]	132	1			T4	2		T55	4		T56	2
auto[2147483648:2281701375]	auto[1]	80	1			T205	2		T47	4		T336	2
auto[2281701376:2415919103]	auto[0]	132	1			T3	2		T4	4		T44	2
auto[2281701376:2415919103]	auto[1]	56	1			T3	2		T36	2		T87	2
auto[2415919104:2550136831]	auto[0]	130	1			T3	6		T87	2		T71	2
auto[2415919104:2550136831]	auto[1]	68	1			T3	4		T38	2		T131	2
auto[2550136832:2684354559]	auto[0]	146	1			T3	10		T4	2		T16	2
auto[2550136832:2684354559]	auto[1]	62	1			T47	2		T8	2		T308	2
auto[2684354560:2818572287]	auto[0]	150	1			T3	2		T16	2		T55	2
auto[2684354560:2818572287]	auto[1]	56	1			T38	2		T47	2		T120	2
auto[2818572288:2952790015]	auto[0]	120	1			T3	2		T55	8		T50	2
auto[2818572288:2952790015]	auto[1]	64	1			T3	2		T86	2		T63	4
auto[2952790016:3087007743]	auto[0]	152	1			T4	2		T208	2		T47	2
auto[2952790016:3087007743]	auto[1]	66	1			T3	2		T127	2		T47	2
auto[3087007744:3221225471]	auto[0]	158	1			T3	4		T4	4		T5	2
auto[3087007744:3221225471]	auto[1]	68	1			T36	2		T90	2		T27	2
auto[3221225472:3355443199]	auto[0]	120	1			T3	8		T55	4		T47	4
auto[3221225472:3355443199]	auto[1]	68	1			T208	2		T120	2		T149	2
auto[3355443200:3489660927]	auto[0]	122	1			T3	4		T36	2		T50	2
auto[3355443200:3489660927]	auto[1]	66	1			T4	4		T208	2		T47	2
auto[3489660928:3623878655]	auto[0]	138	1			T3	2		T22	4		T55	4
auto[3489660928:3623878655]	auto[1]	56	1			T3	6		T54	2		T127	2
auto[3623878656:3758096383]	auto[0]	122	1			T3	6		T4	4		T87	2
auto[3623878656:3758096383]	auto[1]	48	1			T4	2		T215	2		T298	2
auto[3758096384:3892314111]	auto[0]	124	1			T3	4		T4	2		T44	2
auto[3758096384:3892314111]	auto[1]	88	1			T3	2		T120	2		T195	2
auto[3892314112:4026531839]	auto[0]	150	1			T3	2		T55	2		T64	2
auto[3892314112:4026531839]	auto[1]	60	1			T3	2		T39	2		T269	2
auto[4026531840:4160749567]	auto[0]	106	1			T3	2		T39	2		T131	2
auto[4026531840:4160749567]	auto[1]	66	1			T3	2		T38	2		T55	2
auto[4160749568:4294967295]	auto[0]	148	1			T3	6		T4	2		T5	2
auto[4160749568:4294967295]	auto[1]	74	1			T3	4		T127	2		T269	2