Unified Coverage Report :: Group Instance : sealing_sw_binding_0

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1447

1

T1

1

T2

2

T14

4

auto[1]

1550

1

T1

3

T2

2

T13

3

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	95	1			T80	1		T47	1		T79	1
auto[134217728:268435455]	114	1			T14	1		T25	1		T49	3
auto[268435456:402653183]	103	1			T14	2		T36	1		T44	1
auto[402653184:536870911]	96	1			T1	1		T81	1		T25	2
auto[536870912:671088639]	100	1			T25	2		T16	1		T51	1
auto[671088640:805306367]	94	1			T2	1		T6	1		T25	2
auto[805306368:939524095]	100	1			T2	1		T14	1		T46	1
auto[939524096:1073741823]	91	1			T13	1		T81	1		T25	1
auto[1073741824:1207959551]	101	1			T14	2		T36	1		T80	1
auto[1207959552:1342177279]	81	1			T79	1		T49	2		T53	3
auto[1342177280:1476395007]	86	1			T2	1		T44	1		T256	1
auto[1476395008:1610612735]	118	1			T14	1		T35	1		T25	2
auto[1610612736:1744830463]	92	1			T47	1		T25	1		T51	1
auto[1744830464:1879048191]	78	1			T25	1		T49	1		T27	1
auto[1879048192:2013265919]	85	1			T81	1		T25	1		T78	1
auto[2013265920:2147483647]	94	1			T25	2		T49	1		T37	1
auto[2147483648:2281701375]	94	1			T25	3		T49	5		T183	1
auto[2281701376:2415919103]	93	1			T81	1		T21	1		T79	1
auto[2415919104:2550136831]	93	1			T2	1		T25	1		T49	1
auto[2550136832:2684354559]	108	1			T14	2		T80	1		T47	1
auto[2684354560:2818572287]	94	1			T14	1		T6	1		T25	1
auto[2818572288:2952790015]	96	1			T1	1		T13	1		T35	1
auto[2952790016:3087007743]	79	1			T25	1		T179	1		T62	2
auto[3087007744:3221225471]	117	1			T1	1		T44	1		T47	1
auto[3221225472:3355443199]	107	1			T35	1		T81	1		T25	1
auto[3355443200:3489660927]	96	1			T44	1		T25	2		T189	1
auto[3489660928:3623878655]	83	1			T13	1		T25	1		T21	1
auto[3623878656:3758096383]	88	1			T46	1		T25	2		T21	1
auto[3758096384:3892314111]	88	1			T1	1		T14	1		T47	1
auto[3892314112:4026531839]	79	1			T46	1		T25	3		T49	2
auto[4026531840:4160749567]	76	1			T35	1		T36	1		T56	1
auto[4160749568:4294967295]	78	1			T49	1		T126	1		T102	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	41	1			T47	1		T79	1		T49	3
auto[0:134217727]	auto[1]	54	1			T80	1		T49	2		T61	2
auto[134217728:268435455]	auto[0]	46	1			T49	2		T179	1		T66	1
auto[134217728:268435455]	auto[1]	68	1			T14	1		T25	1		T49	1
auto[268435456:402653183]	auto[0]	51	1			T36	1		T67	1		T400	1
auto[268435456:402653183]	auto[1]	52	1			T14	2		T44	1		T75	1
auto[402653184:536870911]	auto[0]	45	1			T1	1		T81	1		T25	2
auto[402653184:536870911]	auto[1]	51	1			T49	2		T324	1		T17	1
auto[536870912:671088639]	auto[0]	53	1			T25	2		T184	1		T70	1
auto[536870912:671088639]	auto[1]	47	1			T16	1		T51	1		T27	1
auto[671088640:805306367]	auto[0]	37	1			T25	1		T49	1		T179	1
auto[671088640:805306367]	auto[1]	57	1			T2	1		T6	1		T25	1
auto[805306368:939524095]	auto[0]	51	1			T2	1		T46	1		T49	2
auto[805306368:939524095]	auto[1]	49	1			T14	1		T80	1		T57	1
auto[939524096:1073741823]	auto[0]	48	1			T25	1		T21	1		T49	1
auto[939524096:1073741823]	auto[1]	43	1			T13	1		T81	1		T75	1
auto[1073741824:1207959551]	auto[0]	49	1			T14	1		T25	1		T75	1
auto[1073741824:1207959551]	auto[1]	52	1			T14	1		T36	1		T80	1
auto[1207959552:1342177279]	auto[0]	43	1			T79	1		T53	1		T67	1
auto[1207959552:1342177279]	auto[1]	38	1			T49	2		T53	2		T66	2
auto[1342177280:1476395007]	auto[0]	44	1			T246	1		T41	1		T63	1
auto[1342177280:1476395007]	auto[1]	42	1			T2	1		T44	1		T256	1
auto[1476395008:1610612735]	auto[0]	61	1			T14	1		T35	1		T25	2
auto[1476395008:1610612735]	auto[1]	57	1			T79	1		T102	1		T67	1
auto[1610612736:1744830463]	auto[0]	38	1			T25	1		T51	1		T48	2
auto[1610612736:1744830463]	auto[1]	54	1			T47	1		T67	1		T395	1
auto[1744830464:1879048191]	auto[0]	43	1			T25	1		T49	1		T27	1
auto[1744830464:1879048191]	auto[1]	35	1			T66	1		T67	1		T61	2
auto[1879048192:2013265919]	auto[0]	42	1			T25	1		T30	2		T409	1
auto[1879048192:2013265919]	auto[1]	43	1			T81	1		T78	1		T49	1
auto[2013265920:2147483647]	auto[0]	41	1			T25	1		T37	1		T89	1
auto[2013265920:2147483647]	auto[1]	53	1			T25	1		T49	1		T66	1
auto[2147483648:2281701375]	auto[0]	51	1			T25	3		T49	3		T7	1
auto[2147483648:2281701375]	auto[1]	43	1			T49	2		T183	1		T53	2
auto[2281701376:2415919103]	auto[0]	43	1			T21	1		T79	1		T121	1
auto[2281701376:2415919103]	auto[1]	50	1			T81	1		T49	1		T66	1
auto[2415919104:2550136831]	auto[0]	50	1			T2	1		T49	1		T192	1
auto[2415919104:2550136831]	auto[1]	43	1			T25	1		T17	1		T66	1
auto[2550136832:2684354559]	auto[0]	46	1			T14	1		T47	1		T25	2
auto[2550136832:2684354559]	auto[1]	62	1			T14	1		T80	1		T25	1
auto[2684354560:2818572287]	auto[0]	44	1			T16	1		T52	1		T240	1
auto[2684354560:2818572287]	auto[1]	50	1			T14	1		T6	1		T25	1
auto[2818572288:2952790015]	auto[0]	45	1			T47	1		T57	1		T25	1
auto[2818572288:2952790015]	auto[1]	51	1			T1	1		T13	1		T35	1
auto[2952790016:3087007743]	auto[0]	41	1			T179	1		T62	1		T102	1
auto[2952790016:3087007743]	auto[1]	38	1			T25	1		T62	1		T256	1
auto[3087007744:3221225471]	auto[0]	67	1			T47	1		T25	1		T49	1
auto[3087007744:3221225471]	auto[1]	50	1			T1	1		T44	1		T25	2
auto[3221225472:3355443199]	auto[0]	48	1			T81	1		T25	1		T49	1
auto[3221225472:3355443199]	auto[1]	59	1			T35	1		T16	1		T66	2
auto[3355443200:3489660927]	auto[0]	46	1			T44	1		T25	1		T22	1
auto[3355443200:3489660927]	auto[1]	50	1			T25	1		T189	1		T183	1
auto[3489660928:3623878655]	auto[0]	40	1			T25	1		T21	1		T49	1
auto[3489660928:3623878655]	auto[1]	43	1			T13	1		T53	1		T122	1
auto[3623878656:3758096383]	auto[0]	38	1			T25	1		T49	1		T37	1
auto[3623878656:3758096383]	auto[1]	50	1			T46	1		T25	1		T21	1
auto[3758096384:3892314111]	auto[0]	41	1			T14	1		T47	1		T25	1
auto[3758096384:3892314111]	auto[1]	47	1			T1	1		T25	1		T60	1
auto[3892314112:4026531839]	auto[0]	34	1			T46	1		T25	1		T49	2
auto[3892314112:4026531839]	auto[1]	45	1			T25	2		T53	1		T66	2
auto[4026531840:4160749567]	auto[0]	43	1			T49	1		T67	1		T68	1
auto[4026531840:4160749567]	auto[1]	33	1			T35	1		T36	1		T56	1
auto[4160749568:4294967295]	auto[0]	37	1			T49	1		T102	1		T245	1
auto[4160749568:4294967295]	auto[1]	41	1			T126	1		T69	1		T61	1