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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3350 1 T1 4 T2 4 T15 4
auto[1] 266 1 T2 8 T119 2 T144 8



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 91 1 T29 2 T58 1 T119 1
auto[134217728:268435455] 123 1 T2 1 T35 1 T29 1
auto[268435456:402653183] 99 1 T29 2 T5 1 T54 2
auto[402653184:536870911] 132 1 T17 1 T28 1 T29 1
auto[536870912:671088639] 99 1 T1 2 T2 1 T29 1
auto[671088640:805306367] 119 1 T2 1 T30 1 T39 1
auto[805306368:939524095] 113 1 T17 1 T29 2 T39 1
auto[939524096:1073741823] 105 1 T15 1 T47 1 T29 1
auto[1073741824:1207959551] 95 1 T35 1 T37 1 T58 1
auto[1207959552:1342177279] 104 1 T2 1 T28 1 T29 1
auto[1342177280:1476395007] 137 1 T5 1 T144 1 T51 1
auto[1476395008:1610612735] 93 1 T19 1 T47 2 T29 3
auto[1610612736:1744830463] 133 1 T35 1 T29 3 T54 1
auto[1744830464:1879048191] 105 1 T47 2 T29 3 T54 2
auto[1879048192:2013265919] 119 1 T29 2 T54 2 T50 1
auto[2013265920:2147483647] 111 1 T1 1 T47 1 T29 4
auto[2147483648:2281701375] 128 1 T15 1 T29 4 T61 1
auto[2281701376:2415919103] 117 1 T17 1 T29 2 T81 1
auto[2415919104:2550136831] 112 1 T2 1 T35 1 T47 2
auto[2550136832:2684354559] 123 1 T2 2 T35 1 T47 1
auto[2684354560:2818572287] 102 1 T28 1 T29 4 T30 1
auto[2818572288:2952790015] 109 1 T29 1 T39 2 T54 1
auto[2952790016:3087007743] 116 1 T1 1 T2 1 T47 1
auto[3087007744:3221225471] 112 1 T29 4 T54 1 T59 1
auto[3221225472:3355443199] 111 1 T2 1 T29 1 T262 1
auto[3355443200:3489660927] 98 1 T54 1 T111 1 T7 1
auto[3489660928:3623878655] 123 1 T15 1 T19 1 T29 1
auto[3623878656:3758096383] 123 1 T2 1 T28 1 T29 3
auto[3758096384:3892314111] 112 1 T2 1 T28 1 T29 1
auto[3892314112:4026531839] 108 1 T2 1 T15 1 T47 1
auto[4026531840:4160749567] 133 1 T35 1 T28 1 T5 1
auto[4160749568:4294967295] 111 1 T35 1 T133 1 T54 1



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 89 1 T29 2 T58 1 T145 1
auto[0:134217727] auto[1] 2 1 T119 1 T144 1 - -
auto[134217728:268435455] auto[0] 111 1 T35 1 T29 1 T39 1
auto[134217728:268435455] auto[1] 12 1 T2 1 T135 1 T138 1
auto[268435456:402653183] auto[0] 94 1 T29 2 T5 1 T54 2
auto[268435456:402653183] auto[1] 5 1 T136 1 T348 1 T284 1
auto[402653184:536870911] auto[0] 121 1 T17 1 T28 1 T29 1
auto[402653184:536870911] auto[1] 11 1 T135 2 T137 1 T138 1
auto[536870912:671088639] auto[0] 87 1 T1 2 T2 1 T29 1
auto[536870912:671088639] auto[1] 12 1 T138 1 T286 1 T369 1
auto[671088640:805306367] auto[0] 109 1 T2 1 T30 1 T39 1
auto[671088640:805306367] auto[1] 10 1 T135 1 T137 1 T348 1
auto[805306368:939524095] auto[0] 105 1 T17 1 T29 2 T39 1
auto[805306368:939524095] auto[1] 8 1 T282 1 T391 2 T285 1
auto[939524096:1073741823] auto[0] 94 1 T15 1 T47 1 T29 1
auto[939524096:1073741823] auto[1] 11 1 T138 1 T286 1 T267 1
auto[1073741824:1207959551] auto[0] 92 1 T35 1 T37 1 T58 1
auto[1073741824:1207959551] auto[1] 3 1 T285 1 T349 1 T399 1
auto[1207959552:1342177279] auto[0] 95 1 T2 1 T28 1 T29 1
auto[1207959552:1342177279] auto[1] 9 1 T362 1 T380 1 T393 1
auto[1342177280:1476395007] auto[0] 126 1 T5 1 T51 1 T266 1
auto[1342177280:1476395007] auto[1] 11 1 T144 1 T267 1 T369 1
auto[1476395008:1610612735] auto[0] 85 1 T19 1 T47 2 T29 3
auto[1476395008:1610612735] auto[1] 8 1 T144 1 T238 1 T282 2
auto[1610612736:1744830463] auto[0] 122 1 T35 1 T29 3 T54 1
auto[1610612736:1744830463] auto[1] 11 1 T348 1 T322 1 T391 1
auto[1744830464:1879048191] auto[0] 99 1 T47 2 T29 3 T54 2
auto[1744830464:1879048191] auto[1] 6 1 T145 1 T267 1 T380 1
auto[1879048192:2013265919] auto[0] 113 1 T29 2 T54 2 T50 1
auto[1879048192:2013265919] auto[1] 6 1 T391 2 T307 1 T393 1
auto[2013265920:2147483647] auto[0] 106 1 T1 1 T47 1 T29 4
auto[2013265920:2147483647] auto[1] 5 1 T286 1 T348 2 T391 1
auto[2147483648:2281701375] auto[0] 118 1 T15 1 T29 4 T61 1
auto[2147483648:2281701375] auto[1] 10 1 T144 1 T238 1 T284 1
auto[2281701376:2415919103] auto[0] 110 1 T17 1 T29 2 T81 1
auto[2281701376:2415919103] auto[1] 7 1 T144 2 T136 1 T138 1
auto[2415919104:2550136831] auto[0] 106 1 T35 1 T47 2 T29 1
auto[2415919104:2550136831] auto[1] 6 1 T2 1 T138 1 T400 1
auto[2550136832:2684354559] auto[0] 113 1 T35 1 T47 1 T29 1
auto[2550136832:2684354559] auto[1] 10 1 T2 2 T135 1 T138 1
auto[2684354560:2818572287] auto[0] 98 1 T28 1 T29 4 T30 1
auto[2684354560:2818572287] auto[1] 4 1 T391 1 T393 1 T349 1
auto[2818572288:2952790015] auto[0] 105 1 T29 1 T39 2 T54 1
auto[2818572288:2952790015] auto[1] 4 1 T136 1 T284 1 T356 1
auto[2952790016:3087007743] auto[0] 108 1 T1 1 T47 1 T30 1
auto[2952790016:3087007743] auto[1] 8 1 T2 1 T138 1 T282 1
auto[3087007744:3221225471] auto[0] 102 1 T29 4 T54 1 T59 1
auto[3087007744:3221225471] auto[1] 10 1 T137 1 T138 1 T322 1
auto[3221225472:3355443199] auto[0] 105 1 T29 1 T262 1 T58 3
auto[3221225472:3355443199] auto[1] 6 1 T2 1 T135 1 T282 1
auto[3355443200:3489660927] auto[0] 92 1 T54 1 T111 1 T7 1
auto[3355443200:3489660927] auto[1] 6 1 T138 1 T282 1 T369 1
auto[3489660928:3623878655] auto[0] 111 1 T15 1 T19 1 T29 1
auto[3489660928:3623878655] auto[1] 12 1 T138 1 T370 1 T348 1
auto[3623878656:3758096383] auto[0] 110 1 T28 1 T29 3 T81 1
auto[3623878656:3758096383] auto[1] 13 1 T2 1 T138 1 T238 1
auto[3758096384:3892314111] auto[0] 101 1 T28 1 T29 1 T37 1
auto[3758096384:3892314111] auto[1] 11 1 T2 1 T144 1 T238 1
auto[3892314112:4026531839] auto[0] 99 1 T2 1 T15 1 T47 1
auto[3892314112:4026531839] auto[1] 9 1 T119 1 T144 1 T145 1
auto[4026531840:4160749567] auto[0] 122 1 T35 1 T28 1 T5 1
auto[4026531840:4160749567] auto[1] 11 1 T362 1 T400 1 T272 2
auto[4160749568:4294967295] auto[0] 102 1 T35 1 T133 1 T54 1
auto[4160749568:4294967295] auto[1] 9 1 T138 1 T267 1 T391 1

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