Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7777

1

T1

8

T2

8

T15

7

auto[1]

293

1

T2

10

T119

7

T144

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	3258	1			T1	3		T2	4		T15	3
auto[134217728:268435455]	203	1			T47	1		T28	1		T29	3
auto[268435456:402653183]	166	1			T2	1		T29	4		T58	1
auto[402653184:536870911]	148	1			T17	1		T47	1		T28	1
auto[536870912:671088639]	176	1			T2	1		T29	4		T54	1
auto[671088640:805306367]	162	1			T2	1		T17	1		T35	1
auto[805306368:939524095]	188	1			T28	1		T29	2		T81	1
auto[939524096:1073741823]	152	1			T2	1		T47	1		T28	1
auto[1073741824:1207959551]	145	1			T2	2		T29	2		T39	1
auto[1207959552:1342177279]	160	1			T2	1		T47	2		T29	5
auto[1342177280:1476395007]	165	1			T1	1		T2	1		T15	2
auto[1476395008:1610612735]	138	1			T19	1		T47	1		T29	2
auto[1610612736:1744830463]	164	1			T1	1		T2	1		T35	1
auto[1744830464:1879048191]	134	1			T15	1		T29	2		T83	1
auto[1879048192:2013265919]	172	1			T47	1		T29	1		T133	1
auto[2013265920:2147483647]	136	1			T1	1		T28	1		T29	1
auto[2147483648:2281701375]	149	1			T15	1		T29	2		T58	2
auto[2281701376:2415919103]	160	1			T17	1		T47	1		T29	1
auto[2415919104:2550136831]	145	1			T35	1		T29	1		T39	1
auto[2550136832:2684354559]	130	1			T19	1		T35	1		T28	1
auto[2684354560:2818572287]	137	1			T35	1		T47	1		T29	1
auto[2818572288:2952790015]	151	1			T29	4		T5	1		T61	1
auto[2952790016:3087007743]	150	1			T2	1		T29	2		T5	1
auto[3087007744:3221225471]	144	1			T28	1		T29	1		T30	1
auto[3221225472:3355443199]	122	1			T47	1		T29	2		T81	1
auto[3355443200:3489660927]	155	1			T2	1		T35	1		T47	1
auto[3489660928:3623878655]	147	1			T29	2		T58	5		T50	1
auto[3623878656:3758096383]	156	1			T1	1		T2	1		T29	3
auto[3758096384:3892314111]	157	1			T2	1		T35	1		T29	1
auto[3892314112:4026531839]	148	1			T29	1		T133	2		T54	1
auto[4026531840:4160749567]	168	1			T2	1		T29	2		T133	1
auto[4160749568:4294967295]	184	1			T1	1		T29	5		T83	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	3250	1			T1	3		T2	4		T15	3
auto[0:134217727]	auto[1]	8	1			T137	1		T282	1		T284	1
auto[134217728:268435455]	auto[0]	195	1			T47	1		T28	1		T29	3
auto[134217728:268435455]	auto[1]	8	1			T119	1		T286	1		T285	1
auto[268435456:402653183]	auto[0]	157	1			T29	4		T58	1		T145	1
auto[268435456:402653183]	auto[1]	9	1			T2	1		T145	2		T391	1
auto[402653184:536870911]	auto[0]	143	1			T17	1		T47	1		T28	1
auto[402653184:536870911]	auto[1]	5	1			T137	1		T238	1		T322	1
auto[536870912:671088639]	auto[0]	168	1			T29	4		T54	1		T214	1
auto[536870912:671088639]	auto[1]	8	1			T2	1		T138	1		T282	1
auto[671088640:805306367]	auto[0]	151	1			T17	1		T35	1		T47	1
auto[671088640:805306367]	auto[1]	11	1			T2	1		T136	1		T137	1
auto[805306368:939524095]	auto[0]	181	1			T28	1		T29	2		T81	1
auto[805306368:939524095]	auto[1]	7	1			T119	1		T135	1		T391	1
auto[939524096:1073741823]	auto[0]	140	1			T47	1		T28	1		T29	2
auto[939524096:1073741823]	auto[1]	12	1			T2	1		T137	1		T282	2
auto[1073741824:1207959551]	auto[0]	135	1			T29	2		T39	1		T54	2
auto[1073741824:1207959551]	auto[1]	10	1			T2	2		T145	1		T238	2
auto[1207959552:1342177279]	auto[0]	154	1			T47	2		T29	5		T39	1
auto[1207959552:1342177279]	auto[1]	6	1			T2	1		T138	1		T380	1
auto[1342177280:1476395007]	auto[0]	155	1			T1	1		T15	2		T47	1
auto[1342177280:1476395007]	auto[1]	10	1			T2	1		T282	1		T267	1
auto[1476395008:1610612735]	auto[0]	125	1			T19	1		T47	1		T29	2
auto[1476395008:1610612735]	auto[1]	13	1			T119	1		T135	2		T391	1
auto[1610612736:1744830463]	auto[0]	157	1			T1	1		T2	1		T35	1
auto[1610612736:1744830463]	auto[1]	7	1			T380	1		T256	1		T356	1
auto[1744830464:1879048191]	auto[0]	124	1			T15	1		T29	2		T83	1
auto[1744830464:1879048191]	auto[1]	10	1			T138	2		T362	1		T391	2
auto[1879048192:2013265919]	auto[0]	158	1			T47	1		T29	1		T133	1
auto[1879048192:2013265919]	auto[1]	14	1			T144	2		T135	1		T138	2
auto[2013265920:2147483647]	auto[0]	129	1			T1	1		T28	1		T29	1
auto[2013265920:2147483647]	auto[1]	7	1			T267	1		T322	1		T391	1
auto[2147483648:2281701375]	auto[0]	139	1			T15	1		T29	2		T58	2
auto[2147483648:2281701375]	auto[1]	10	1			T137	1		T267	1		T391	1
auto[2281701376:2415919103]	auto[0]	151	1			T17	1		T47	1		T29	1
auto[2281701376:2415919103]	auto[1]	9	1			T119	1		T144	1		T348	1
auto[2415919104:2550136831]	auto[0]	132	1			T35	1		T29	1		T39	1
auto[2415919104:2550136831]	auto[1]	13	1			T144	1		T238	1		T370	1
auto[2550136832:2684354559]	auto[0]	116	1			T19	1		T35	1		T28	1
auto[2550136832:2684354559]	auto[1]	14	1			T135	1		T138	1		T282	2
auto[2684354560:2818572287]	auto[0]	128	1			T35	1		T47	1		T29	1
auto[2684354560:2818572287]	auto[1]	9	1			T119	1		T282	1		T307	1
auto[2818572288:2952790015]	auto[0]	142	1			T29	4		T5	1		T61	1
auto[2818572288:2952790015]	auto[1]	9	1			T119	1		T362	1		T395	1
auto[2952790016:3087007743]	auto[0]	144	1			T29	2		T5	1		T83	1
auto[2952790016:3087007743]	auto[1]	6	1			T2	1		T137	1		T362	1
auto[3087007744:3221225471]	auto[0]	133	1			T28	1		T29	1		T30	1
auto[3087007744:3221225471]	auto[1]	11	1			T370	1		T286	1		T348	1
auto[3221225472:3355443199]	auto[0]	118	1			T47	1		T29	2		T81	1
auto[3221225472:3355443199]	auto[1]	4	1			T135	1		T370	1		T267	1
auto[3355443200:3489660927]	auto[0]	143	1			T35	1		T47	1		T28	1
auto[3355443200:3489660927]	auto[1]	12	1			T2	1		T135	1		T282	1
auto[3489660928:3623878655]	auto[0]	141	1			T29	2		T58	5		T50	1
auto[3489660928:3623878655]	auto[1]	6	1			T145	1		T238	1		T272	1
auto[3623878656:3758096383]	auto[0]	152	1			T1	1		T2	1		T29	3
auto[3623878656:3758096383]	auto[1]	4	1			T138	1		T392	1		T397	1
auto[3758096384:3892314111]	auto[0]	147	1			T2	1		T35	1		T29	1
auto[3758096384:3892314111]	auto[1]	10	1			T369	1		T362	1		T391	2
auto[3892314112:4026531839]	auto[0]	142	1			T29	1		T133	2		T54	1
auto[3892314112:4026531839]	auto[1]	6	1			T145	1		T135	1		T267	1
auto[4026531840:4160749567]	auto[0]	156	1			T2	1		T29	2		T133	1
auto[4026531840:4160749567]	auto[1]	12	1			T395	2		T185	1		T256	1
auto[4160749568:4294967295]	auto[0]	171	1			T1	1		T29	5		T83	1
auto[4160749568:4294967295]	auto[1]	13	1			T119	1		T145	1		T135	1