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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 2872 1 T1 2 T16 7 T5 2
auto[1] 214 1 T17 6 T119 6 T151 5


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 92 1 T17 1 T78 1 T138 1
auto[134217728:268435455] 125 1 T137 1 T27 1 T201 1
auto[268435456:402653183] 97 1 T16 1 T19 1 T137 1
auto[402653184:536870911] 94 1 T5 1 T46 1 T39 2
auto[536870912:671088639] 89 1 T17 2 T46 1 T26 1
auto[671088640:805306367] 74 1 T7 1 T77 1 T20 2
auto[805306368:939524095] 101 1 T23 1 T7 2 T119 1
auto[939524096:1073741823] 92 1 T57 1 T23 1 T201 1
auto[1073741824:1207959551] 100 1 T17 1 T38 2 T7 2
auto[1207959552:1342177279] 93 1 T51 1 T137 1 T204 1
auto[1342177280:1476395007] 100 1 T16 1 T52 1 T137 1
auto[1476395008:1610612735] 96 1 T17 1 T19 1 T26 1
auto[1610612736:1744830463] 85 1 T5 1 T19 1 T51 1
auto[1744830464:1879048191] 109 1 T16 1 T52 1 T39 1
auto[1879048192:2013265919] 103 1 T1 1 T16 1 T17 1
auto[2013265920:2147483647] 100 1 T38 2 T23 1 T7 1
auto[2147483648:2281701375] 90 1 T19 1 T152 1 T78 1
auto[2281701376:2415919103] 86 1 T19 1 T137 1 T204 1
auto[2415919104:2550136831] 93 1 T17 1 T119 4 T78 1
auto[2550136832:2684354559] 88 1 T19 1 T52 1 T45 1
auto[2684354560:2818572287] 110 1 T16 1 T51 1 T38 1
auto[2818572288:2952790015] 90 1 T51 1 T45 1 T27 2
auto[2952790016:3087007743] 95 1 T17 1 T52 2 T204 1
auto[3087007744:3221225471] 105 1 T26 1 T27 1 T38 1
auto[3221225472:3355443199] 110 1 T16 1 T17 2 T19 2
auto[3355443200:3489660927] 86 1 T23 2 T107 1 T89 1
auto[3489660928:3623878655] 94 1 T16 1 T38 1 T23 1
auto[3623878656:3758096383] 82 1 T17 1 T51 1 T23 1
auto[3758096384:3892314111] 107 1 T45 1 T7 1 T88 1
auto[3892314112:4026531839] 99 1 T17 1 T26 1 T201 1
auto[4026531840:4160749567] 95 1 T18 1 T19 2 T57 1
auto[4160749568:4294967295] 106 1 T1 1 T19 1 T23 1


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 85 1 T78 1 T138 1 T192 1
auto[0:134217727] auto[1] 7 1 T17 1 T305 1 T248 1
auto[134217728:268435455] auto[0] 120 1 T137 1 T27 1 T201 1
auto[134217728:268435455] auto[1] 5 1 T119 1 T370 1 T248 1
auto[268435456:402653183] auto[0] 91 1 T16 1 T19 1 T137 1
auto[268435456:402653183] auto[1] 6 1 T144 1 T248 1 T414 1
auto[402653184:536870911] auto[0] 90 1 T5 1 T46 1 T39 2
auto[402653184:536870911] auto[1] 4 1 T399 1 T141 1 T142 1
auto[536870912:671088639] auto[0] 82 1 T46 1 T26 1 T204 1
auto[536870912:671088639] auto[1] 7 1 T17 2 T304 1 T290 3
auto[671088640:805306367] auto[0] 64 1 T7 1 T77 1 T20 2
auto[671088640:805306367] auto[1] 10 1 T305 2 T414 1 T429 1
auto[805306368:939524095] auto[0] 91 1 T23 1 T7 2 T20 1
auto[805306368:939524095] auto[1] 10 1 T119 1 T139 1 T399 1
auto[939524096:1073741823] auto[0] 86 1 T57 1 T23 1 T201 1
auto[939524096:1073741823] auto[1] 6 1 T298 1 T290 1 T429 1
auto[1073741824:1207959551] auto[0] 94 1 T17 1 T38 2 T7 2
auto[1073741824:1207959551] auto[1] 6 1 T151 1 T430 1 T414 1
auto[1207959552:1342177279] auto[0] 88 1 T51 1 T137 1 T204 1
auto[1207959552:1342177279] auto[1] 5 1 T141 1 T144 1 T421 1
auto[1342177280:1476395007] auto[0] 95 1 T16 1 T52 1 T137 1
auto[1342177280:1476395007] auto[1] 5 1 T141 2 T415 1 T291 1
auto[1476395008:1610612735] auto[0] 87 1 T17 1 T19 1 T26 1
auto[1476395008:1610612735] auto[1] 9 1 T141 1 T144 2 T298 1
auto[1610612736:1744830463] auto[0] 81 1 T5 1 T19 1 T51 1
auto[1610612736:1744830463] auto[1] 4 1 T290 1 T416 1 T418 1
auto[1744830464:1879048191] auto[0] 105 1 T16 1 T52 1 T39 1
auto[1744830464:1879048191] auto[1] 4 1 T138 2 T294 1 T339 1
auto[1879048192:2013265919] auto[0] 93 1 T1 1 T16 1 T52 1
auto[1879048192:2013265919] auto[1] 10 1 T17 1 T151 1 T141 2
auto[2013265920:2147483647] auto[0] 94 1 T38 2 T23 1 T7 1
auto[2013265920:2147483647] auto[1] 6 1 T345 1 T322 2 T291 1
auto[2147483648:2281701375] auto[0] 78 1 T19 1 T152 1 T78 1
auto[2147483648:2281701375] auto[1] 12 1 T399 1 T248 2 T345 1
auto[2281701376:2415919103] auto[0] 79 1 T19 1 T137 1 T204 1
auto[2281701376:2415919103] auto[1] 7 1 T298 1 T290 1 T355 1
auto[2415919104:2550136831] auto[0] 81 1 T17 1 T119 2 T78 1
auto[2415919104:2550136831] auto[1] 12 1 T119 2 T141 1 T304 2
auto[2550136832:2684354559] auto[0] 84 1 T19 1 T52 1 T45 1
auto[2550136832:2684354559] auto[1] 4 1 T304 1 T248 1 T415 1
auto[2684354560:2818572287] auto[0] 101 1 T16 1 T51 1 T38 1
auto[2684354560:2818572287] auto[1] 9 1 T119 1 T138 1 T429 1
auto[2818572288:2952790015] auto[0] 89 1 T51 1 T45 1 T27 2
auto[2818572288:2952790015] auto[1] 1 1 T298 1 - - - -
auto[2952790016:3087007743] auto[0] 87 1 T52 2 T204 1 T38 1
auto[2952790016:3087007743] auto[1] 8 1 T17 1 T141 1 T248 1
auto[3087007744:3221225471] auto[0] 98 1 T26 1 T27 1 T38 1
auto[3087007744:3221225471] auto[1] 7 1 T304 1 T294 1 T290 1
auto[3221225472:3355443199] auto[0] 106 1 T16 1 T17 2 T19 2
auto[3221225472:3355443199] auto[1] 4 1 T237 1 T298 1 T415 1
auto[3355443200:3489660927] auto[0] 79 1 T23 2 T107 1 T89 1
auto[3355443200:3489660927] auto[1] 7 1 T119 1 T151 1 T141 1
auto[3489660928:3623878655] auto[0] 89 1 T16 1 T38 1 T23 1
auto[3489660928:3623878655] auto[1] 5 1 T151 1 T294 1 T290 1
auto[3623878656:3758096383] auto[0] 74 1 T17 1 T51 1 T23 1
auto[3623878656:3758096383] auto[1] 8 1 T140 1 T399 1 T294 1
auto[3758096384:3892314111] auto[0] 101 1 T45 1 T7 1 T88 1
auto[3758096384:3892314111] auto[1] 6 1 T151 1 T294 1 T423 1
auto[3892314112:4026531839] auto[0] 90 1 T26 1 T201 1 T7 1
auto[3892314112:4026531839] auto[1] 9 1 T17 1 T399 1 T141 1
auto[4026531840:4160749567] auto[0] 89 1 T18 1 T19 2 T57 1
auto[4026531840:4160749567] auto[1] 6 1 T304 1 T280 1 T294 1
auto[4160749568:4294967295] auto[0] 101 1 T1 1 T19 1 T23 1
auto[4160749568:4294967295] auto[1] 5 1 T139 1 T304 1 T430 1

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