Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4332

1

T2

2

T3

18

T11

4

auto[1]

2288

1

T2

10

T3

14

T11

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	202	1			T11	2		T15	2		T48	4
auto[134217728:268435455]	210	1			T3	2		T15	4		T40	6
auto[268435456:402653183]	188	1			T3	2		T4	2		T196	2
auto[402653184:536870911]	200	1			T3	2		T15	2		T112	2
auto[536870912:671088639]	174	1			T3	2		T4	2		T72	2
auto[671088640:805306367]	206	1			T3	4		T46	2		T114	2
auto[805306368:939524095]	176	1			T3	2		T46	2		T196	2
auto[939524096:1073741823]	190	1			T11	2		T40	6		T38	4
auto[1073741824:1207959551]	202	1			T2	2		T4	2		T40	2
auto[1207959552:1342177279]	250	1			T2	4		T3	2		T40	4
auto[1342177280:1476395007]	196	1			T2	2		T4	4		T46	2
auto[1476395008:1610612735]	230	1			T4	2		T46	2		T38	2
auto[1610612736:1744830463]	190	1			T4	2		T16	4		T46	2
auto[1744830464:1879048191]	222	1			T3	2		T30	2		T48	2
auto[1879048192:2013265919]	196	1			T4	2		T15	2		T40	6
auto[2013265920:2147483647]	208	1			T15	2		T40	2		T29	2
auto[2147483648:2281701375]	188	1			T3	2		T4	4		T40	2
auto[2281701376:2415919103]	194	1			T4	8		T72	2		T29	2
auto[2415919104:2550136831]	232	1			T2	2		T4	2		T40	2
auto[2550136832:2684354559]	214	1			T4	2		T46	2		T112	2
auto[2684354560:2818572287]	226	1			T4	2		T40	2		T197	2
auto[2818572288:2952790015]	222	1			T11	2		T15	2		T40	2
auto[2952790016:3087007743]	222	1			T3	4		T4	2		T40	8
auto[3087007744:3221225471]	202	1			T3	2		T4	4		T30	2
auto[3221225472:3355443199]	216	1			T4	2		T15	2		T38	2
auto[3355443200:3489660927]	194	1			T2	2		T4	4		T41	2
auto[3489660928:3623878655]	214	1			T3	4		T4	4		T40	2
auto[3623878656:3758096383]	226	1			T40	2		T196	2		T193	2
auto[3758096384:3892314111]	212	1			T4	6		T193	2		T41	2
auto[3892314112:4026531839]	212	1			T40	2		T192	2		T48	4
auto[4026531840:4160749567]	206	1			T16	4		T40	2		T48	2
auto[4160749568:4294967295]	200	1			T3	2		T16	2		T40	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	128	1			T11	2		T15	2		T48	2
auto[0:134217727]	auto[1]	74	1			T48	2		T56	2		T50	2
auto[134217728:268435455]	auto[0]	140	1			T15	2		T40	6		T48	8
auto[134217728:268435455]	auto[1]	70	1			T3	2		T15	2		T29	2
auto[268435456:402653183]	auto[0]	116	1			T4	2		T196	2		T48	2
auto[268435456:402653183]	auto[1]	72	1			T3	2		T42	2		T60	2
auto[402653184:536870911]	auto[0]	144	1			T3	2		T15	2		T112	2
auto[402653184:536870911]	auto[1]	56	1			T113	2		T17	2		T311	2
auto[536870912:671088639]	auto[0]	108	1			T4	2		T48	4		T42	2
auto[536870912:671088639]	auto[1]	66	1			T3	2		T72	2		T29	2
auto[671088640:805306367]	auto[0]	118	1			T3	2		T114	2		T48	4
auto[671088640:805306367]	auto[1]	88	1			T3	2		T46	2		T38	2
auto[805306368:939524095]	auto[0]	108	1			T114	2		T48	4		T116	2
auto[805306368:939524095]	auto[1]	68	1			T3	2		T46	2		T196	2
auto[939524096:1073741823]	auto[0]	122	1			T11	2		T40	4		T38	4
auto[939524096:1073741823]	auto[1]	68	1			T40	2		T56	2		T131	2
auto[1073741824:1207959551]	auto[0]	138	1			T4	2		T197	2		T41	2
auto[1073741824:1207959551]	auto[1]	64	1			T2	2		T40	2		T59	2
auto[1207959552:1342177279]	auto[0]	180	1			T2	2		T3	2		T40	4
auto[1207959552:1342177279]	auto[1]	70	1			T2	2		T29	2		T38	4
auto[1342177280:1476395007]	auto[0]	130	1			T4	4		T192	2		T48	6
auto[1342177280:1476395007]	auto[1]	66	1			T2	2		T46	2		T196	2
auto[1476395008:1610612735]	auto[0]	144	1			T4	2		T48	4		T116	2
auto[1476395008:1610612735]	auto[1]	86	1			T46	2		T38	2		T56	2
auto[1610612736:1744830463]	auto[0]	116	1			T4	2		T16	2		T197	2
auto[1610612736:1744830463]	auto[1]	74	1			T16	2		T46	2		T48	2
auto[1744830464:1879048191]	auto[0]	140	1			T48	2		T56	8		T265	2
auto[1744830464:1879048191]	auto[1]	82	1			T3	2		T30	2		T50	2
auto[1879048192:2013265919]	auto[0]	136	1			T4	2		T15	2		T40	2
auto[1879048192:2013265919]	auto[1]	60	1			T40	4		T38	2		T54	2
auto[2013265920:2147483647]	auto[0]	138	1			T15	2		T40	2		T192	2
auto[2013265920:2147483647]	auto[1]	70	1			T29	2		T255	2		T253	2
auto[2147483648:2281701375]	auto[0]	122	1			T4	2		T48	6		T207	2
auto[2147483648:2281701375]	auto[1]	66	1			T3	2		T4	2		T40	2
auto[2281701376:2415919103]	auto[0]	122	1			T4	8		T191	2		T66	2
auto[2281701376:2415919103]	auto[1]	72	1			T72	2		T29	2		T56	4
auto[2415919104:2550136831]	auto[0]	148	1			T4	2		T197	2		T113	2
auto[2415919104:2550136831]	auto[1]	84	1			T2	2		T40	2		T48	2
auto[2550136832:2684354559]	auto[0]	134	1			T112	2		T191	2		T66	2
auto[2550136832:2684354559]	auto[1]	80	1			T4	2		T46	2		T43	2
auto[2684354560:2818572287]	auto[0]	142	1			T197	2		T41	2		T56	2
auto[2684354560:2818572287]	auto[1]	84	1			T4	2		T40	2		T48	2
auto[2818572288:2952790015]	auto[0]	156	1			T15	2		T193	2		T113	2
auto[2818572288:2952790015]	auto[1]	66	1			T11	2		T40	2		T38	2
auto[2952790016:3087007743]	auto[0]	164	1			T3	4		T4	2		T40	6
auto[2952790016:3087007743]	auto[1]	58	1			T40	2		T56	2		T62	2
auto[3087007744:3221225471]	auto[0]	132	1			T3	2		T4	4		T193	4
auto[3087007744:3221225471]	auto[1]	70	1			T30	2		T48	2		T255	2
auto[3221225472:3355443199]	auto[0]	150	1			T4	2		T15	2		T48	4
auto[3221225472:3355443199]	auto[1]	66	1			T38	2		T56	2		T208	2
auto[3355443200:3489660927]	auto[0]	118	1			T4	2		T41	2		T112	2
auto[3355443200:3489660927]	auto[1]	76	1			T2	2		T4	2		T43	2
auto[3489660928:3623878655]	auto[0]	136	1			T3	4		T4	2		T40	2
auto[3489660928:3623878655]	auto[1]	78	1			T4	2		T117	2		T66	2
auto[3623878656:3758096383]	auto[0]	160	1			T40	2		T196	2		T193	2
auto[3623878656:3758096383]	auto[1]	66	1			T56	4		T62	2		T59	2
auto[3758096384:3892314111]	auto[0]	134	1			T4	6		T41	2		T48	2
auto[3758096384:3892314111]	auto[1]	78	1			T193	2		T48	2		T24	2
auto[3892314112:4026531839]	auto[0]	134	1			T40	2		T241	2		T47	4
auto[3892314112:4026531839]	auto[1]	78	1			T192	2		T48	4		T56	2
auto[4026531840:4160749567]	auto[0]	128	1			T48	2		T56	2		T50	2
auto[4026531840:4160749567]	auto[1]	78	1			T16	4		T40	2		T60	4
auto[4160749568:4294967295]	auto[0]	146	1			T3	2		T16	2		T40	2
auto[4160749568:4294967295]	auto[1]	54	1			T48	4		T56	2		T62	2