Unified Coverage Report :: Group Instance : salt_3

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

2841

1

T3

2

T4

5

T14

5

auto[1]

288

1

T45

8

T128

8

T160

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	94	1			T16	1		T17	1		T35	1
auto[134217728:268435455]	105	1			T35	1		T45	1		T98	1
auto[268435456:402653183]	92	1			T204	1		T74	1		T211	1
auto[402653184:536870911]	98	1			T128	1		T74	1		T210	1
auto[536870912:671088639]	95	1			T34	1		T7	2		T38	1
auto[671088640:805306367]	77	1			T14	1		T45	1		T37	2
auto[805306368:939524095]	107	1			T45	2		T147	1		T74	2
auto[939524096:1073741823]	94	1			T14	1		T15	1		T98	1
auto[1073741824:1207959551]	92	1			T52	1		T36	1		T37	1
auto[1207959552:1342177279]	91	1			T17	1		T98	1		T204	1
auto[1342177280:1476395007]	110	1			T45	2		T7	1		T63	1
auto[1476395008:1610612735]	97	1			T3	1		T4	1		T209	2
auto[1610612736:1744830463]	86	1			T4	1		T16	1		T45	1
auto[1744830464:1879048191]	97	1			T36	1		T142	1		T150	1
auto[1879048192:2013265919]	102	1			T14	1		T16	1		T37	1
auto[2013265920:2147483647]	101	1			T37	1		T142	1		T73	1
auto[2147483648:2281701375]	84	1			T128	1		T54	1		T64	1
auto[2281701376:2415919103]	98	1			T14	1		T115	1		T74	1
auto[2415919104:2550136831]	107	1			T4	1		T23	1		T52	1
auto[2550136832:2684354559]	100	1			T37	1		T38	1		T73	1
auto[2684354560:2818572287]	97	1			T36	1		T37	1		T74	1
auto[2818572288:2952790015]	96	1			T4	1		T45	1		T34	1
auto[2952790016:3087007743]	104	1			T35	1		T34	1		T115	1
auto[3087007744:3221225471]	90	1			T61	1		T62	1		T38	1
auto[3221225472:3355443199]	98	1			T204	1		T203	1		T58	1
auto[3355443200:3489660927]	106	1			T3	1		T63	1		T211	2
auto[3489660928:3623878655]	113	1			T4	1		T45	2		T37	1
auto[3623878656:3758096383]	95	1			T17	1		T47	1		T204	1
auto[3758096384:3892314111]	115	1			T15	1		T37	1		T203	1
auto[3892314112:4026531839]	100	1			T35	1		T45	2		T38	1
auto[4026531840:4160749567]	88	1			T45	1		T34	1		T128	2
auto[4160749568:4294967295]	100	1			T14	1		T38	1		T128	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	88	1			T16	1		T17	1		T35	1
auto[0:134217727]	auto[1]	6	1			T160	1		T93	2		T345	1
auto[134217728:268435455]	auto[0]	95	1			T35	1		T98	1		T47	1
auto[134217728:268435455]	auto[1]	10	1			T45	1		T128	1		T160	1
auto[268435456:402653183]	auto[0]	86	1			T204	1		T74	1		T211	1
auto[268435456:402653183]	auto[1]	6	1			T154	2		T416	1		T306	1
auto[402653184:536870911]	auto[0]	90	1			T128	1		T74	1		T210	1
auto[402653184:536870911]	auto[1]	8	1			T93	1		T349	1		T366	1
auto[536870912:671088639]	auto[0]	88	1			T34	1		T7	2		T38	1
auto[536870912:671088639]	auto[1]	7	1			T404	1		T431	1		T432	1
auto[671088640:805306367]	auto[0]	69	1			T14	1		T45	1		T37	2
auto[671088640:805306367]	auto[1]	8	1			T128	1		T379	1		T417	1
auto[805306368:939524095]	auto[0]	98	1			T45	1		T147	1		T74	2
auto[805306368:939524095]	auto[1]	9	1			T45	1		T306	1		T372	2
auto[939524096:1073741823]	auto[0]	86	1			T14	1		T15	1		T98	1
auto[939524096:1073741823]	auto[1]	8	1			T150	1		T365	2		T244	1
auto[1073741824:1207959551]	auto[0]	82	1			T52	1		T36	1		T37	1
auto[1073741824:1207959551]	auto[1]	10	1			T150	1		T379	1		T349	1
auto[1207959552:1342177279]	auto[0]	83	1			T17	1		T98	1		T204	1
auto[1207959552:1342177279]	auto[1]	8	1			T308	1		T366	1		T306	1
auto[1342177280:1476395007]	auto[0]	97	1			T45	1		T7	1		T63	1
auto[1342177280:1476395007]	auto[1]	13	1			T45	1		T308	2		T154	1
auto[1476395008:1610612735]	auto[0]	94	1			T3	1		T4	1		T209	2
auto[1476395008:1610612735]	auto[1]	3	1			T366	1		T432	1		T433	1
auto[1610612736:1744830463]	auto[0]	78	1			T4	1		T16	1		T45	1
auto[1610612736:1744830463]	auto[1]	8	1			T291	1		T379	1		T366	1
auto[1744830464:1879048191]	auto[0]	85	1			T36	1		T142	1		T64	2
auto[1744830464:1879048191]	auto[1]	12	1			T150	1		T93	1		T244	2
auto[1879048192:2013265919]	auto[0]	93	1			T14	1		T16	1		T37	1
auto[1879048192:2013265919]	auto[1]	9	1			T150	1		T291	1		T152	1
auto[2013265920:2147483647]	auto[0]	91	1			T37	1		T142	1		T73	1
auto[2013265920:2147483647]	auto[1]	10	1			T160	1		T150	1		T93	1
auto[2147483648:2281701375]	auto[0]	74	1			T54	1		T64	1		T78	1
auto[2147483648:2281701375]	auto[1]	10	1			T128	1		T379	1		T244	1
auto[2281701376:2415919103]	auto[0]	89	1			T14	1		T115	1		T74	1
auto[2281701376:2415919103]	auto[1]	9	1			T150	1		T161	1		T291	1
auto[2415919104:2550136831]	auto[0]	92	1			T4	1		T23	1		T52	1
auto[2415919104:2550136831]	auto[1]	15	1			T417	1		T306	1		T427	1
auto[2550136832:2684354559]	auto[0]	88	1			T37	1		T38	1		T73	1
auto[2550136832:2684354559]	auto[1]	12	1			T379	1		T349	2		T366	1
auto[2684354560:2818572287]	auto[0]	92	1			T36	1		T37	1		T74	1
auto[2684354560:2818572287]	auto[1]	5	1			T161	1		T365	1		T152	1
auto[2818572288:2952790015]	auto[0]	84	1			T4	1		T34	1		T204	1
auto[2818572288:2952790015]	auto[1]	12	1			T45	1		T128	1		T379	2
auto[2952790016:3087007743]	auto[0]	96	1			T35	1		T34	1		T115	1
auto[2952790016:3087007743]	auto[1]	8	1			T160	1		T161	1		T366	1
auto[3087007744:3221225471]	auto[0]	83	1			T61	1		T62	1		T38	1
auto[3087007744:3221225471]	auto[1]	7	1			T244	1		T271	1		T306	1
auto[3221225472:3355443199]	auto[0]	94	1			T204	1		T203	1		T58	1
auto[3221225472:3355443199]	auto[1]	4	1			T291	1		T427	1		T419	1
auto[3355443200:3489660927]	auto[0]	99	1			T3	1		T63	1		T211	2
auto[3355443200:3489660927]	auto[1]	7	1			T150	1		T152	1		T366	1
auto[3489660928:3623878655]	auto[0]	99	1			T4	1		T45	1		T37	1
auto[3489660928:3623878655]	auto[1]	14	1			T45	1		T128	1		T150	1
auto[3623878656:3758096383]	auto[0]	83	1			T17	1		T47	1		T204	1
auto[3623878656:3758096383]	auto[1]	12	1			T128	1		T416	1		T372	1
auto[3758096384:3892314111]	auto[0]	108	1			T15	1		T37	1		T203	1
auto[3758096384:3892314111]	auto[1]	7	1			T308	1		T154	1		T307	1
auto[3892314112:4026531839]	auto[0]	90	1			T35	1		T38	1		T206	1
auto[3892314112:4026531839]	auto[1]	10	1			T45	2		T379	1		T416	1
auto[4026531840:4160749567]	auto[0]	78	1			T34	1		T128	1		T21	1
auto[4026531840:4160749567]	auto[1]	10	1			T45	1		T128	1		T349	1
auto[4160749568:4294967295]	auto[0]	89	1			T14	1		T38	1		T209	1
auto[4160749568:4294967295]	auto[1]	11	1			T128	1		T379	1		T349	2