Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4936

1

T1

4

T3

80

T13

2

auto[1]

2167

1

T3

30

T13

2

T16

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	236	1			T3	6		T76	2		T33	2
auto[134217728:268435455]	236	1			T3	10		T17	2		T34	4
auto[268435456:402653183]	212	1			T3	4		T88	2		T44	2
auto[402653184:536870911]	216	1			T3	6		T76	2		T54	2
auto[536870912:671088639]	260	1			T3	4		T16	2		T33	2
auto[671088640:805306367]	190	1			T100	2		T45	2		T4	2
auto[805306368:939524095]	190	1			T3	8		T18	2		T76	2
auto[939524096:1073741823]	230	1			T3	4		T4	6		T52	2
auto[1073741824:1207959551]	212	1			T3	6		T16	2		T17	2
auto[1207959552:1342177279]	220	1			T1	2		T3	4		T13	2
auto[1342177280:1476395007]	206	1			T3	6		T18	2		T33	2
auto[1476395008:1610612735]	230	1			T3	2		T13	2		T43	2
auto[1610612736:1744830463]	214	1			T35	2		T4	2		T262	2
auto[1744830464:1879048191]	224	1			T54	2		T44	2		T81	2
auto[1879048192:2013265919]	232	1			T3	4		T16	2		T43	4
auto[2013265920:2147483647]	236	1			T3	2		T54	2		T47	2
auto[2147483648:2281701375]	246	1			T3	4		T16	2		T43	2
auto[2281701376:2415919103]	240	1			T3	2		T47	2		T56	4
auto[2415919104:2550136831]	206	1			T3	2		T27	4		T4	2
auto[2550136832:2684354559]	248	1			T3	6		T47	2		T56	2
auto[2684354560:2818572287]	248	1			T1	2		T17	2		T19	2
auto[2818572288:2952790015]	212	1			T3	2		T44	2		T100	2
auto[2952790016:3087007743]	210	1			T3	2		T44	2		T35	2
auto[3087007744:3221225471]	228	1			T3	6		T16	2		T4	2
auto[3221225472:3355443199]	196	1			T43	2		T88	4		T100	2
auto[3355443200:3489660927]	214	1			T3	4		T27	2		T44	2
auto[3489660928:3623878655]	204	1			T33	2		T88	2		T100	2
auto[3623878656:3758096383]	223	1			T3	6		T43	2		T100	2
auto[3758096384:3892314111]	212	1			T3	4		T43	2		T54	4
auto[3892314112:4026531839]	220	1			T47	4		T100	2		T51	2
auto[4026531840:4160749567]	224	1			T3	2		T18	2		T51	2
auto[4160749568:4294967295]	228	1			T3	4		T19	2		T27	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	168	1			T3	4		T76	2		T33	2
auto[0:134217727]	auto[1]	68	1			T3	2		T45	2		T63	2
auto[134217728:268435455]	auto[0]	156	1			T3	8		T17	2		T34	4
auto[134217728:268435455]	auto[1]	80	1			T3	2		T108	2		T64	2
auto[268435456:402653183]	auto[0]	162	1			T3	4		T88	2		T44	2
auto[268435456:402653183]	auto[1]	50	1			T4	2		T258	2		T225	2
auto[402653184:536870911]	auto[0]	160	1			T3	4		T76	2		T54	2
auto[402653184:536870911]	auto[1]	56	1			T3	2		T4	2		T53	2
auto[536870912:671088639]	auto[0]	170	1			T16	2		T4	2		T53	2
auto[536870912:671088639]	auto[1]	90	1			T3	4		T33	2		T101	2
auto[671088640:805306367]	auto[0]	122	1			T100	2		T45	2		T4	2
auto[671088640:805306367]	auto[1]	68	1			T55	2		T146	2		T231	4
auto[805306368:939524095]	auto[0]	134	1			T3	6		T18	2		T4	2
auto[805306368:939524095]	auto[1]	56	1			T3	2		T76	2		T27	2
auto[939524096:1073741823]	auto[0]	146	1			T3	4		T4	6		T134	2
auto[939524096:1073741823]	auto[1]	84	1			T52	2		T57	2		T64	2
auto[1073741824:1207959551]	auto[0]	134	1			T3	4		T17	2		T35	2
auto[1073741824:1207959551]	auto[1]	78	1			T3	2		T16	2		T88	2
auto[1207959552:1342177279]	auto[0]	148	1			T1	2		T3	2		T13	2
auto[1207959552:1342177279]	auto[1]	72	1			T3	2		T99	2		T134	2
auto[1342177280:1476395007]	auto[0]	144	1			T3	6		T33	2		T34	2
auto[1342177280:1476395007]	auto[1]	62	1			T18	2		T220	2		T47	2
auto[1476395008:1610612735]	auto[0]	168	1			T43	2		T33	2		T88	2
auto[1476395008:1610612735]	auto[1]	62	1			T3	2		T13	2		T34	2
auto[1610612736:1744830463]	auto[0]	136	1			T35	2		T4	2		T262	2
auto[1610612736:1744830463]	auto[1]	78	1			T55	2		T99	2		T61	2
auto[1744830464:1879048191]	auto[0]	150	1			T54	2		T44	2		T55	2
auto[1744830464:1879048191]	auto[1]	74	1			T81	2		T104	2		T5	2
auto[1879048192:2013265919]	auto[0]	170	1			T3	4		T16	2		T43	4
auto[1879048192:2013265919]	auto[1]	62	1			T20	2		T55	2		T147	2
auto[2013265920:2147483647]	auto[0]	174	1			T3	2		T54	2		T47	2
auto[2013265920:2147483647]	auto[1]	62	1			T134	2		T24	2		T126	2
auto[2147483648:2281701375]	auto[0]	174	1			T3	4		T16	2		T43	2
auto[2147483648:2281701375]	auto[1]	72	1			T220	2		T307	2		T58	2
auto[2281701376:2415919103]	auto[0]	172	1			T56	4		T45	2		T4	2
auto[2281701376:2415919103]	auto[1]	68	1			T3	2		T47	2		T4	2
auto[2415919104:2550136831]	auto[0]	152	1			T3	2		T27	4		T4	2
auto[2415919104:2550136831]	auto[1]	54	1			T258	2		T429	2		T134	2
auto[2550136832:2684354559]	auto[0]	170	1			T3	2		T47	2		T4	2
auto[2550136832:2684354559]	auto[1]	78	1			T3	4		T56	2		T4	2
auto[2684354560:2818572287]	auto[0]	168	1			T1	2		T19	2		T22	2
auto[2684354560:2818572287]	auto[1]	80	1			T17	2		T22	2		T111	2
auto[2818572288:2952790015]	auto[0]	152	1			T3	2		T44	2		T100	2
auto[2818572288:2952790015]	auto[1]	60	1			T61	2		T6	2		T297	2
auto[2952790016:3087007743]	auto[0]	118	1			T3	2		T4	2		T101	2
auto[2952790016:3087007743]	auto[1]	92	1			T44	2		T35	2		T262	4
auto[3087007744:3221225471]	auto[0]	154	1			T3	6		T16	2		T4	2
auto[3087007744:3221225471]	auto[1]	74	1			T81	2		T53	2		T46	2
auto[3221225472:3355443199]	auto[0]	146	1			T88	4		T100	2		T4	4
auto[3221225472:3355443199]	auto[1]	50	1			T43	2		T61	2		T332	2
auto[3355443200:3489660927]	auto[0]	152	1			T3	2		T27	2		T44	2
auto[3355443200:3489660927]	auto[1]	62	1			T3	2		T52	2		T231	2
auto[3489660928:3623878655]	auto[0]	142	1			T33	2		T88	2		T100	2
auto[3489660928:3623878655]	auto[1]	62	1			T101	2		T58	2		T46	2
auto[3623878656:3758096383]	auto[0]	172	1			T3	4		T43	2		T100	2
auto[3623878656:3758096383]	auto[1]	51	1			T3	2		T262	2		T408	2
auto[3758096384:3892314111]	auto[0]	160	1			T3	2		T43	2		T54	4
auto[3758096384:3892314111]	auto[1]	52	1			T3	2		T47	2		T20	2
auto[3892314112:4026531839]	auto[0]	164	1			T47	4		T100	2		T51	2
auto[3892314112:4026531839]	auto[1]	56	1			T55	2		T146	2		T64	2
auto[4026531840:4160749567]	auto[0]	148	1			T3	2		T56	2		T4	2
auto[4026531840:4160749567]	auto[1]	76	1			T18	2		T51	2		T55	2
auto[4160749568:4294967295]	auto[0]	150	1			T3	4		T19	2		T27	2
auto[4160749568:4294967295]	auto[1]	78	1			T220	2		T44	2		T35	2