Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4666

1

T2

10

T3

4

T4

6

auto[1]

2166

1

T2

4

T3

4

T4

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	216	1			T16	2		T49	2		T108	2
auto[134217728:268435455]	206	1			T2	2		T55	2		T49	4
auto[268435456:402653183]	226	1			T42	4		T131	2		T49	4
auto[402653184:536870911]	216	1			T3	2		T13	2		T32	2
auto[536870912:671088639]	224	1			T32	2		T84	2		T21	2
auto[671088640:805306367]	178	1			T2	4		T16	2		T31	2
auto[805306368:939524095]	214	1			T13	2		T31	2		T88	2
auto[939524096:1073741823]	250	1			T14	2		T41	2		T42	6
auto[1073741824:1207959551]	224	1			T129	2		T61	2		T56	2
auto[1207959552:1342177279]	216	1			T3	2		T13	2		T31	2
auto[1342177280:1476395007]	216	1			T16	2		T42	2		T90	2
auto[1476395008:1610612735]	210	1			T13	2		T16	2		T84	2
auto[1610612736:1744830463]	228	1			T13	2		T32	2		T21	2
auto[1744830464:1879048191]	200	1			T13	2		T31	2		T84	2
auto[1879048192:2013265919]	186	1			T42	2		T5	2		T132	2
auto[2013265920:2147483647]	222	1			T12	2		T13	2		T32	2
auto[2147483648:2281701375]	234	1			T2	2		T13	2		T16	2
auto[2281701376:2415919103]	200	1			T13	2		T31	2		T21	2
auto[2415919104:2550136831]	228	1			T13	2		T32	2		T84	2
auto[2550136832:2684354559]	176	1			T4	2		T42	2		T19	2
auto[2684354560:2818572287]	224	1			T32	2		T90	2		T19	2
auto[2818572288:2952790015]	222	1			T2	4		T14	2		T84	2
auto[2952790016:3087007743]	266	1			T12	2		T32	4		T88	4
auto[3087007744:3221225471]	200	1			T4	2		T6	2		T47	2
auto[3221225472:3355443199]	204	1			T12	2		T14	2		T84	2
auto[3355443200:3489660927]	174	1			T4	2		T12	2		T31	2
auto[3489660928:3623878655]	238	1			T12	2		T42	2		T18	2
auto[3623878656:3758096383]	220	1			T3	2		T31	2		T84	2
auto[3758096384:3892314111]	186	1			T88	2		T90	2		T99	2
auto[3892314112:4026531839]	236	1			T2	2		T3	2		T4	2
auto[4026531840:4160749567]	204	1			T42	4		T90	2		T55	2
auto[4160749568:4294967295]	188	1			T129	2		T42	4		T5	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	120	1			T16	2		T53	4		T205	2
auto[0:134217727]	auto[1]	96	1			T49	2		T108	2		T406	2
auto[134217728:268435455]	auto[0]	134	1			T2	2		T55	2		T49	2
auto[134217728:268435455]	auto[1]	72	1			T49	2		T89	2		T78	2
auto[268435456:402653183]	auto[0]	154	1			T42	4		T49	4		T62	2
auto[268435456:402653183]	auto[1]	72	1			T131	2		T80	2		T96	2
auto[402653184:536870911]	auto[0]	154	1			T13	2		T32	2		T46	4
auto[402653184:536870911]	auto[1]	62	1			T3	2		T62	2		T406	2
auto[536870912:671088639]	auto[0]	154	1			T32	2		T21	2		T42	2
auto[536870912:671088639]	auto[1]	70	1			T84	2		T42	2		T49	2
auto[671088640:805306367]	auto[0]	118	1			T2	2		T16	2		T31	2
auto[671088640:805306367]	auto[1]	60	1			T2	2		T21	2		T49	2
auto[805306368:939524095]	auto[0]	154	1			T13	2		T31	2		T88	2
auto[805306368:939524095]	auto[1]	60	1			T53	2		T23	2		T216	2
auto[939524096:1073741823]	auto[0]	176	1			T14	2		T42	6		T90	2
auto[939524096:1073741823]	auto[1]	74	1			T41	2		T62	2		T68	2
auto[1073741824:1207959551]	auto[0]	164	1			T129	2		T61	2		T23	2
auto[1073741824:1207959551]	auto[1]	60	1			T56	2		T54	2		T326	2
auto[1207959552:1342177279]	auto[0]	158	1			T3	2		T13	2		T31	2
auto[1207959552:1342177279]	auto[1]	58	1			T45	2		T135	2		T406	2
auto[1342177280:1476395007]	auto[0]	144	1			T16	2		T90	2		T44	2
auto[1342177280:1476395007]	auto[1]	72	1			T42	2		T19	2		T49	2
auto[1476395008:1610612735]	auto[0]	138	1			T16	2		T84	2		T129	2
auto[1476395008:1610612735]	auto[1]	72	1			T13	2		T132	2		T423	2
auto[1610612736:1744830463]	auto[0]	168	1			T13	2		T32	2		T21	2
auto[1610612736:1744830463]	auto[1]	60	1			T18	2		T49	4		T80	2
auto[1744830464:1879048191]	auto[0]	134	1			T13	2		T31	2		T84	2
auto[1744830464:1879048191]	auto[1]	66	1			T42	2		T61	2		T205	2
auto[1879048192:2013265919]	auto[0]	130	1			T5	2		T49	6		T109	2
auto[1879048192:2013265919]	auto[1]	56	1			T42	2		T132	2		T109	2
auto[2013265920:2147483647]	auto[0]	150	1			T13	2		T32	2		T84	2
auto[2013265920:2147483647]	auto[1]	72	1			T12	2		T43	2		T130	2
auto[2147483648:2281701375]	auto[0]	148	1			T2	2		T16	2		T41	4
auto[2147483648:2281701375]	auto[1]	86	1			T13	2		T27	2		T43	4
auto[2281701376:2415919103]	auto[0]	134	1			T31	2		T21	2		T88	2
auto[2281701376:2415919103]	auto[1]	66	1			T13	2		T423	2		T54	2
auto[2415919104:2550136831]	auto[0]	144	1			T32	2		T84	2		T21	2
auto[2415919104:2550136831]	auto[1]	84	1			T13	2		T130	2		T42	2
auto[2550136832:2684354559]	auto[0]	122	1			T4	2		T42	2		T146	2
auto[2550136832:2684354559]	auto[1]	54	1			T19	2		T22	2		T60	2
auto[2684354560:2818572287]	auto[0]	164	1			T32	2		T90	2		T112	2
auto[2684354560:2818572287]	auto[1]	60	1			T19	2		T242	2		T269	2
auto[2818572288:2952790015]	auto[0]	138	1			T2	2		T42	2		T104	2
auto[2818572288:2952790015]	auto[1]	84	1			T2	2		T14	2		T84	2
auto[2952790016:3087007743]	auto[0]	186	1			T32	4		T88	4		T42	4
auto[2952790016:3087007743]	auto[1]	80	1			T12	2		T49	2		T77	4
auto[3087007744:3221225471]	auto[0]	140	1			T4	2		T47	2		T61	2
auto[3087007744:3221225471]	auto[1]	60	1			T6	2		T110	2		T62	2
auto[3221225472:3355443199]	auto[0]	150	1			T14	2		T84	2		T41	2
auto[3221225472:3355443199]	auto[1]	54	1			T12	2		T205	2		T216	2
auto[3355443200:3489660927]	auto[0]	122	1			T4	2		T12	2		T31	2
auto[3355443200:3489660927]	auto[1]	52	1			T109	2		T269	4		T59	2
auto[3489660928:3623878655]	auto[0]	162	1			T12	2		T46	2		T61	2
auto[3489660928:3623878655]	auto[1]	76	1			T42	2		T18	2		T6	2
auto[3623878656:3758096383]	auto[0]	152	1			T3	2		T31	2		T88	2
auto[3623878656:3758096383]	auto[1]	68	1			T84	2		T42	4		T109	2
auto[3758096384:3892314111]	auto[0]	124	1			T88	2		T99	2		T49	4
auto[3758096384:3892314111]	auto[1]	62	1			T90	2		T423	2		T67	2
auto[3892314112:4026531839]	auto[0]	152	1			T2	2		T61	2		T112	2
auto[3892314112:4026531839]	auto[1]	84	1			T3	2		T4	2		T49	2
auto[4026531840:4160749567]	auto[0]	154	1			T90	2		T55	2		T49	6
auto[4026531840:4160749567]	auto[1]	50	1			T42	4		T111	2		T62	4
auto[4160749568:4294967295]	auto[0]	124	1			T129	2		T5	2		T61	2
auto[4160749568:4294967295]	auto[1]	64	1			T42	4		T147	2		T49	2