Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4638

1

T2

14

T3

8

T4

4

auto[1]

2193

1

T4

4

T12

4

T13

10

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	259	1			T43	2		T130	2		T21	2
auto[134217728:268435455]	240	1			T4	2		T14	2		T16	2
auto[268435456:402653183]	218	1			T31	2		T32	4		T84	2
auto[402653184:536870911]	222	1			T84	2		T130	2		T21	2
auto[536870912:671088639]	206	1			T2	2		T13	2		T32	2
auto[671088640:805306367]	168	1			T31	2		T42	6		T45	2
auto[805306368:939524095]	198	1			T16	2		T32	2		T27	2
auto[939524096:1073741823]	206	1			T3	2		T84	2		T42	2
auto[1073741824:1207959551]	216	1			T31	2		T84	2		T42	2
auto[1207959552:1342177279]	194	1			T16	2		T84	2		T42	4
auto[1342177280:1476395007]	226	1			T12	2		T84	2		T104	2
auto[1476395008:1610612735]	212	1			T4	2		T13	2		T42	2
auto[1610612736:1744830463]	210	1			T2	2		T12	2		T43	2
auto[1744830464:1879048191]	178	1			T12	2		T16	2		T55	2
auto[1879048192:2013265919]	234	1			T2	4		T13	2		T129	2
auto[2013265920:2147483647]	200	1			T88	4		T42	2		T5	2
auto[2147483648:2281701375]	202	1			T2	2		T31	2		T32	2
auto[2281701376:2415919103]	240	1			T14	2		T31	2		T32	2
auto[2415919104:2550136831]	212	1			T12	2		T16	2		T41	2
auto[2550136832:2684354559]	228	1			T32	2		T21	2		T88	4
auto[2684354560:2818572287]	202	1			T88	2		T45	2		T22	2
auto[2818572288:2952790015]	234	1			T31	2		T42	4		T90	2
auto[2952790016:3087007743]	238	1			T2	2		T3	2		T42	2
auto[3087007744:3221225471]	218	1			T13	2		T104	2		T98	2
auto[3221225472:3355443199]	210	1			T42	2		T61	4		T49	2
auto[3355443200:3489660927]	188	1			T3	2		T13	2		T31	2
auto[3489660928:3623878655]	212	1			T13	4		T129	2		T42	2
auto[3623878656:3758096383]	210	1			T4	2		T13	2		T42	2
auto[3758096384:3892314111]	206	1			T13	2		T42	2		T99	2
auto[3892314112:4026531839]	218	1			T4	2		T13	2		T14	2
auto[4026531840:4160749567]	208	1			T3	2		T12	2		T90	2
auto[4160749568:4294967295]	218	1			T2	2		T21	2		T42	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	168	1			T43	2		T21	2		T41	2
auto[0:134217727]	auto[1]	91	1			T130	2		T42	2		T412	2
auto[134217728:268435455]	auto[0]	166	1			T4	2		T16	2		T32	2
auto[134217728:268435455]	auto[1]	74	1			T14	2		T112	2		T99	2
auto[268435456:402653183]	auto[0]	152	1			T31	2		T32	2		T84	2
auto[268435456:402653183]	auto[1]	66	1			T32	2		T6	2		T60	2
auto[402653184:536870911]	auto[0]	144	1			T84	2		T21	2		T6	2
auto[402653184:536870911]	auto[1]	78	1			T130	2		T112	2		T49	2
auto[536870912:671088639]	auto[0]	130	1			T2	2		T32	2		T84	4
auto[536870912:671088639]	auto[1]	76	1			T13	2		T47	2		T49	2
auto[671088640:805306367]	auto[0]	118	1			T31	2		T42	6		T55	2
auto[671088640:805306367]	auto[1]	50	1			T45	2		T49	2		T67	2
auto[805306368:939524095]	auto[0]	126	1			T32	2		T21	2		T88	2
auto[805306368:939524095]	auto[1]	72	1			T16	2		T27	2		T90	2
auto[939524096:1073741823]	auto[0]	144	1			T3	2		T42	2		T46	2
auto[939524096:1073741823]	auto[1]	62	1			T84	2		T46	2		T111	2
auto[1073741824:1207959551]	auto[0]	146	1			T31	2		T84	2		T42	2
auto[1073741824:1207959551]	auto[1]	70	1			T60	6		T247	2		T216	2
auto[1207959552:1342177279]	auto[0]	132	1			T16	2		T84	2		T146	2
auto[1207959552:1342177279]	auto[1]	62	1			T42	4		T326	2		T325	2
auto[1342177280:1476395007]	auto[0]	148	1			T84	2		T44	2		T46	2
auto[1342177280:1476395007]	auto[1]	78	1			T12	2		T104	2		T112	2
auto[1476395008:1610612735]	auto[0]	148	1			T13	2		T61	2		T53	2
auto[1476395008:1610612735]	auto[1]	64	1			T4	2		T42	2		T18	2
auto[1610612736:1744830463]	auto[0]	142	1			T2	2		T12	2		T43	2
auto[1610612736:1744830463]	auto[1]	68	1			T42	2		T49	2		T426	2
auto[1744830464:1879048191]	auto[0]	132	1			T12	2		T16	2		T55	2
auto[1744830464:1879048191]	auto[1]	46	1			T205	2		T137	2		T406	2
auto[1879048192:2013265919]	auto[0]	158	1			T2	4		T129	2		T41	2
auto[1879048192:2013265919]	auto[1]	76	1			T13	2		T42	2		T19	2
auto[2013265920:2147483647]	auto[0]	136	1			T88	2		T42	2		T5	2
auto[2013265920:2147483647]	auto[1]	64	1			T88	2		T98	2		T109	2
auto[2147483648:2281701375]	auto[0]	144	1			T2	2		T31	2		T43	2
auto[2147483648:2281701375]	auto[1]	58	1			T32	2		T129	2		T132	2
auto[2281701376:2415919103]	auto[0]	168	1			T14	2		T31	2		T41	2
auto[2281701376:2415919103]	auto[1]	72	1			T32	2		T129	2		T54	2
auto[2415919104:2550136831]	auto[0]	146	1			T16	2		T41	2		T42	2
auto[2415919104:2550136831]	auto[1]	66	1			T12	2		T109	2		T54	2
auto[2550136832:2684354559]	auto[0]	158	1			T21	2		T146	2		T22	2
auto[2550136832:2684354559]	auto[1]	70	1			T32	2		T88	4		T55	2
auto[2684354560:2818572287]	auto[0]	126	1			T45	2		T22	2		T49	6
auto[2684354560:2818572287]	auto[1]	76	1			T88	2		T49	2		T423	2
auto[2818572288:2952790015]	auto[0]	160	1			T31	2		T42	4		T61	2
auto[2818572288:2952790015]	auto[1]	74	1			T90	2		T49	2		T205	2
auto[2952790016:3087007743]	auto[0]	158	1			T2	2		T3	2		T42	2
auto[2952790016:3087007743]	auto[1]	80	1			T7	2		T298	2		T247	2
auto[3087007744:3221225471]	auto[0]	140	1			T13	2		T98	2		T108	2
auto[3087007744:3221225471]	auto[1]	78	1			T104	2		T136	2		T289	2
auto[3221225472:3355443199]	auto[0]	140	1			T42	2		T61	4		T49	2
auto[3221225472:3355443199]	auto[1]	70	1			T111	2		T62	2		T205	2
auto[3355443200:3489660927]	auto[0]	144	1			T3	2		T13	2		T31	2
auto[3355443200:3489660927]	auto[1]	44	1			T42	2		T44	2		T136	2
auto[3489660928:3623878655]	auto[0]	130	1			T129	2		T146	4		T49	2
auto[3489660928:3623878655]	auto[1]	82	1			T13	4		T42	2		T49	2
auto[3623878656:3758096383]	auto[0]	162	1			T13	2		T42	2		T55	2
auto[3623878656:3758096383]	auto[1]	48	1			T4	2		T147	2		T49	2
auto[3758096384:3892314111]	auto[0]	140	1			T13	2		T42	2		T99	2
auto[3758096384:3892314111]	auto[1]	66	1			T147	2		T49	2		T89	2
auto[3892314112:4026531839]	auto[0]	132	1			T4	2		T42	4		T19	2
auto[3892314112:4026531839]	auto[1]	86	1			T13	2		T14	2		T42	2
auto[4026531840:4160749567]	auto[0]	140	1			T3	2		T12	2		T109	2
auto[4026531840:4160749567]	auto[1]	68	1			T90	2		T131	2		T62	2
auto[4160749568:4294967295]	auto[0]	160	1			T2	2		T21	2		T104	2
auto[4160749568:4294967295]	auto[1]	58	1			T42	2		T46	2		T62	2